usr/src/uts/common/io/dmfe/dmfe_impl.h

363

void dmfe_chip_put32(dmfe_t *dmfep, off_t offset, uint32_t value);

usr/src/uts/common/io/dmfe/dmfe_main.c

1149

dmfe_chip_put32(dmfep, TX_POLL_REG, 0);

usr/src/uts/common/io/dmfe/dmfe_main.c

1885

(void) dmfe_chip_put32(dmfep, STATUS_REG, istat);

usr/src/uts/common/io/dmfe/dmfe_main.c

347

dmfe_chip_put32(dmfep, OPN_MODE_REG, dmfep->opmode);

usr/src/uts/common/io/dmfe/dmfe_main.c

367

dmfe_chip_put32(dmfep, INT_MASK_REG, 0);

usr/src/uts/common/io/dmfe/dmfe_main.c

370

dmfe_chip_put32(dmfep, STATUS_REG, TX_STOPPED_INT | RX_STOPPED_INT);

usr/src/uts/common/io/dmfe/dmfe_main.c

382

dmfe_chip_put32(dmfep, BUS_MODE_REG, SW_RESET);

usr/src/uts/common/io/dmfe/dmfe_main.c

384

dmfe_chip_put32(dmfep, BUS_MODE_REG, 0);

usr/src/uts/common/io/dmfe/dmfe_main.c

386

dmfe_chip_put32(dmfep, BUS_MODE_REG, dmfe_bus_modes);

usr/src/uts/common/io/dmfe/dmfe_main.c

443

dmfe_chip_put32(dmfep, RX_BASE_ADDR_REG, descp->mem_dvma);

usr/src/uts/common/io/dmfe/dmfe_main.c

475

dmfe_chip_put32(dmfep, TX_BASE_ADDR_REG, descp->mem_dvma);

usr/src/uts/common/io/dmfe/dmfe_main.c

489

dmfe_chip_put32(dmfep, W_J_TIMER_REG, 0);

usr/src/uts/common/io/dmfe/dmfe_main.c

493

dmfe_chip_put32(dmfep, W_J_TIMER_REG, VLAN_ENABLE);

usr/src/uts/common/io/dmfe/dmfe_main.c

498

dmfe_chip_put32(dmfep, STATUS_REG, TX_STOPPED_INT | RX_STOPPED_INT);

usr/src/uts/common/io/dmfe/dmfe_main.c

539

dmfe_chip_put32(dmfep, INT_MASK_REG,

usr/src/uts/common/io/dmfe/dmfe_main.c

776

dmfe_chip_put32(dmfep, RX_POLL_REG, 0);

usr/src/uts/common/io/dmfe/dmfe_mii.c

102

dmfe_chip_put32(dmfep, ETHER_ROM_REG,

usr/src/uts/common/io/dmfe/dmfe_mii.c

111

dmfe_chip_put32(dmfep, ETHER_ROM_REG,

usr/src/uts/common/io/dmfe/dmfe_mii.c

119

dmfe_chip_put32(dmfep, ETHER_ROM_REG, READ_EEPROM_CS);

usr/src/uts/common/io/dmfe/dmfe_mii.c

124

dmfe_chip_put32(dmfep, ETHER_ROM_REG, READ_EEPROM);

usr/src/uts/common/io/dmfe/dmfe_mii.c

164

dmfe_chip_put32(dmfep, ETHER_ROM_REG,

usr/src/uts/common/io/dmfe/dmfe_mii.c

167

dmfe_chip_put32(dmfep, ETHER_ROM_REG,

usr/src/uts/common/io/dmfe/dmfe_mii.c

172

dmfe_chip_put32(dmfep, ETHER_ROM_REG,

usr/src/uts/common/io/dmfe/dmfe_mii.c

186

dmfe_chip_put32(dmfep, ETHER_ROM_REG, MII_TRISTATE);

usr/src/uts/common/io/dmfe/dmfe_mii.c

188

dmfe_chip_put32(dmfep, ETHER_ROM_REG, MII_TRISTATE | MII_CLOCK);

usr/src/uts/common/io/dmfe/dmfe_mii.c

222

dmfe_chip_put32(dmfep, ETHER_ROM_REG, MII_READ);

usr/src/uts/common/io/dmfe/dmfe_mii.c

224

dmfe_chip_put32(dmfep, ETHER_ROM_REG, MII_READ | MII_CLOCK);

usr/src/uts/common/io/dmfe/dmfe_mii.c

292

dmfe_chip_put32(dmfep, OPN_MODE_REG, dmfep->opmode);

usr/src/uts/common/io/dmfe/dmfe_mii.c

65

dmfe_chip_put32(dmfep, ETHER_ROM_REG, READ_EEPROM);

usr/src/uts/common/io/dmfe/dmfe_mii.c

67

dmfe_chip_put32(dmfep, ETHER_ROM_REG, READ_EEPROM_CS);

usr/src/uts/common/io/dmfe/dmfe_mii.c

69

dmfe_chip_put32(dmfep, ETHER_ROM_REG, READ_EEPROM_CS | SEL_CLK);

usr/src/uts/common/io/dmfe/dmfe_mii.c

71

dmfe_chip_put32(dmfep, ETHER_ROM_REG, READ_EEPROM_CS);

usr/src/uts/common/io/dmfe/dmfe_mii.c

80

dmfe_chip_put32(dmfep, ETHER_ROM_REG,

usr/src/uts/common/io/dmfe/dmfe_mii.c

83

dmfe_chip_put32(dmfep, ETHER_ROM_REG,

usr/src/uts/common/io/dmfe/dmfe_mii.c

86

dmfe_chip_put32(dmfep, ETHER_ROM_REG,

usr/src/uts/common/io/dmfe/dmfe_mii.c

96

dmfe_chip_put32(dmfep, ETHER_ROM_REG,

usr/src/uts/common/io/dmfe/dmfe_mii.c

99

dmfe_chip_put32(dmfep, ETHER_ROM_REG,