usr/src/uts/i86pc/io/amd_iommu/amd_iommu_impl.c

1523

cookie_array[i].dmac_cookie_addr,

usr/src/uts/i86pc/io/amd_iommu/amd_iommu_impl.c

1528

cookie_array[i].dmac_cookie_addr = (uintptr_t)start_va;

usr/src/uts/i86pc/io/amd_iommu/amd_iommu_impl.c

1582

cookie_array[i].dmac_cookie_addr,

usr/src/uts/i86pc/io/amd_iommu/amd_iommu_impl.c

1651

(void *)cookiep->dmac_cookie_addr,

usr/src/uts/i86pc/io/amd_iommu/amd_iommu_impl.c

1688

(void *)(uintptr_t)cookiep->dmac_cookie_addr,

usr/src/uts/i86pc/io/amd_iommu/amd_iommu_impl.c

395

ASSERT((iommu->aiomt_buf_dma_cookie.dmac_cookie_addr

usr/src/uts/i86pc/io/amd_iommu/amd_iommu_impl.c

421

addr = (caddr_t)(uintptr_t)iommu->aiomt_buf_dma_cookie.dmac_cookie_addr;

usr/src/uts/i86pc/io/amd_iommu/amd_iommu_page_tables.c

1080

dp->d_pgtable_root_4K = (pt->pt_cookie.dmac_cookie_addr) >> 12;

usr/src/uts/i86pc/io/amd_iommu/amd_iommu_page_tables.c

648

uint64_t pa_4K = ((uint64_t)pt->pt_cookie.dmac_cookie_addr) >> 12;

usr/src/uts/i86pc/io/amd_iommu/amd_iommu_page_tables.c

651

ASSERT((pt->pt_cookie.dmac_cookie_addr & AMD_IOMMU_PGTABLE_ALIGN) == 0);

usr/src/uts/i86pc/io/amd_iommu/amd_iommu_page_tables.c

667

uint64_t pa_4K = (pt->pt_cookie.dmac_cookie_addr >> 12);

usr/src/uts/i86pc/io/amd_iommu/amd_iommu_page_tables.c

670

ASSERT((pt->pt_cookie.dmac_cookie_addr & AMD_IOMMU_PGTABLE_ALIGN) == 0);

usr/src/uts/i86pc/io/amd_iommu/amd_iommu_page_tables.c

699

ASSERT((pt->pt_cookie.dmac_cookie_addr &

usr/src/uts/i86pc/io/amd_iommu/amd_iommu_page_tables.c

701

if ((pt->pt_cookie.dmac_cookie_addr >> 12) == pgtable_pa_4K) {

usr/src/uts/i86pc/io/amd_iommu/amd_iommu_page_tables.c

879

ASSERT(pt->pt_cookie.dmac_cookie_addr != (uintptr_t)NULL);

usr/src/uts/i86pc/io/amd_iommu/amd_iommu_page_tables.c

880

ASSERT((pt->pt_cookie.dmac_cookie_addr & AMD_IOMMU_PGTABLE_ALIGN) == 0);

usr/src/uts/i86pc/io/amd_iommu/amd_iommu_page_tables.c

967

uint64_t next_pgtable_pa_4K = (pt->pt_cookie.dmac_cookie_addr) >> 12;