d0
data_compare(const itm_data_t *d0, const itm_data_t *d1)
if (d0->size < d1->size) {
if (memcmp(NSPTR(d0), NSPTR(d1), d0->size) < 0) {
} else if (d0->size == d1->size) {
return (memcmp(NSPTR(d0), NSPTR(d1), d0->size));
if (memcmp(NSPTR(d0), NSPTR(d1), d1->size) <= 0) {
itm_data_t *d0;
d0 = &((*p0)->data0);
c0 = NSPTR(d0);
if (d0->size == d1->size) {
s = d0->size;
} else if (d0->size < d1->size) {
s = d1->size - d0->size;
s = d0->size;
assert(d0->size > d1->size);
s = d0->size - d1->size;
if (c0 == NSPTR(d0)) {
d = d0;
assert(c1 == NSPTR(d0));
int n, dN, d0, d1;
d0 = n % MP_DIGIT_BITS;
d1 = MP_DIGIT_BITS - d0;
z[j-n] ^= (zz>>d0);
if (d0)
d0 = p[0] % MP_DIGIT_BITS;
d1 = MP_DIGIT_BITS - d0;
z[j-n] ^= (zz >> d0);
if (d0)
d0 = p[0] % MP_DIGIT_BITS;
zz = z[dN] >> d0;
d1 = MP_DIGIT_BITS - d0;
if (d0) z[dN] = (z[dN] << d1) >> d1;
d0 = p[k] % MP_DIGIT_BITS;
d1 = MP_DIGIT_BITS - d0;
z[n] ^= (zz << d0);
if (d0 && tmp)
mp_digit d1, d0, q1, q0;
d0 = divisor & MP_HALF_DIGIT_MAX;
m = q1 * d0;
m = q0 * d0;
int d0, d1, d2;
: "=&c" (d0), "=&S" (d1), "=&D" (d2)
: "=&c" (d0), "=&S" (d1), "=&D" (d2)
if (d0 == 0)
d0 = 1 / d0; /* Divide intentionally by zero. */
udiv_qrnnd (q1, n1, 0, n1, d0);
udiv_qrnnd (q0, n0, n1, n0, d0);
if (n1 > d1 || n0 >= d0)
sub_ddmmss (n1, n0, n1, n0, d1, d0);
d1 = (d1 << bm) | (d0 >> b);
d0 = d0 << bm;
umul_ppmm (m1, m0, q0, d0);
sub_ddmmss (m1, m0, m1, m0, d1, d0);
UWtype d0, d1, n0, n1, n2;
d0 = dd.s.low;
if (d0 > n1)
udiv_qrnnd (q0, n0, n1, n0, d0);
union adt_event_data d0;
unsigned d0 = ISDIGIT(t[0]) ? t[0] - '0' : t[0] - 'a' + 10;
*e = (d1 << 4) + d0;
unsigned d0 = ISDIGIT(t[0]) ? t[0] - '0' : t[0] - 'a' + 10;
*e = (d1 << 4) + d0;
v = d0[0] + z * (d0[1] + z * (d0[2] + z * (d0[3] + z * d0[4])));
double d0, d1, d2, d3;
d0 = z0.d - w0.d;
h0 = d0 * TBL[i0];
l0 = d0 * TBL[i0+1];
e = d0(r, pat);
e = d0(r, pat);
static Expr *d0(re_re *r, PATTERN *pat);
#define ZERO_DEFINE() v_t d0
#define ZERO_D d0
#define COPY_DEFINE() v_t d0
#define COPY_D d0
#define ADD_DEFINE() v_t d0
#define ADD_D d0
#define MUL_DEFINE() v_t d0
#define MUL_D d0
#define GEN_PQ_DEFINE() v_t d0, c0
#define GEN_PQ_D d0
#define GEN_PQR_DEFINE() v_t d0, c0
#define GEN_PQR_D d0
#define SYN_Q_DEFINE() v_t d0, x0
#define SYN_Q_D d0
#define SYN_R_DEFINE() v_t d0, x0
#define SYN_R_D d0
#define SYN_PQ_DEFINE() v_t d0, x0
#define SYN_PQ_D d0
#define SYN_PR_DEFINE() v_t d0, x0
#define SYN_PR_D d0
#define SYN_QR_DEFINE() v_t d0, x0
#define SYN_QR_D d0
#define SYN_PQR_DEFINE() v_t d0, x0
#define SYN_PQR_D d0
uint32_t d0, uint32_t d1, uint32_t d2, uint32_t d3, uint32_t d4)
IPP_REG_WR(handle, portn, IPP_PFIFO_WR_DATA0_REG, d0);
uint32_t *d0, uint32_t *d1, uint32_t *d2, uint32_t *d3,
IPP_REG_RD(handle, portn, IPP_PFIFO_RD_DATA0_REG, d0);
uint32_t d0, uint32_t d1, uint32_t d2, uint32_t d3, uint32_t d4)
IPP_REG_WR(handle, portn, IPP_DFIFO_WR_DATA0_REG, d0);
uint32_t *d0, uint32_t *d1, uint32_t *d2, uint32_t *d3,
IPP_REG_RD(handle, portn, IPP_DFIFO_RD_DATA0_REG, d0);
rdmc_mem_data_t d0, d1, d2, d3, d4;
d0.value = 0;
d0.bits.ldw.data = data->data[0];
NXGE_REG_WR64(handle, d0_offset, d0.value);
NXGE_REG_RD64(handle, d0_offset, &d0.value);
data->data[0] = d0.bits.ldw.data;
txc_ro_data0_t d0;
&d0.value);
states->d0.value = d0.value;
txc_sf_data0_t d0;
d0.value = 0;
&d0.value);
states->d0.value = d0.value;
statsp->txc_stats.errlog.ro_st.d0.
statsp->txc_stats.errlog.sf_st.d0.
uint32_t d0, d1, d2, d3, d4;
uint32_t d0, d1, d2, d3, d4;
&d0, &d1, &d2, &d3, &d4)) != NPI_SUCCESS)
i, &d0, &d1, &d2, &d3, &d4)) != NPI_SUCCESS)
uint32_t d0, d1, d2, d3, d4;
&d0, &d1, &d2, &d3, &d4)) != NPI_SUCCESS)
uint32_t flags, int fraglen, int rate, struct rtw_ieee80211_duration *d0,
ack, flags, rate, d0);
*dn = *d0;
struct rtw_ieee80211_duration d0, dn;
rate, &d0, &dn, &npkt) == -1) {
*(uint16_t *)(uintptr_t)wh->i_dur = (d0.d_data_dur);
ctl1 = LSHIFT(d0.d_plcp_len, RTW_TXCTL1_LENGTH_MASK) |
LSHIFT(d0.d_rts_dur, RTW_TXCTL1_RTSDUR_MASK);
if (d0.d_residue)
txc_ro_data0_t d0;
txc_sf_data0_t d0;
#define ACPI_INIT_UUID(a, b, c, d0, d1, d2, d3, d4, d5, d6, d7) \
(d0), (d1), (d2), (d3), (d4), (d5), (d6), (d7)
stda %d0, [FP]ASI_BLK_P; \
stda %d0, [FP]ASI_BLK_P; \
ldda [FP]ASI_BLK_P, %d0; \
ldda [FP]ASI_BLK_P, %d0; \
uint64_t d0,
if (GRP_SIZE_IS_SET(d0)) {
stdphysio(dpa0, d0);
uint64_t c, d0, d1;
d0 = SETUP_DECODE(b0_pa, b0_size, 0, 0);
d0 |= AC_MEM_VALID;
d0 = memdec0;
prom_printf("c 0x%llx, d0 0x%llx, d1 0x%llx\n", c, d0, d1);
fhc_write_mcrs(cpa, dpa0, dpa1, c, d0, d1);