cur_state
change_level = (cur_state != prev_state ? TRUE : FALSE);
if (cur_state == SINGLE_USER ||
((cmd.c_levels & state_to_mask(cur_state)) == 0 &&
lvl_mask = state_to_mask(cur_state);
cur_state == prev_state))
if (process->p_flags & DEMANDREQUEST || cur_state == LVLa ||
cur_state == LVLb || cur_state == LVLc)
cur_state = SINGLE_USER;
new_state = cur_state;
if (cur_state < 1 || cur_state == 9 || cur_state > 13)
cur_state = 0;
prev_state = prior_state = cur_state;
if (op_modes == NORMAL_MODES && cur_state != LVLa &&
cur_state != LVLb && cur_state != LVLc)
if (state_to_flags(cur_state) & LSEL_RUNLEVEL) {
char rl = state_to_name(cur_state);
cur_state = SINGLE_USER;
prev_state = cur_state;
} else if (cur_state == LVLa || cur_state == LVLb ||
cur_state == LVLc) {
cur_state = prior_state;
prev_state = cur_state;
prev_state = cur_state;
if (may_need_audit && (cur_state == LVL3)) {
if (new_state != cur_state) {
prior_state = cur_state;
cur_state = new_state;
prev_state = cur_state;
if (cur_state >= 0)
prior_state = cur_state;
cur_state = new_state;
uint_t cur_state = 0;
devctl_device_getstate(dhdl, &cur_state);
if ((cur_state & DEVICE_OFFLINE) != 0) {
} else if ((cur_state & DEVICE_ONLINE) != 0) {
restarter_instance_state_t cur_state,
id.i_state = cur_state;
svc[ns].svc_status.cur_state =
svc_status_ex->cur_state = svcctl_scm_map_status(svc->sn_state);
param->service_status.cur_state = svcctl_scm_map_status(svc->sn_state);
param->service_status.cur_state = svcctl_scm_map_status(svc->sn_state);
__u8 cur_state;
cur_state = HERMON_QP_RTR; /* Ready to Receive */
cur_state = HERMON_QP_RTR; /* Ready to Receive */
cur_state = HERMON_QP_RTS; /* Ready to Send */
cur_state = HERMON_QP_SQERR; /* Send Queue Error */
cur_state = HERMON_QP_SQD; /* SQ Drained */
cur_state = qp->qp_state;
switch (cur_state) {
ibt_cep_state_t cur_state, mod_state;
cur_state = TAVOR_QP_RTR; /* Ready to Receive */
cur_state = TAVOR_QP_RTR; /* Ready to Receive */
cur_state = TAVOR_QP_RTS; /* Ready to Send */
cur_state = TAVOR_QP_SQERR; /* Send Queue Error */
cur_state = TAVOR_QP_SQD; /* SQ Drained */
cur_state = qp->qp_state;
switch (cur_state) {
ibt_cep_state_t cur_state, mod_state;
ib_modify_qp_is_ok(enum ib_qp_state cur_state, enum ib_qp_state next_state,
if (cur_state < 0 || cur_state > IB_QPS_ERR ||
cur_state, next_state, type, mask);
cur_state != IB_QPS_RTR && cur_state != IB_QPS_RTS &&
cur_state != IB_QPS_SQD && cur_state != IB_QPS_SQE) {
cur_state, next_state, type, mask);
if (!qp_state_table[cur_state][next_state].valid) {
cur_state, next_state, type, mask);
req_param = qp_state_table[cur_state][next_state].req_param[type];
opt_param = qp_state_table[cur_state][next_state].opt_param[type];
cur_state, next_state, type, mask, req_param);
cur_state, next_state, type, mask, req_param, opt_param);
enum ib_qp_state cur_state, new_state;
cur_state = attr_mask & IB_QP_CUR_STATE ? attr->cur_qp_state :
cur_state;
if (cur_state == new_state && cur_state == IB_QPS_RESET) {
if (!ib_modify_qp_is_ok(cur_state, new_state, qp->qp_type, attr_mask)) {
modify_attr.qp_current_state = OF2IBTF_STATE(cur_state);
if (cur_state == IB_QPS_RESET &&
} else if (cur_state == IB_QPS_INIT &&
} else if (cur_state == IB_QPS_RTR &&
if (cur_state == IB_QPS_RESET) {
if (cur_state == IB_QPS_INIT) {
if (cur_state == IB_QPS_RTR) {
switch (cur_state) {
enum ib_qp_state cur_state, new_state;
cur_state = cmd.cur_qp_state;
cur_state = IBT_TO_OFA_QP_STATE(qp_query_attr.qp_info.qp_state);
new_state = cmd.attr_mask & IB_QP_STATE ? cmd.qp_state : cur_state;
cmd.qp_handle, cur_state, new_state, uqp->ofa_qp_type,
if (!uverbs_modify_qp_is_ok(cur_state, new_state, uqp->ofa_qp_type,
uverbs_modify_update(&cmd, cur_state, new_state, &qp_query_attr,
uverbs_modify_qp_is_ok(enum ib_qp_state cur_state,
"(%x, %x, %x, %x)", cur_state, next_state, type, mask);
if (cur_state < 0 || cur_state > IB_QPS_ERR ||
cur_state, next_state);
cur_state != IB_QPS_RTR && cur_state != IB_QPS_RTS &&
cur_state != IB_QPS_SQD && cur_state != IB_QPS_SQE) {
cur_state);
state_tblp = &uverbs_qp_state_table[cur_state][next_state];
"bad transition, cur = %d, next = %d", cur_state,
"req = 0%08X", cur_state, next_state,
"illegal = 0x%08X", cur_state, next_state,
enum ib_qp_state cur_state, enum ib_qp_state new_state,
switch (cur_state) {
uint32_t cur_state;
cur_state = MFI_STATE_WAIT_HANDSHAKE;
cur_state = MFI_STATE_BOOT_MESSAGE_PENDING;
cur_state = MFI_STATE_OPERATIONAL;
cur_state = MFI_STATE_UNDEFINED;
cur_state = MFI_STATE_BB_INIT;
cur_state = MFI_STATE_FW_INIT;
cur_state = MFI_STATE_DEVICE_SCAN;
if (fw_state == cur_state) {
if (fw_state == cur_state) {
uint32_t cur_state;
cur_state = MFI_STATE_WAIT_HANDSHAKE;
cur_state = MFI_STATE_BOOT_MESSAGE_PENDING;
cur_state = MFI_STATE_OPERATIONAL;
cur_state = MFI_STATE_UNDEFINED;
cur_state = MFI_STATE_BB_INIT;
cur_state = MFI_STATE_FW_INIT;
cur_state = MFI_STATE_FW_INIT_2;
cur_state = MFI_STATE_DEVICE_SCAN;
cur_state = MFI_STATE_FLUSH_CACHE;
if (fw_state == cur_state) {
if (fw_state == cur_state) {
enum ecore_roce_qp_state cur_state;
uint32_t cur_state, uint32_t req_state)
else if (cur_state == CPU_ACPI_P0) {