bge_reg_set32
bge_reg_set32(bgep, NVM_CONFIG1_REG,
bge_reg_set32(bgep, SERIAL_EEPROM_ADDRESS_REG, SEEPROM_ACCESS_INIT);
bge_reg_set32(bgep, NVM_ACCESS_REG,
bge_reg_set32(bgep, NVM_ACCESS_REG,
bge_reg_set32(bgep, HOST_COALESCE_MODE_REG, regval);
bge_reg_set32(bgep, regno,
bge_reg_set32(bgep, VCPU_STATUS_REG, VCPU_DRV_RESET);
opfn = promisc ? bge_reg_set32 : bge_reg_clr32;
bge_reg_set32(bgep, FAST_BOOT_PC, 0);
bge_reg_set32(bgep, TLP_CONTROL_REG, TLP_DATA_FIFO_PROTECT);
bge_reg_set32(bgep, CPMU_PADRNG_CTL_REG, tmp);
bge_reg_set32(bgep, SERIAL_EEPROM_ADDRESS_REG, SEEPROM_ACCESS_INIT);
bge_reg_set32(bgep, MSI_MODE_REG,
bge_reg_set32(bgep, MODE_CONTROL_REG,
bge_reg_set32(bgep, MODE_CONTROL_REG,
bge_reg_set32(bgep, RCV_LP_STATS_CONTROL_REG, RCV_LP_STATS_ENABLE);
bge_reg_set32(bgep, ETHERNET_MAC_MODE_REG,
bge_reg_set32(bgep, ETHERNET_MAC_MODE_REG,
bge_reg_set32(bgep, HOST_COALESCE_MODE_REG, 0x70);
bge_reg_set32(bgep, ETHERNET_MAC_EVENT_ENABLE_REG,
bge_reg_set32(bgep, MODE_CONTROL_REG,
bge_reg_set32(bgep, MODE_CONTROL_REG,
bge_reg_set32(bgep, PCI_CONF_BGE_MHCR,
bge_reg_set32(bgep, HOST_COALESCE_MODE_REG,
bge_reg_set32(bgep, HOST_COALESCE_MODE_REG, COALESCE_NOW);
bge_reg_set32(bgep, ETHERNET_MAC_LED_CONTROL_REG, led_ctrl);
void bge_reg_set32(bge_t *bgep, bge_regno_t regno, uint32_t bits);
bge_reg_set32(bgep, PCI_CONF_BGE_MHCR,
bge_reg_set32(bgep, SERDES_CONTROL_REG, SERDES_CONTROL_COMMA_DETECT);
bge_reg_set32(bgep, SERDES_CONTROL_REG, SERDES_CONTROL_TX_DISABLE);
bge_reg_set32(bgep, ETHERNET_MAC_MODE_REG, ETHERNET_MODE_SEND_CFGS);
bge_reg_set32(bgep, SERDES_CONTROL_REG, serdes);
bge_reg_set32(bgep, ETHERNET_MAC_MODE_REG,