usr/src/uts/common/io/bge/bge_chip2.c

1131

bge_reg_put32(bgep, MI_COMMS_REG, cmd);

usr/src/uts/common/io/bge/bge_chip2.c

1344

bge_reg_put32(bgep, SERIAL_EEPROM_DATA_REG, *dp);

usr/src/uts/common/io/bge/bge_chip2.c

1345

bge_reg_put32(bgep, SERIAL_EEPROM_ADDRESS_REG, cmd);

usr/src/uts/common/io/bge/bge_chip2.c

1371

bge_reg_put32(bgep, SERIAL_EEPROM_ADDRESS_REG, regval);

usr/src/uts/common/io/bge/bge_chip2.c

1446

bge_reg_put32(bgep, NVM_FLASH_WRITE_REG, *dp);

usr/src/uts/common/io/bge/bge_chip2.c

1447

bge_reg_put32(bgep, NVM_FLASH_ADDR_REG, addr);

usr/src/uts/common/io/bge/bge_chip2.c

1448

bge_reg_put32(bgep, NVM_FLASH_CMD_REG, cmd);

usr/src/uts/common/io/bge/bge_chip2.c

1544

bge_reg_put32(bgep, NVM_SW_ARBITRATION_REG, NVM_RESET_REQ);

usr/src/uts/common/io/bge/bge_chip2.c

1617

bge_reg_put32(bgep, NVM_SW_ARBITRATION_REG, NVM_SET_REQ);

usr/src/uts/common/io/bge/bge_chip2.c

1676

bge_reg_put32(bgep, MISC_LOCAL_CONTROL_REG, regval);

usr/src/uts/common/io/bge/bge_chip2.c

2445

bge_reg_put32(bgep, RECV_RULE_MASK_REG(i), rulep->mask_value);

usr/src/uts/common/io/bge/bge_chip2.c

2446

bge_reg_put32(bgep, RECV_RULE_CONTROL_REG(i), rulep->control);

usr/src/uts/common/io/bge/bge_chip2.c

3167

bge_reg_put32(bgep,

usr/src/uts/common/io/bge/bge_chip2.c

3257

bge_reg_put32(bgep, regno, regval);

usr/src/uts/common/io/bge/bge_chip2.c

3297

bge_reg_put32(bgep, regno, ~(uint32_t)0);

usr/src/uts/common/io/bge/bge_chip2.c

3299

bge_reg_put32(bgep, regno, 0);

usr/src/uts/common/io/bge/bge_chip2.c

3321

bge_reg_put32(bgep, regno, regval);

usr/src/uts/common/io/bge/bge_chip2.c

3357

bge_reg_put32(bgep, regno, ~(uint32_t)0);

usr/src/uts/common/io/bge/bge_chip2.c

3359

bge_reg_put32(bgep, regno, 0);

usr/src/uts/common/io/bge/bge_chip2.c

3366

bge_reg_put32(bgep, regno, regval);

usr/src/uts/common/io/bge/bge_chip2.c

3412

bge_reg_put32(bgep, ETHERNET_MAC_MODE_REG, macmode);

usr/src/uts/common/io/bge/bge_chip2.c

3424

bge_reg_put32(bgep, TRANSMIT_MAC_MODE_REG, macmode);

usr/src/uts/common/io/bge/bge_chip2.c

3436

bge_reg_put32(bgep, RECEIVE_MAC_MODE_REG, macmode);

usr/src/uts/common/io/bge/bge_chip2.c

3446

bge_reg_put32(bgep, MI_STATUS_REG, MI_STATUS_LINK

usr/src/uts/common/io/bge/bge_chip2.c

3449

bge_reg_put32(bgep, MI_STATUS_REG, MI_STATUS_LINK);

usr/src/uts/common/io/bge/bge_chip2.c

3524

bge_reg_put32(bgep, MAC_HASH_REG(i), 0);

usr/src/uts/common/io/bge/bge_chip2.c

3527

bge_reg_put32(bgep, MAC_HASH_REG(i),

usr/src/uts/common/io/bge/bge_chip2.c

3561

bge_reg_put32(bgep, MAC_TX_RANDOM_BACKOFF_REG, fill);

usr/src/uts/common/io/bge/bge_chip2.c

3689

bge_reg_put32(bgep, ETHERNET_MAC_EVENT_ENABLE_REG, 0);

usr/src/uts/common/io/bge/bge_chip2.c

3690

bge_reg_put32(bgep, ETHERNET_MAC_STATUS_REG, ~0);

usr/src/uts/common/io/bge/bge_chip2.c

3876

bge_reg_put32(bgep, MEMORY_ARBITER_MODE_REG,

usr/src/uts/common/io/bge/bge_chip2.c

4003

bge_reg_put32(bgep, MODE_CONTROL_REG, tmp);

usr/src/uts/common/io/bge/bge_chip2.c

4008

bge_reg_put32(bgep, MEMORY_ARBITER_MODE_REG,

usr/src/uts/common/io/bge/bge_chip2.c

4065

bge_reg_put32(bgep, CPMU_CLCK_ORIDE_REG,

usr/src/uts/common/io/bge/bge_chip2.c

4083

bge_reg_put32(bgep, MISC_LOCAL_CONTROL_REG,

usr/src/uts/common/io/bge/bge_chip2.c

4090

bge_reg_put32(bgep, SERDES_RX_CONTROL, tmp);

usr/src/uts/common/io/bge/bge_chip2.c

4099

bge_reg_put32(bgep, ETHERNET_MAC_MODE_REG,

usr/src/uts/common/io/bge/bge_chip2.c

4102

bge_reg_put32(bgep, ETHERNET_MAC_MODE_REG, 0);

usr/src/uts/common/io/bge/bge_chip2.c

4119

bge_reg_put32(bgep, PCI_CONF_SUBVENID,

usr/src/uts/common/io/bge/bge_chip2.c

4192

bge_reg_put32(bgep, SEND_COALESCE_MAX_BD_REG,

usr/src/uts/common/io/bge/bge_chip2.c

4194

bge_reg_put32(bgep, SEND_COALESCE_TICKS_REG,

usr/src/uts/common/io/bge/bge_chip2.c

4196

bge_reg_put32(bgep, RCV_COALESCE_MAX_BD_REG,

usr/src/uts/common/io/bge/bge_chip2.c

4198

bge_reg_put32(bgep, RCV_COALESCE_TICKS_REG,

usr/src/uts/common/io/bge/bge_chip2.c

4292

bge_reg_put32(bgep, reg,

usr/src/uts/common/io/bge/bge_chip2.c

4301

bge_reg_put32(bgep, reg, (regval |

usr/src/uts/common/io/bge/bge_chip2.c

4325

bge_reg_put32(bgep, MISC_CONFIG_REG, regval);

usr/src/uts/common/io/bge/bge_chip2.c

4345

bge_reg_put32(bgep, MBUF_POOL_BASE_REG,

usr/src/uts/common/io/bge/bge_chip2.c

4347

bge_reg_put32(bgep, MBUF_POOL_LENGTH_REG,

usr/src/uts/common/io/bge/bge_chip2.c

4349

bge_reg_put32(bgep, DMAD_POOL_BASE_REG,

usr/src/uts/common/io/bge/bge_chip2.c

4351

bge_reg_put32(bgep, DMAD_POOL_LENGTH_REG,

usr/src/uts/common/io/bge/bge_chip2.c

4358

bge_reg_put32(bgep, RDMA_MBUF_LOWAT_REG,

usr/src/uts/common/io/bge/bge_chip2.c

4360

bge_reg_put32(bgep, MAC_RX_MBUF_LOWAT_REG,

usr/src/uts/common/io/bge/bge_chip2.c

4362

bge_reg_put32(bgep, MBUF_HIWAT_REG,

usr/src/uts/common/io/bge/bge_chip2.c

4369

bge_reg_put32(bgep, DMAD_POOL_LOWAT_REG,

usr/src/uts/common/io/bge/bge_chip2.c

4371

bge_reg_put32(bgep, DMAD_POOL_HIWAT_REG,

usr/src/uts/common/io/bge/bge_chip2.c

4374

bge_reg_put32(bgep, LOWAT_MAX_RECV_FRAMES_REG, bge_lowat_recv_frames);

usr/src/uts/common/io/bge/bge_chip2.c

4401

bge_reg_put32(bgep, STD_RCV_BD_RING_RCB_REG + 8,

usr/src/uts/common/io/bge/bge_chip2.c

4404

bge_reg_put32(bgep, STD_RCV_BD_RING_RCB_REG + 0xc,

usr/src/uts/common/io/bge/bge_chip2.c

4407

bge_reg_put32(bgep, STD_RCV_BD_RING_RCB_REG + 0xc,

usr/src/uts/common/io/bge/bge_chip2.c

4425

bge_reg_put32(bgep, STD_RCV_BD_REPLENISH_REG, bge_replenish_std);

usr/src/uts/common/io/bge/bge_chip2.c

4427

bge_reg_put32(bgep, JUMBO_RCV_BD_REPLENISH_REG,

usr/src/uts/common/io/bge/bge_chip2.c

4429

bge_reg_put32(bgep, MINI_RCV_BD_REPLENISH_REG,

usr/src/uts/common/io/bge/bge_chip2.c

4484

bge_reg_put32(bgep, MAC_RX_MTU_SIZE_REG, mtu);

usr/src/uts/common/io/bge/bge_chip2.c

4489

bge_reg_put32(bgep, MAC_TX_LENGTHS_REG, MAC_TX_LENGTHS_DEFAULT);

usr/src/uts/common/io/bge/bge_chip2.c

4494

bge_reg_put32(bgep, RCV_RULES_CONFIG_REG, RCV_RULES_CONFIG_DEFAULT);

usr/src/uts/common/io/bge/bge_chip2.c

4500

bge_reg_put32(bgep, RCV_LP_CONFIG_REG,

usr/src/uts/common/io/bge/bge_chip2.c

4507

bge_reg_put32(bgep, RCV_LP_STATS_ENABLE_MASK_REG, ~0);

usr/src/uts/common/io/bge/bge_chip2.c

4514

bge_reg_put32(bgep, RCV_LP_STATS_ENABLE_MASK_REG, stats_mask);

usr/src/uts/common/io/bge/bge_chip2.c

4525

bge_reg_put32(bgep, SEND_INIT_STATS_ENABLE_MASK_REG, ~0);

usr/src/uts/common/io/bge/bge_chip2.c

4527

bge_reg_put32(bgep, SEND_INIT_STATS_CONTROL_REG,

usr/src/uts/common/io/bge/bge_chip2.c

4530

bge_reg_put32(bgep, SEND_INIT_STATS_CONTROL_REG,

usr/src/uts/common/io/bge/bge_chip2.c

4544

bge_reg_put32(bgep, SEND_COALESCE_INT_BD_REG,

usr/src/uts/common/io/bge/bge_chip2.c

4546

bge_reg_put32(bgep, SEND_COALESCE_INT_TICKS_REG,

usr/src/uts/common/io/bge/bge_chip2.c

4548

bge_reg_put32(bgep, RCV_COALESCE_INT_BD_REG,

usr/src/uts/common/io/bge/bge_chip2.c

4550

bge_reg_put32(bgep, RCV_COALESCE_INT_TICKS_REG,

usr/src/uts/common/io/bge/bge_chip2.c

4570

bge_reg_put32(bgep, STATISTICS_TICKS_REG,

usr/src/uts/common/io/bge/bge_chip2.c

4572

bge_reg_put32(bgep, STATUS_BLOCK_BASE_ADDR_REG,

usr/src/uts/common/io/bge/bge_chip2.c

4574

bge_reg_put32(bgep, STATISTICS_BASE_ADDR_REG,

usr/src/uts/common/io/bge/bge_chip2.c

4594

bge_reg_put32(bgep, RDMA_CORR_CTRL_REG, regval);

usr/src/uts/common/io/bge/bge_chip2.c

4627

bge_reg_put32(bgep, ETHERNET_MAC_MODE_REG,

usr/src/uts/common/io/bge/bge_chip2.c

4763

bge_reg_put32(bgep, MI_MODE_REG, MI_MODE_DEFAULT);

usr/src/uts/common/io/bge/bge_chip2.c

4784

bge_reg_put32(bgep, ETHERNET_MAC_LED_CONTROL_REG, ledctl);

usr/src/uts/common/io/bge/bge_chip2.c

4789

bge_reg_put32(bgep, MI_STATUS_REG, MI_STATUS_LINK);

usr/src/uts/common/io/bge/bge_chip2.c

4963

bge_reg_put32(bgep, TX_RISC_STATE_REG, ~0);

usr/src/uts/common/io/bge/bge_chip2.c

4964

bge_reg_put32(bgep, RX_RISC_STATE_REG, ~0);

usr/src/uts/common/io/bge/bge_chip2.c

4965

bge_reg_put32(bgep, RECEIVE_MAC_STATUS_REG, ~0);

usr/src/uts/common/io/bge/bge_chip2.c

4966

bge_reg_put32(bgep, WRITE_DMA_STATUS_REG, ~0);

usr/src/uts/common/io/bge/bge_chip2.c

4967

bge_reg_put32(bgep, READ_DMA_STATUS_REG, ~0);

usr/src/uts/common/io/bge/bge_chip2.c

4968

bge_reg_put32(bgep, FLOW_ATTN_REG, ~0);

usr/src/uts/common/io/bge/bge_chip2.c

5030

bge_reg_put32(bgep, MSI_STATUS_REG, regval);

usr/src/uts/common/io/bge/bge_chip2.c

5458

bge_reg_put32(bgep, RDMA_CORR_CTRL_REG, regval);

usr/src/uts/common/io/bge/bge_chip2.c

614

bge_reg_put32(bgep, regno, regval);

usr/src/uts/common/io/bge/bge_chip2.c

6244

bge_reg_put32(bgep, RCV_COALESCE_TICKS_REG, ticks);

usr/src/uts/common/io/bge/bge_chip2.c

6245

bge_reg_put32(bgep, RCV_COALESCE_MAX_BD_REG, count);

usr/src/uts/common/io/bge/bge_chip2.c

627

bge_reg_put32(bgep, regno, regval);

usr/src/uts/common/io/bge/bge_chip2.c

6297

bge_reg_put32(bgep, RX_RISC_EVENT_REG, event | RRER_ASF_EVENT);

usr/src/uts/common/io/bge/bge_chip2.c

6386

bge_reg_put32(bgep, RX_RISC_EVENT_REG, event | RRER_ASF_EVENT);

usr/src/uts/common/io/bge/bge_impl.h

1186

void bge_reg_put32(bge_t *bgep, bge_regno_t regno, uint32_t value);

usr/src/uts/common/io/bge/bge_impl.h

994

#define CATC_TRIGGER(bgep, data) bge_reg_put32(bgep, 0x0a00, (data))

usr/src/uts/common/io/bge/bge_main2.c

1574

bge_reg_put32(bgep, RECV_RULE_MASK_REG(i), rulep[i].mask_value);

usr/src/uts/common/io/bge/bge_main2.c

1575

bge_reg_put32(bgep, RECV_RULE_CONTROL_REG(i), rulep[i].control);

usr/src/uts/common/io/bge/bge_main2.c

1580

bge_reg_put32(bgep, RECV_RULE_MASK_REG(i+1), rulep[i+1].mask_value);

usr/src/uts/common/io/bge/bge_main2.c

1581

bge_reg_put32(bgep, RECV_RULE_CONTROL_REG(i+1), rulep[i+1].control);

usr/src/uts/common/io/bge/bge_main2.c

1637

bge_reg_put32(bgep, RECV_RULE_MASK_REG(start), rulep[start].mask_value);

usr/src/uts/common/io/bge/bge_main2.c

1638

bge_reg_put32(bgep, RECV_RULE_CONTROL_REG(start), rulep[start].control);

usr/src/uts/common/io/bge/bge_main2.c

1642

bge_reg_put32(bgep, RECV_RULE_MASK_REG(start), rulep[start].mask_value);

usr/src/uts/common/io/bge/bge_main2.c

1643

bge_reg_put32(bgep, RECV_RULE_CONTROL_REG(start), rulep[start].control);

usr/src/uts/common/io/bge/bge_mii.c

1155

bge_reg_put32(bgep, ETHERNET_MAC_STATUS_REG, emac_status);

usr/src/uts/common/io/bge/bge_mii.c

1346

bge_reg_put32(bgep, ETHERNET_MAC_MODE_REG, macmode);

usr/src/uts/common/io/bge/bge_mii.c

1367

bge_reg_put32(bgep, TX_1000BASEX_AUTONEG_REG, 0);

usr/src/uts/common/io/bge/bge_mii.c

1534

bge_reg_put32(bgep, TX_1000BASEX_AUTONEG_REG,

usr/src/uts/common/io/bge/bge_mii.c

1588

bge_reg_put32(bgep,

usr/src/uts/common/io/bge/bge_mii.c

1613

bge_reg_put32(bgep,

usr/src/uts/common/io/bge/bge_mii.c

719

bge_reg_put32(bgep, EEE_LINK_IDLE_CONTROL_REG, val);

usr/src/uts/common/io/bge/bge_mii.c

721

bge_reg_put32(bgep, EEE_CONTROL_REG, EEE_CONTROL_EXIT_20_1_US);

usr/src/uts/common/io/bge/bge_mii.c

735

bge_reg_put32(bgep, EEE_MODE_REG, val);

usr/src/uts/common/io/bge/bge_mii.c

739

bge_reg_put32(bgep, EEE_DEBOUNCE_T1_CONTROL_REG,

usr/src/uts/common/io/bge/bge_mii.c

742

bge_reg_put32(bgep, EEE_DEBOUNCE_T2_CONTROL_REG,

usr/src/uts/common/io/bge/bge_mii.c

763

bge_reg_put32(bgep, EEE_MODE_REG, val);

usr/src/uts/common/io/bge/bge_mii.c

836

bge_reg_put32(bgep, EEE_CONTROL_REG,

usr/src/uts/common/io/bge/bge_mii.c

840

bge_reg_put32(bgep, EEE_CONTROL_REG,

usr/src/uts/common/io/bge/bge_mii.c

874

bge_reg_put32(bgep, EEE_MODE_REG, val);

usr/src/uts/common/io/bge/bge_mii.c

894

bge_reg_put32(bgep, EEE_MODE_REG, val);