usr/src/uts/common/io/bge/bge_chip2.c

1432

bge_reg_clr32(bgep, NVM_CONFIG1_REG,

usr/src/uts/common/io/bge/bge_chip2.c

1732

bge_reg_clr32(bgep, NVM_ACCESS_REG,

usr/src/uts/common/io/bge/bge_chip2.c

1757

bge_reg_clr32(bgep, NVM_ACCESS_REG,

usr/src/uts/common/io/bge/bge_chip2.c

3205

bge_reg_clr32(

usr/src/uts/common/io/bge/bge_chip2.c

3566

opfn = promisc ? bge_reg_set32 : bge_reg_clr32;

usr/src/uts/common/io/bge/bge_chip2.c

3672

bge_reg_clr32(bgep, ETHERNET_MAC_MODE_REG, ETHERNET_MODE_ENABLE_TDE);

usr/src/uts/common/io/bge/bge_chip2.c

4330

bge_reg_clr32(bgep, MISC_CONFIG_REG, MISC_CONFIG_EPHY_IDDQ);

usr/src/uts/common/io/bge/bge_chip2.c

5168

bge_reg_clr32(bgep, PCI_CONF_BGE_MHCR,

usr/src/uts/common/io/bge/bge_chip2.c

803

bge_reg_clr32(bgep, ETHERNET_MAC_LED_CONTROL_REG, led_ctrl);

usr/src/uts/common/io/bge/bge_chip2.c

805

bge_reg_clr32(bgep, ETHERNET_MAC_LED_CONTROL_REG, led_ctrl);

usr/src/uts/common/io/bge/bge_impl.h

1188

void bge_reg_clr32(bge_t *bgep, bge_regno_t regno, uint32_t bits);

usr/src/uts/common/io/bge/bge_main2.c

4178

bge_reg_clr32(bgep, MSI_MODE_REG, MSI_MSI_ENABLE);

usr/src/uts/common/io/bge/bge_mii.c

1353

bge_reg_clr32(bgep, SERDES_CONTROL_REG, SERDES_CONTROL_TBI_LOOPBACK);

usr/src/uts/common/io/bge/bge_mii.c

1366

bge_reg_clr32(bgep, SERDES_CONTROL_REG, SERDES_CONTROL_TX_DISABLE);

usr/src/uts/common/io/bge/bge_mii.c

1370

bge_reg_clr32(bgep, ETHERNET_MAC_MODE_REG, ETHERNET_MODE_SEND_CFGS);

usr/src/uts/common/io/bge/bge_mii.c

1544

bge_reg_clr32(bgep, ETHERNET_MAC_MODE_REG,

usr/src/uts/common/io/bge/bge_mii.c

248

bge_reg_clr32(bgep, MISC_CONFIG_REG, MISC_CONFIG_EPHY_IDDQ);