bar1
case bar1:
ret = ddi_regs_map_setup(dev_info, 2, (caddr_t *)&attr.bar1,
char *bar1;
char *bar1;
char *bar1);
char *bar1)
xge_assert(bar1);
(xge_hal_fifo_hw_pair_t *) (bar1 +
hldev->bar1 = bar1;
return hldev->bar1;
char *bar1 = (char *)hldev->bar1;
hldev->spdm_mem_base = bar1 + (spdm_bar_offset * 8);
hldev->bar1 = attr->bar1;
xge_assert(hldev->bar1);
(xge_hal_fifo_hw_pair_t *) (void *)(hldev->bar1 +
(void *)(hldev->bar1 + offset));
(void *)(hldev->bar1 + offset));
caddr_t bar0, bar1;
ddi_get32((Device)->bar1Handle, (uint32_t *)((Device)->bar1 + (Reg)))
ddi_put32((Device)->bar1Handle, (uint32_t *)((Device)->bar1 + (Reg)), \
if (ddi_regs_map_setup(dip, 2, &dp->bar1, 0, 0, &vmxnet3_dev_attr,
ph->bar1 = pci_config_get32(config_handle, hdr_off + PCI_CONF_BASE1);
uint32_t bar1;