Symbol: bar0
usr/src/cmd/pcitool/pcitool_ui.c
1184
case bar0:
usr/src/uts/common/io/cxgbe/common/t4_hw.c
1122
u32 bar0;
usr/src/uts/common/io/cxgbe/common/t4_hw.c
1134
bar0 = t4_read_pcie_cfg4(adap, pci_base, drv_fw_attach);
usr/src/uts/common/io/cxgbe/common/t4_hw.c
1135
bar0 &= pci_mask;
usr/src/uts/common/io/cxgbe/common/t4_hw.c
1136
adap->t4_bar0 = bar0;
usr/src/uts/common/io/cxgbe/common/t4_hw.c
1138
return bar0 + memwin_base;
usr/src/uts/common/io/cxgbe/t4nex/t4_nexus.c
1555
uintptr_t bar0;
usr/src/uts/common/io/cxgbe/t4nex/t4_nexus.c
1568
bar0 = ((uint64_t)data[0].pci_phys_mid << 32) | data[0].pci_phys_low;
usr/src/uts/common/io/cxgbe/t4nex/t4_nexus.c
1572
mem_win0_base = bar0 + MEMWIN0_BASE;
usr/src/uts/common/io/cxgbe/t4nex/t4_nexus.c
1573
mem_win1_base = bar0 + MEMWIN1_BASE;
usr/src/uts/common/io/cxgbe/t4nex/t4_nexus.c
1574
mem_win2_base = bar0 + MEMWIN2_BASE;
usr/src/uts/common/io/xge/drv/xge.c
1120
ret = ddi_regs_map_setup(dev_info, 1, (caddr_t *)&attr.bar0,
usr/src/uts/common/io/xge/hal/include/xgehal-device.h
331
char *bar0;
usr/src/uts/common/io/xge/hal/include/xgehal-device.h
885
xge_hal_device_bar0_set(xge_hal_device_t *hldev, char *bar0);
usr/src/uts/common/io/xge/hal/include/xgehal-device.h
99
char *bar0;
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device-fp.c
45
return hldev->bar0;
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device-fp.c
79
xge_hal_device_bar0_set(xge_hal_device_t *hldev, char *bar0)
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device-fp.c
81
xge_assert(bar0);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device-fp.c
82
hldev->bar0 = bar0;
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
1005
data1, &bar0->tti_data1_mem);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
1007
&bar0->tti_data1_mem);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
1009
data2, &bar0->tti_data2_mem);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
1011
&bar0->tti_data2_mem);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
1017
&bar0->tti_command_mem);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
1019
if (!runtime && __hal_device_register_poll(hldev, &bar0->tti_command_mem,
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
1030
hldev->regh0, &bar0->tti_data1_mem));
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
1101
xge_hal_pci_bar0_t *bar0;
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
1115
bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->isrbar0;
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
1117
bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
1162
data1, &bar0->rti_data1_mem);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
1164
&bar0->rti_data1_mem);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
1166
data2, &bar0->rti_data2_mem);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
1168
&bar0->rti_data2_mem);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
1176
&bar0->rti_command_mem);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
1179
&bar0->rti_command_mem, 0,
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
1191
hldev->regh0, &bar0->rti_data1_mem));
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
1308
xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
1331
&bar0->dtx_control);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
1341
&bar0->mdio_control);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
1359
xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
1367
&bar0->mac_link_util);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
1382
xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
1406
0xffffffffffffffffULL, &bar0->swapper_ctrl);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
1412
&bar0->swapper_ctrl);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
1428
0xffffffffffffffffULL, &bar0->swapper_ctrl);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
1456
&bar0->swapper_ctrl);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
1459
&bar0->swapper_ctrl);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
1462
&bar0->swapper_ctrl);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
1469
&bar0->pif_rd_swapper_fb);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
1490
xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
1502
&bar0->rts_ctrl);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
1505
val64, &bar0->rts_ctrl);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
1518
xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
1531
&bar0->rts_ctrl);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
1534
val64, &bar0->rts_ctrl);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
1558
&bar0->rts_pn_cam_data);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
1574
&bar0->rts_pn_cam_data);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
1580
val64, &bar0->rts_pn_cam_ctrl);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
1584
&bar0->rts_pn_cam_ctrl, 0,
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
1605
xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
1621
&bar0->rts_ds_mem_data);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
1628
&bar0->rts_ds_mem_ctrl);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
1633
&bar0->rts_ds_mem_ctrl, 0,
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
1651
xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_0);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
1652
xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_1);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
1653
xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_2);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
1654
xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_3);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
1655
xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_4);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
1659
xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_0);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
1660
xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_1);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
1661
xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_2);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
1662
xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_3);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
1664
xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_4);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
1668
xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_0);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
167
xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
1670
xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_1);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
1672
xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_2);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
1674
xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_3);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
1676
xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_4);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
1680
xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_0);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
1681
xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_1);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
1682
xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_2);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
1683
xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_3);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
1685
xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_4);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
1689
xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_0);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
1691
xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_1);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
1693
xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_2);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
1695
xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_3);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
1697
xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_4);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
1701
xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_0);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
1703
xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_1);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
1705
xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_2);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
1707
xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_3);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
1709
xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_4);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
171
(void) __hal_device_register_poll(hldev, &bar0->adapter_status, 1,
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
1713
xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_0);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
1715
xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_1);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
1717
xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_2);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
1719
xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_3);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
1721
xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_4);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
1725
xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_0);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
1726
xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_1);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
1727
xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_2);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
1728
xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_3);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
1730
xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_4);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
182
(void) __hal_device_register_poll(hldev, &bar0->adapter_status, 1,
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
1832
xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
1849
&bar0->rts_ctrl);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
1852
val64, &bar0->rts_ctrl);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
1874
&bar0->rts_rth_map_mem_data);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
1881
&bar0->rts_rth_map_mem_ctrl);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
1885
&bar0->rts_rth_map_mem_ctrl, 0,
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
1901
&bar0->rts_rth_cfg);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
1927
xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
1937
&bar0->rxpic_int_reg);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
1983
if (__hal_device_register_poll(hldev, &bar0->rxpic_int_reg, 1,
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
2020
xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)hldev->bar0;
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
2035
hldev->regh0, &bar0->spdm_bir_offset);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
2049
hldev->spdm_mem_base = (char *)bar0 +
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
2067
hldev->regh0, &bar0->spdm_structure);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
211
xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
2140
hldev->regh0, &bar0->rts_ctrl);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
2143
val64, &bar0->rts_ctrl);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
215
&bar0->adapter_status);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
2155
0, &bar0->rts_rth_hash_mask[i]);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
2159
0, &bar0->rts_rth_hash_mask_5);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
2164
val64, &bar0->rts_rth_status);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
2170
&bar0->rts_rth_cfg);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
224
&bar0->pcc_enable);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
2321
xge_hal_pci_bar0_t *bar0 =
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
2322
(xge_hal_pci_bar0_t *)(void *)hldev->bar0;
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
2324
&bar0->pci_info);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
242
xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
2447
xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
2458
&bar0->misc_int_mask);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
2462
val64, &bar0->misc_int_mask);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
2472
&bar0->adapter_control);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
2476
&bar0->adapter_control);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
2480
&bar0->adapter_control);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
2484
&bar0->adapter_control);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
2489
&bar0->adapter_status);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
2502
&bar0->misc_int_mask);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
2506
&bar0->misc_int_mask);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
2520
if (__hal_device_register_poll(hldev, &bar0->adapter_status, 0,
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
2547
xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
2558
&bar0->misc_int_mask);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
2562
val64, &bar0->misc_int_mask);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
2572
&bar0->adapter_control);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
2576
if (__hal_device_register_poll(hldev, &bar0->adapter_status, 0,
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
2587
&bar0->adapter_control);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
2591
&bar0->adapter_control);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
2600
&bar0->misc_int_mask);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
2604
&bar0->misc_int_mask);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
2641
xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
2646
&bar0->adapter_control);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
269
&bar0->beacon_control);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
272
val64, &bar0->beacon_control);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
275
(void *) ((u8 *)bar0 + 0x2700));
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
2763
xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
2798
&bar0->txreqtimeout);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
2801
&bar0->read_retry_delay);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
2804
&bar0->write_retry_delay);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
2817
&bar0->txreqtimeout);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
2824
&bar0->read_retry_delay);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
2827
&bar0->write_retry_delay);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
2833
&bar0->pic_control_2);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
2837
&bar0->pic_control_2);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
2841
XGE_HAL_SW_RESET_XGXS, &bar0->sw_reset);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
2847
xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, 0, &bar0->sw_reset);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
2849
&bar0->sw_reset);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
2854
&bar0->mac_int_mask);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
2856
&bar0->mc_int_mask);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
2858
&bar0->xgxs_int_mask);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
2881
&bar0->misc_control);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
2886
val64, &bar0->misc_control);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
2890
&bar0->misc_control);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
2895
val64, &bar0->misc_control);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
2975
&bar0->pcc_enable);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
2984
if (__hal_device_register_poll(hldev, &bar0->adapter_status, 1,
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
3001
&bar0->pic_control);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
3004
&bar0->pic_control);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
3023
xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
3043
&bar0->pif_rd_swapper_fb);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
3048
(u32)(XGE_HAL_SW_RESET_ALL>>32), (char *)&bar0->sw_reset);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
3059
&bar0->sw_reset);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
310
xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
3100
&bar0->sw_reset);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
3137
&bar0->sw_reset);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
3161
xge_hal_pci_bar0_t *bar0;
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
3164
bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
3168
&bar0->serr_source);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
3175
&bar0->misc_int_reg);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
3191
&bar0->mac_rmac_err_reg);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
3194
err_reg, &bar0->mac_rmac_err_reg);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
332
xena_fix_mac[i++], &bar0->beacon_control);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
349
xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
353
&bar0->mac_cfg);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
357
XGE_HAL_RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
360
(u32)(val64 >> 32), &bar0->mac_cfg);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
379
xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
383
&bar0->mac_cfg);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
387
XGE_HAL_RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
390
(u32)(val64 >> 32), &bar0->mac_cfg);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
4004
xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
4033
&bar0->misc_control);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
4047
val64, &bar0->misc_control);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
4054
&bar0->misc_int_reg);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
4057
val64, &bar0->misc_int_reg);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
4066
&bar0->mac_rmac_err_reg);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
4069
val64, &bar0->mac_rmac_err_reg);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
407
xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
4080
&bar0->adapter_control);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
4083
&bar0->adapter_control);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
4093
&bar0->adapter_status);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
4097
&bar0->adapter_control);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
4101
&bar0->adapter_control);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
4109
&bar0->adapter_control);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
411
&bar0->pic_control);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
4118
&bar0->adapter_status);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
4122
&bar0->adapter_control);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
4143
&bar0->adapter_control);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
4149
&bar0->adapter_control);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
415
&bar0->pic_control);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
4155
&bar0->adapter_control);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
4166
&bar0->adapter_control);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
4169
val64, &bar0->adapter_control);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
4176
&bar0->adapter_control);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
4180
&bar0->adapter_control);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
4194
&bar0->dtx_control);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
4195
(void) __hal_serial_mem_read64(hldev, &bar0->dtx_control);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
4198
&bar0->dtx_control);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
4199
(void) __hal_serial_mem_read64(hldev, &bar0->dtx_control);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
4202
&bar0->dtx_control);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
4203
(void) __hal_serial_mem_read64(hldev, &bar0->dtx_control);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
4217
&bar0->adapter_status);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
4268
xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
4274
&bar0->adapter_control);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
4277
&bar0->adapter_control);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
4283
if (__hal_device_register_poll(hldev, &bar0->adapter_status, 1,
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
429
xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
433
XGE_HAL_RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
435
&bar0->mac_cfg);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
4368
xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
4372
&bar0->adapter_status);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
4449
xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)hldev->bar0;
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
445
&bar0->rts_rth_cfg) & XGE_HAL_RTS_RTH_EN)) {
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
4452
&bar0->xmsi_mask_reg);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
4459
&bar0->xmsi_mask_reg);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
453
(u32)(val64 >> 32), (char*)&bar0->mac_cfg);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
4580
xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
4610
&bar0->tx_traffic_mask);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
4627
&bar0->rx_traffic_mask);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
4648
&bar0->general_int_mask);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
4677
xge_hal_pci_bar0_t *bar0;
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
4691
bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
4696
&bar0->rmac_addr_data0_mem);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
4699
&bar0->rmac_addr_data1_mem);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
4704
&bar0->rmac_addr_cmd_mem);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
4707
&bar0->rmac_addr_cmd_mem, 0,
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
4732
xge_hal_pci_bar0_t *bar0;
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
474
xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
4746
bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
4751
&bar0->rmac_addr_data0_mem);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
4754
&bar0->rmac_addr_data1_mem);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
4760
&bar0->rmac_addr_cmd_mem);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
4763
&bar0->rmac_addr_cmd_mem, 0,
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
4785
xge_hal_pci_bar0_t *bar0;
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
4789
bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
4794
&bar0->mac_cfg);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
4799
&bar0->rmac_cfg_key);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
4803
&bar0->mac_cfg);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
4824
xge_hal_pci_bar0_t *bar0;
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
4828
bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
4833
&bar0->mac_cfg);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
4838
&bar0->rmac_cfg_key);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
4842
&bar0->mac_cfg);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
4874
xge_hal_pci_bar0_t *bar0;
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
4882
bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
4890
&bar0->rmac_addr_data0_mem);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
4892
&bar0->rmac_addr_data1_mem);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
4897
&bar0->rmac_addr_cmd_mem);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
4901
&bar0->rmac_addr_cmd_mem, 0,
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
4911
&bar0->rmac_addr_cmd_mem);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
4913
if (__hal_device_register_poll(hldev, &bar0->rmac_addr_cmd_mem, 0,
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
4921
&bar0->rmac_addr_data0_mem);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
495
val64, &bar0->mc_pause_thresh_q0q3);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
4959
xge_hal_pci_bar0_t *bar0 =
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
4960
(xge_hal_pci_bar0_t *)(void *)hldev->bar0;
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
497
val64, &bar0->mc_pause_thresh_q4q7);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
4976
&bar0->rmac_addr_data0_mem);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
4980
&bar0->rmac_addr_data1_mem);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
4987
&bar0->rmac_addr_cmd_mem);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
4989
if (__hal_device_register_poll(hldev, &bar0->rmac_addr_cmd_mem, 0,
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
502
&bar0->rmac_pause_cfg);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
514
&bar0->rmac_pause_cfg);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
5181
hldev->isrbar0 = hldev->bar0 = attr->bar0;
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
5202
xge_assert(hldev->bar0);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
523
&bar0->mc_pause_thresh_q0q3);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
532
&bar0->mc_pause_thresh_q4q7);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
5666
xge_hal_pci_bar0_t *bar0 =
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
5667
(xge_hal_pci_bar0_t *)(void *)hldev->bar0;
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
5673
hldev->regh0, &bar0->adapter_control);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
5679
&bar0->adapter_control);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
5759
xge_hal_pci_bar0_t *bar0 =
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
5760
(xge_hal_pci_bar0_t *)(void *)hldev->bar0;
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
5766
&bar0->scheduled_int_ctrl);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
5779
val64, &bar0->scheduled_int_ctrl);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
5891
xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
5899
&bar0->rts_rth_spdm_mem_ctrl);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
5903
&bar0->rts_rth_spdm_mem_ctrl, 0,
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
5911
hldev->regh0, &bar0->rts_rth_spdm_mem_data);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
6076
xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
610
xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
615
hldev->regh0, &bar0->general_int_mask);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
6155
&bar0->rts_rth_jhash_cfg);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
6220
xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
6241
if (__hal_device_register_poll(hldev, &bar0->rxpic_int_reg, 1,
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
625
hldev->regh0, &bar0->pic_int_mask);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
6254
&bar0->rxpic_int_reg);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
6257
&bar0->rxpic_int_reg);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
635
temp64, &bar0->pic_int_mask);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
6422
&bar0->rxpic_int_reg, 1,
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
643
hldev->regh0, &bar0->misc_int_mask);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
6454
xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)hldev->bar0;
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
6462
&bar0->rx_traffic_mask);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
6466
&bar0->rx_traffic_mask);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
647
&bar0->misc_int_mask);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
6480
xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)hldev->bar0;
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
6488
&bar0->tx_traffic_mask);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
6492
&bar0->tx_traffic_mask);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
6511
xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)hldev->bar0;
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
6520
&bar0->rx_mat);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
6523
&bar0->rx_mat);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
6530
&bar0->tx_mat[0]);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
6533
&bar0->tx_mat[0]);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
662
hldev->regh0, &bar0->misc_int_mask);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
6621
xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)hldev->bar0;
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
6626
(u32)(val64 >> 32), &bar0->xmsi_access);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
6628
(u32)(val64), &bar0->xmsi_access);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
6631
&bar0->xmsi_access);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
6638
&bar0->xmsi_data));
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
6640
&bar0->xmsi_address);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
6658
xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)hldev->bar0;
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
6665
&bar0->rx_mat);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
6668
&bar0->rx_mat);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
667
&bar0->misc_int_mask);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
6675
&bar0->tx_mat[0]);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
6678
&bar0->tx_mat[0]);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
677
&bar0->pic_int_mask);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
691
0x0, &bar0->txdma_int_mask);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
6913
xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
6921
&bar0->rts_ctrl);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
6924
val64, &bar0->rts_ctrl);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
693
0x0, &bar0->pfc_err_mask);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
6940
xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
6948
&bar0->rts_ctrl);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
695
0x0, &bar0->tda_err_mask);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
6951
val64, &bar0->rts_ctrl);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
6954
&bar0->rts_rth_cfg);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
697
0x0, &bar0->pcc_err_mask);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
6975
xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
6980
&bar0->rts_default_q);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
6987
&bar0->rts_rth_cfg);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
699
0x0, &bar0->tti_err_mask);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
7001
xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
7006
&bar0->rts_rth_cfg);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
7009
&bar0->rts_rth_cfg);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
701
0x0, &bar0->lso_err_mask);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
7023
xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
7027
&bar0->rts_rth_cfg);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
703
0x0, &bar0->tpa_err_mask);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
7030
&bar0->rts_rth_cfg);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
7048
xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
705
0x0, &bar0->sm_err_mask);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
7057
&bar0->rts_rth_map_mem_data);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
7064
&bar0->rts_rth_map_mem_ctrl);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
7068
&bar0->rts_rth_map_mem_ctrl, 0,
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
7094
xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *) hldev->bar0;
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
7114
&bar0->rts_rth_hash_mask[nreg++]);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
7121
&bar0->rts_rth_hash_mask[nreg++]);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
713
&bar0->txdma_int_mask);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
7151
xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
716
&bar0->pfc_err_mask);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
7167
&bar0->rts_mac_cfg);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
7200
val64, &bar0->rts_mac_cfg);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
7217
xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)hldev->bar0;
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
7223
&bar0->mc_rldram_test_ctrl);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
7228
&bar0->mc_driver);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
7233
&bar0->mc_rldram_mrs);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
7238
&bar0->mc_rldram_mrs);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
7243
&bar0->mc_rldram_test_add);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
7247
&bar0->mc_rldram_test_add_bkg);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
7252
&bar0->mc_rldram_test_ctrl);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
7254
if (__hal_device_register_poll(hldev, &bar0->mc_rldram_test_ctrl, 1,
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
7263
&bar0->mc_rldram_test_ctrl);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
733
&bar0->rxdma_int_mask);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
741
&bar0->rxdma_int_mask);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
757
XGE_HAL_ALL_INTRS_DIS, &bar0->mac_int_mask);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
759
XGE_HAL_ALL_INTRS_DIS, &bar0->mac_rmac_err_mask);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
766
XGE_HAL_ALL_INTRS_DIS, &bar0->mac_int_mask);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
768
XGE_HAL_ALL_INTRS_DIS, &bar0->mac_rmac_err_mask);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
783
XGE_HAL_ALL_INTRS_DIS, &bar0->xgxs_int_mask);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
789
XGE_HAL_ALL_INTRS_DIS, &bar0->xgxs_int_mask);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
804
0x0ULL, &bar0->mc_int_mask);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
811
XGE_HAL_ALL_INTRS_DIS, &bar0->mc_int_mask);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
828
&bar0->tx_traffic_mask);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
836
&bar0->tx_traffic_mask);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
848
&bar0->rx_traffic_mask);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
857
&bar0->rx_traffic_mask);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
867
hldev->regh0, &bar0->txpic_int_mask);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
870
temp64, &bar0->txpic_int_mask);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
877
hldev->regh0, &bar0->txpic_int_mask);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
881
temp64, &bar0->txpic_int_mask);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
891
&bar0->general_int_mask);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
953
xge_hal_pci_bar0_t *bar0;
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
956
bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->isrbar0;
usr/src/uts/common/io/xge/hal/xgehal/xgehal-device.c
958
bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
usr/src/uts/common/io/xge/hal/xgehal/xgehal-fifo.c
343
xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
usr/src/uts/common/io/xge/hal/xgehal/xgehal-fifo.c
352
tx_fifo_partitions[0] = &bar0->tx_fifo_partition_0;
usr/src/uts/common/io/xge/hal/xgehal/xgehal-fifo.c
353
tx_fifo_partitions[1] = &bar0->tx_fifo_partition_1;
usr/src/uts/common/io/xge/hal/xgehal/xgehal-fifo.c
354
tx_fifo_partitions[2] = &bar0->tx_fifo_partition_2;
usr/src/uts/common/io/xge/hal/xgehal/xgehal-fifo.c
355
tx_fifo_partitions[3] = &bar0->tx_fifo_partition_3;
usr/src/uts/common/io/xge/hal/xgehal/xgehal-fifo.c
357
tx_fifo_wrr[0] = &bar0->tx_w_round_robin_0;
usr/src/uts/common/io/xge/hal/xgehal/xgehal-fifo.c
358
tx_fifo_wrr[1] = &bar0->tx_w_round_robin_1;
usr/src/uts/common/io/xge/hal/xgehal/xgehal-fifo.c
359
tx_fifo_wrr[2] = &bar0->tx_w_round_robin_2;
usr/src/uts/common/io/xge/hal/xgehal/xgehal-fifo.c
360
tx_fifo_wrr[3] = &bar0->tx_w_round_robin_3;
usr/src/uts/common/io/xge/hal/xgehal/xgehal-fifo.c
361
tx_fifo_wrr[4] = &bar0->tx_w_round_robin_4;
usr/src/uts/common/io/xge/hal/xgehal/xgehal-fifo.c
445
&bar0->tx_pa_cfg);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-fifo.c
451
&bar0->tx_pa_cfg);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmt.c
1002
&bar0->xmsi_data);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmt.c
1004
&bar0->xmsi_data);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmt.c
1012
&bar0->xmsi_data);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmt.c
1014
&bar0->xmsi_data);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmt.c
1040
xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)hldev->bar0;
usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmt.c
1045
&bar0->adapter_control);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmt.c
1048
&bar0->adapter_control);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmt.c
1051
&bar0->mc_rldram_test_ctrl);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmt.c
1054
&bar0->mc_rldram_test_ctrl);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmt.c
1057
&bar0->mc_rldram_mrs);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmt.c
1059
__hal_serial_mem_write64(hldev, val64, &bar0->i2c_control);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmt.c
1062
__hal_serial_mem_write64(hldev, val64, &bar0->i2c_control);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmt.c
1070
&bar0->mc_rldram_test_d0);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmt.c
1077
&bar0->mc_rldram_test_d1);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmt.c
1084
&bar0->mc_rldram_test_d2);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmt.c
1088
&bar0->mc_rldram_test_add);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmt.c
1093
&bar0->mc_rldram_test_ctrl);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmt.c
1099
&bar0->mc_rldram_test_ctrl);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmt.c
1103
hldev->regh0, &bar0->mc_rldram_test_ctrl);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmt.c
1114
&bar0->mc_rldram_test_ctrl);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmt.c
1119
&bar0->mc_rldram_test_ctrl);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmt.c
1123
hldev->regh0, &bar0->mc_rldram_test_ctrl);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmt.c
1133
&bar0->mc_rldram_test_ctrl);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmt.c
1161
xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)hldev->bar0;
usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmt.c
1171
&bar0->mac_cfg);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmt.c
1177
(u32)(val64 >> 32), (char*)&bar0->mac_cfg);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmt.c
1186
__hal_serial_mem_write64(hldev, val64, &bar0->mdio_control);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmt.c
1189
__hal_serial_mem_write64(hldev, val64, &bar0->mdio_control);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmt.c
1196
__hal_serial_mem_write64(hldev, val64, &bar0->mdio_control);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmt.c
1199
__hal_serial_mem_write64(hldev, val64, &bar0->mdio_control);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmt.c
1201
val64 = __hal_serial_mem_read64(hldev, &bar0->mdio_control);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmt.c
1217
__hal_serial_mem_write64(hldev, val64, &bar0->mdio_control);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmt.c
1220
__hal_serial_mem_write64(hldev, val64, &bar0->mdio_control);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmt.c
1228
__hal_serial_mem_write64(hldev, val64, &bar0->mdio_control);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmt.c
1231
__hal_serial_mem_write64(hldev, val64, &bar0->mdio_control);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmt.c
1238
__hal_serial_mem_write64(hldev, val64, &bar0->mdio_control);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmt.c
1241
__hal_serial_mem_write64(hldev, val64, &bar0->mdio_control);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmt.c
1250
xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)hldev->bar0;
usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmt.c
1260
__hal_serial_mem_write64(hldev, val64, &bar0->mdio_control);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmt.c
1263
__hal_serial_mem_write64(hldev, val64, &bar0->mdio_control);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmt.c
1266
val64 = __hal_serial_mem_read64(hldev, &bar0->mdio_control);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmt.c
1278
__hal_serial_mem_write64(hldev, val64, &bar0->mdio_control);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmt.c
1281
__hal_serial_mem_write64(hldev, val64, &bar0->mdio_control);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmt.c
1287
val64 = __hal_serial_mem_read64(hldev, &bar0->mdio_control);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmt.c
1304
xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)hldev->bar0;
usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmt.c
1312
__hal_serial_mem_write64(hldev, val64, &bar0->mdio_control);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmt.c
1315
__hal_serial_mem_write64(hldev, val64, &bar0->mdio_control);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmt.c
1319
val64 = __hal_serial_mem_read64(hldev, &bar0->mdio_control);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmt.c
1336
__hal_serial_mem_write64(hldev, val64, &bar0->mdio_control);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmt.c
1339
__hal_serial_mem_write64(hldev, val64, &bar0->mdio_control);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmt.c
1345
val64 = __hal_serial_mem_read64(hldev, &bar0->mdio_control);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmt.c
1480
xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)hldev->bar0;
usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmt.c
1484
&bar0->adapter_status);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmt.c
149
(void *)(hldev->bar0 + offset));
usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmt.c
1505
xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)hldev->bar0;
usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmt.c
1509
&bar0->rmac_pause_cfg);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmt.c
1533
xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)hldev->bar0;
usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmt.c
1537
&bar0->rmac_pause_cfg);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmt.c
1547
val64, &bar0->rmac_pause_cfg);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmt.c
206
(void *)(hldev->bar0 + offset));
usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmt.c
500
xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)hldev->bar0;
usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmt.c
505
addr = (reg == 1)? (&bar0->ring_bump_counter2) :
usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmt.c
506
(&bar0->ring_bump_counter1);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmt.c
780
xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)hldev->bar0;
usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmt.c
795
&bar0->adapter_control);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmt.c
803
&bar0->adapter_control);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmt.c
819
&bar0->beacon_control);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmt.c
822
val64, &bar0->beacon_control);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmt.c
836
xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)hldev->bar0;
usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmt.c
846
&bar0->adapter_control);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmt.c
849
&bar0->adapter_control);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmt.c
861
&bar0->beacon_control);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmt.c
864
&bar0->beacon_control);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmt.c
886
xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)hldev->bar0;
usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmt.c
893
__hal_serial_mem_write64(hldev, val64, &bar0->i2c_control);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmt.c
896
val64 = __hal_serial_mem_read64(hldev, &bar0->i2c_control);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmt.c
930
xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)hldev->bar0;
usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmt.c
937
__hal_serial_mem_write64(hldev, val64, &bar0->i2c_control);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmt.c
940
val64 = __hal_serial_mem_read64(hldev, &bar0->i2c_control);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmt.c
968
xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)hldev->bar0;
usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmt.c
973
&bar0->pif_rd_swapper_fb);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmt.c
980
&bar0->rmac_pause_cfg);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmt.c
987
&bar0->rx_queue_cfg);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-mgmt.c
994
&bar0->xgxs_efifo_cfg);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-ring.c
386
xge_hal_pci_bar0_t *bar0;
usr/src/uts/common/io/xge/hal/xgehal/xgehal-ring.c
395
bar0 = (xge_hal_pci_bar0_t *) (void *)
usr/src/uts/common/io/xge/hal/xgehal/xgehal-ring.c
396
((xge_hal_device_t *)ring->channel.devh)->bar0;
usr/src/uts/common/io/xge/hal/xgehal/xgehal-ring.c
411
val64, &bar0->prc_rxd0_n[ring->channel.post_qid]);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-ring.c
417
ring->channel.regh0, &bar0->prc_ctrl_n[ring->channel.post_qid]);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-ring.c
441
val64, &bar0->prc_ctrl_n[ring->channel.post_qid]);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-ring.c
445
ring->channel.regh0, &bar0->rx_pa_cfg);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-ring.c
453
val64, &bar0->rx_pa_cfg);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-ring.c
463
xge_hal_pci_bar0_t *bar0;
usr/src/uts/common/io/xge/hal/xgehal/xgehal-ring.c
468
bar0 = (xge_hal_pci_bar0_t *) (void *)
usr/src/uts/common/io/xge/hal/xgehal/xgehal-ring.c
469
((xge_hal_device_t *)ring->channel.devh)->bar0;
usr/src/uts/common/io/xge/hal/xgehal/xgehal-ring.c
473
&bar0->prc_ctrl_n[ring->channel.post_qid]);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-ring.c
476
val64, &bar0->prc_ctrl_n[ring->channel.post_qid]);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-ring.c
483
xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
usr/src/uts/common/io/xge/hal/xgehal/xgehal-ring.c
497
&bar0->rx_queue_priority);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-ring.c
509
&bar0->rx_queue_cfg);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-ring.c
522
&bar0->rts_qos_steering);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-ring.c
534
&bar0->rts_qos_steering);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-ring.c
550
&bar0->rts_frm_len_n[i]);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-ring.c
555
((u8 *)bar0 + 0x2e60)); /* mc_rldram_mrs_herc */
usr/src/uts/common/io/xge/hal/xgehal/xgehal-ring.c
558
((u8 *)bar0 + 0x2e60));
usr/src/uts/common/io/xge/hal/xgehal/xgehal-ring.c
562
((u8 *)bar0 + 0x2e40)); /* mc_rldram_ref_herc */
usr/src/uts/common/io/xge/hal/xgehal/xgehal-ring.c
568
&bar0->mc_rldram_mrs);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-ring.c
572
&bar0->mc_rldram_mrs);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-ring.c
575
&bar0->mc_rldram_mrs);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-ring.c
584
&bar0->mc_rldram_ref_per_herc);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-ring.c
587
&bar0->mc_rldram_mrs_herc);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-ring.c
593
&bar0->mc_rldram_mrs_herc);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-ring.c
638
xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
usr/src/uts/common/io/xge/hal/xgehal/xgehal-ring.c
648
&bar0->rts_frm_len_n[i]);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-ring.c
652
&bar0->rts_frm_len_n[i]);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-ring.c
657
&bar0->rmac_max_pyld_len);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-stats.c
217
xge_hal_pci_bar0_t *bar0;
usr/src/uts/common/io/xge/hal/xgehal/xgehal-stats.c
224
bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
usr/src/uts/common/io/xge/hal/xgehal/xgehal-stats.c
227
&bar0->stat_cfg);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-stats.c
230
&bar0->stat_cfg);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-stats.c
233
&bar0->stat_cfg);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-stats.c
308
xge_hal_pci_bar0_t *bar0;
usr/src/uts/common/io/xge/hal/xgehal/xgehal-stats.c
317
bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
usr/src/uts/common/io/xge/hal/xgehal/xgehal-stats.c
323
stats->dma_addr, &bar0->stat_addr);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-stats.c
335
val64, &bar0->stat_byte_cnt);
usr/src/uts/common/io/xge/hal/xgehal/xgehal-stats.c
356
val64, &bar0->stat_cfg);
usr/src/uts/intel/io/vmxnet3s/vmxnet3.h
125
caddr_t bar0, bar1;
usr/src/uts/intel/io/vmxnet3s/vmxnet3.h
227
ddi_get32((Device)->bar0Handle, (uint32_t *)((Device)->bar0 + (Reg)))
usr/src/uts/intel/io/vmxnet3s/vmxnet3.h
229
ddi_put32((Device)->bar0Handle, (uint32_t *)((Device)->bar0 + (Reg)), \
usr/src/uts/intel/io/vmxnet3s/vmxnet3_main.c
1298
if (ddi_regs_map_setup(dip, 1, &dp->bar0, 0, 0, &vmxnet3_dev_attr,
usr/src/uts/sun4u/io/pci/db21554.c
1633
ph->bar0 = pci_config_get32(config_handle, hdr_off + PCI_CONF_BASE0);
usr/src/uts/sun4u/sys/pci/db21554_config.h
231
uint32_t bar0;