usr/src/cmd/mdb/i86pc/modules/apix/apix.c

157

{ "apic", NULL, "print apic register contents", apic },

usr/src/cmd/mdb/i86pc/modules/common/intr_common.h

55

int apic(uintptr_t addr, uint_t flags, int argc, const mdb_arg_t *argv);

usr/src/cmd/mdb/i86pc/modules/pcplusmp/pcplusmp.c

103

{ "apic", NULL, "print apic register contents", apic },

usr/src/uts/i86pc/io/acpi/acpidev/acpidev_dr.c

2444

arg.arg.apic.apic_id = apicid;

usr/src/uts/i86pc/io/acpi/acpidev/acpidev_dr.c

2445

arg.arg.apic.proc_id = procid;

usr/src/uts/i86pc/io/pcplusmp/apic_common.c

920

localid = ap->arg.apic.apic_id;

usr/src/uts/i86pc/io/pcplusmp/apic_common.c

921

procid = ap->arg.apic.proc_id;

usr/src/uts/i86pc/io/pcplusmp/apic_common.c

931

localid = ap->arg.apic.apic_id;

usr/src/uts/i86pc/io/pcplusmp/apic_common.c

932

procid = ap->arg.apic.proc_id;

usr/src/uts/i86pc/sys/machsystm.h

69

} apic;

usr/src/uts/i86xpv/io/psm/xpv_psm.c

1516

physdev_apic_t apic;

usr/src/uts/i86xpv/io/psm/xpv_psm.c

1518

apic.apic_physbase = (unsigned long)apic_physaddr[apic_ix];

usr/src/uts/i86xpv/io/psm/xpv_psm.c

1519

apic.reg = reg;

usr/src/uts/i86xpv/io/psm/xpv_psm.c

1520

if (HYPERVISOR_physdev_op(PHYSDEVOP_apic_read, &apic))

usr/src/uts/i86xpv/io/psm/xpv_psm.c

1522

return (apic.value);

usr/src/uts/i86xpv/io/psm/xpv_psm.c

1528

physdev_apic_t apic;

usr/src/uts/i86xpv/io/psm/xpv_psm.c

1530

apic.apic_physbase = (unsigned long)apic_physaddr[apic_ix];

usr/src/uts/i86xpv/io/psm/xpv_psm.c

1531

apic.reg = reg;

usr/src/uts/i86xpv/io/psm/xpv_psm.c

1532

apic.value = value;

usr/src/uts/i86xpv/io/psm/xpv_psm.c

1533

if (HYPERVISOR_physdev_op(PHYSDEVOP_apic_write, &apic))

usr/src/uts/i86xpv/io/psm/xpv_psm.c

1543

physdev_apic_t apic;

usr/src/uts/i86xpv/io/psm/xpv_psm.c

1545

apic.apic_physbase = (unsigned long)apic_physaddr[apic_ix];

usr/src/uts/i86xpv/io/psm/xpv_psm.c

1546

apic.reg = APIC_IO_EOI;

usr/src/uts/i86xpv/io/psm/xpv_psm.c

1547

apic.value = value;

usr/src/uts/i86xpv/io/psm/xpv_psm.c

1548

if (HYPERVISOR_physdev_op(PHYSDEVOP_apic_write, &apic))

usr/src/uts/intel/io/amdzen/amdzen.c

1480

amdzen_apic_decomp_t *apic = &azn->azn_apic_decomp;

usr/src/uts/intel/io/amdzen/amdzen.c

1505

apic->aad_thread_shift = 0;

usr/src/uts/intel/io/amdzen/amdzen.c

1506

apic->aad_thread_mask = (1 << nthr_bits) - 1;

usr/src/uts/intel/io/amdzen/amdzen.c

1508

apic->aad_core_shift = nthr_bits;

usr/src/uts/intel/io/amdzen/amdzen.c

1510

apic->aad_core_mask = (1 << ncore_bits) - 1;

usr/src/uts/intel/io/amdzen/amdzen.c

1511

apic->aad_core_mask <<= apic->aad_core_shift;

usr/src/uts/intel/io/amdzen/amdzen.c

1513

apic->aad_core_mask = 0;

usr/src/uts/intel/io/amdzen/amdzen.c

1522

apic->aad_ccx_shift = apic->aad_core_shift + ncore_bits;

usr/src/uts/intel/io/amdzen/amdzen.c

1523

if (extccx != 0 && apic->aad_ccx_shift < 4) {

usr/src/uts/intel/io/amdzen/amdzen.c

1524

apic->aad_ccx_shift = 4;

usr/src/uts/intel/io/amdzen/amdzen.c

1527

apic->aad_ccx_mask = (1 << nccx_bits) - 1;

usr/src/uts/intel/io/amdzen/amdzen.c

1528

apic->aad_ccx_mask <<= apic->aad_ccx_shift;

usr/src/uts/intel/io/amdzen/amdzen.c

1530

apic->aad_ccx_mask = 0;

usr/src/uts/intel/io/amdzen/amdzen.c

1533

apic->aad_ccd_shift = apic->aad_ccx_shift + nccx_bits;

usr/src/uts/intel/io/amdzen/amdzen.c

1535

apic->aad_ccd_mask = (1 << nccd_bits) - 1;

usr/src/uts/intel/io/amdzen/amdzen.c

1536

apic->aad_ccd_mask <<= apic->aad_ccd_shift;

usr/src/uts/intel/io/amdzen/amdzen.c

1538

apic->aad_ccd_mask = 0;

usr/src/uts/intel/io/amdzen/amdzen.c

1541

apic->aad_sock_shift = apic->aad_ccd_shift + nccd_bits;

usr/src/uts/intel/io/amdzen/amdzen.c

1543

apic->aad_sock_mask = (1 << nsock_bits) - 1;

usr/src/uts/intel/io/amdzen/amdzen.c

1544

apic->aad_sock_mask <<= apic->aad_sock_shift;

usr/src/uts/intel/io/amdzen/amdzen.c

1546

apic->aad_sock_mask = 0;

usr/src/uts/intel/io/amdzen/amdzen.c

1553

apic->aad_die_mask = 0;

usr/src/uts/intel/io/amdzen/amdzen.c

1554

apic->aad_die_shift = 0;

usr/src/uts/intel/io/amdzen/amdzen.c

1716

amdzen_apic_decomp_t *apic = &azn->azn_apic_decomp;

usr/src/uts/intel/io/amdzen/amdzen.c

1722

apic->aad_sock_mask = 0x40;

usr/src/uts/intel/io/amdzen/amdzen.c

1723

apic->aad_sock_shift = 6;

usr/src/uts/intel/io/amdzen/amdzen.c

1724

apic->aad_die_mask = 0x30;

usr/src/uts/intel/io/amdzen/amdzen.c

1725

apic->aad_die_shift = 4;

usr/src/uts/intel/io/amdzen/amdzen.c

1726

apic->aad_ccd_mask = 0;

usr/src/uts/intel/io/amdzen/amdzen.c

1727

apic->aad_ccd_shift = 0;

usr/src/uts/intel/io/amdzen/amdzen.c

1728

apic->aad_ccx_mask = 0x08;

usr/src/uts/intel/io/amdzen/amdzen.c

1729

apic->aad_ccx_shift = 3;

usr/src/uts/intel/io/amdzen/amdzen.c

1732

apic->aad_core_mask = 0x06;

usr/src/uts/intel/io/amdzen/amdzen.c

1733

apic->aad_core_shift = 1;

usr/src/uts/intel/io/amdzen/amdzen.c

1734

apic->aad_thread_mask = 0x1;

usr/src/uts/intel/io/amdzen/amdzen.c

1735

apic->aad_thread_shift = 0;

usr/src/uts/intel/io/amdzen/amdzen.c

1737

apic->aad_core_mask = 0x03;

usr/src/uts/intel/io/amdzen/amdzen.c

1738

apic->aad_core_shift = 0;

usr/src/uts/intel/io/amdzen/amdzen.c

1739

apic->aad_thread_mask = 0;

usr/src/uts/intel/io/amdzen/amdzen.c

1740

apic->aad_thread_shift = 0;

usr/src/uts/intel/io/amdzen/amdzen.c

1745

apic->aad_sock_mask = 0x80;

usr/src/uts/intel/io/amdzen/amdzen.c

1746

apic->aad_sock_shift = 7;

usr/src/uts/intel/io/amdzen/amdzen.c

1747

apic->aad_die_mask = 0;

usr/src/uts/intel/io/amdzen/amdzen.c

1748

apic->aad_die_shift = 0;

usr/src/uts/intel/io/amdzen/amdzen.c

1749

apic->aad_ccd_mask = 0x70;

usr/src/uts/intel/io/amdzen/amdzen.c

1750

apic->aad_ccd_shift = 4;

usr/src/uts/intel/io/amdzen/amdzen.c

1751

apic->aad_ccx_mask = 0x08;

usr/src/uts/intel/io/amdzen/amdzen.c

1752

apic->aad_ccx_shift = 3;

usr/src/uts/intel/io/amdzen/amdzen.c

1753

apic->aad_core_mask = 0x06;

usr/src/uts/intel/io/amdzen/amdzen.c

1754

apic->aad_core_shift = 1;

usr/src/uts/intel/io/amdzen/amdzen.c

1755

apic->aad_thread_mask = 0x01;

usr/src/uts/intel/io/amdzen/amdzen.c

1756

apic->aad_thread_shift = 0;

usr/src/uts/intel/io/amdzen/amdzen.c

1758

apic->aad_sock_mask = 0x40;

usr/src/uts/intel/io/amdzen/amdzen.c

1759

apic->aad_sock_shift = 6;

usr/src/uts/intel/io/amdzen/amdzen.c

1760

apic->aad_die_mask = 0;

usr/src/uts/intel/io/amdzen/amdzen.c

1761

apic->aad_die_shift = 0;

usr/src/uts/intel/io/amdzen/amdzen.c

1762

apic->aad_ccd_mask = 0x38;

usr/src/uts/intel/io/amdzen/amdzen.c

1763

apic->aad_ccd_shift = 3;

usr/src/uts/intel/io/amdzen/amdzen.c

1764

apic->aad_ccx_mask = 0x04;

usr/src/uts/intel/io/amdzen/amdzen.c

1765

apic->aad_ccx_shift = 2;

usr/src/uts/intel/io/amdzen/amdzen.c

1766

apic->aad_core_mask = 0x3;

usr/src/uts/intel/io/amdzen/amdzen.c

1767

apic->aad_core_shift = 0;

usr/src/uts/intel/io/amdzen/amdzen.c

1768

apic->aad_thread_mask = 0;

usr/src/uts/intel/io/amdzen/amdzen.c

1769

apic->aad_thread_shift = 0;