usr/src/uts/intel/io/vmm/amd/amdvi_hw.c

1308

struct amdvi_ctrl *ctrl;

usr/src/uts/intel/io/vmm/amd/amdvi_hw.c

1343

struct amdvi_ctrl *ctrl;

usr/src/uts/intel/io/vmm/amd/amdvi_hw.c

232

struct amdvi_ctrl *ctrl = softc->ctrl;

usr/src/uts/intel/io/vmm/amd/amdvi_hw.c

263

struct amdvi_ctrl *ctrl;

usr/src/uts/intel/io/vmm/amd/amdvi_hw.c

284

struct amdvi_ctrl *ctrl;

usr/src/uts/intel/io/vmm/amd/amdvi_hw.c

442

struct amdvi_ctrl *ctrl = softc->ctrl;

usr/src/uts/intel/io/vmm/amd/amdvi_hw.c

470

struct amdvi_ctrl *ctrl;

usr/src/uts/intel/io/vmm/amd/amdvi_hw.c

496

struct amdvi_ctrl *ctrl;

usr/src/uts/intel/io/vmm/amd/amdvi_hw.c

520

struct amdvi_ctrl *ctrl;

usr/src/uts/intel/io/vmm/amd/amdvi_hw.c

686

struct amdvi_ctrl *ctrl;

usr/src/uts/intel/io/vmm/amd/amdvi_hw.c

707

struct amdvi_ctrl *ctrl;

usr/src/uts/intel/io/vmm/amd/amdvi_hw.c

751

struct amdvi_ctrl *ctrl;

usr/src/uts/intel/io/vmm/amd/amdvi_hw.c

781

struct amdvi_ctrl *ctrl;

usr/src/uts/intel/io/vmm/amd/amdvi_priv.h

251

CTASSERT(offsetof(struct amdvi_ctrl, pad1)== 0x58);

usr/src/uts/intel/io/vmm/amd/amdvi_priv.h

252

CTASSERT(offsetof(struct amdvi_ctrl, pad2)== 0x2028);

usr/src/uts/intel/io/vmm/amd/amdvi_priv.h

253

CTASSERT(offsetof(struct amdvi_ctrl, pad3)== 0x2040);

usr/src/uts/intel/io/vmm/amd/amdvi_priv.h

261

CTASSERT(sizeof(struct amdvi_ctrl) == 0x4000);

usr/src/uts/intel/io/vmm/amd/amdvi_priv.h

262

CTASSERT(sizeof(struct amdvi_ctrl) == AMDVI_MMIO_V1_SIZE);

usr/src/uts/intel/io/vmm/amd/amdvi_priv.h

377

struct amdvi_ctrl *ctrl; /* Control area. */

usr/src/uts/intel/io/vmm/amd/ivrs_drv.c

678

softc->ctrl = (struct amdvi_ctrl *) PHYS_TO_DMAP(ivhd->BaseAddress);