amd_iommu_page_table_hash
amd_iommu_page_table_hash_t amd_iommu_page_table_hash;
if (amd_iommu_page_table_hash_init(&amd_iommu_page_table_hash)
amd_iommu_page_table_hash_fini(&amd_iommu_page_table_hash);
amd_iommu_page_table_hash_fini(&amd_iommu_page_table_hash);
extern amd_iommu_page_table_hash_t amd_iommu_page_table_hash;
mutex_enter(&amd_iommu_page_table_hash.ampt_lock);
pt->pt_next = amd_iommu_page_table_hash.ampt_hash[idx];
amd_iommu_page_table_hash.ampt_hash[idx] = pt;
mutex_exit(&amd_iommu_page_table_hash.ampt_lock);
mutex_enter(&amd_iommu_page_table_hash.ampt_lock);
amd_iommu_page_table_hash.ampt_hash[idx] = pt->pt_next;
mutex_exit(&amd_iommu_page_table_hash.ampt_lock);
mutex_enter(&amd_iommu_page_table_hash.ampt_lock);
pt = amd_iommu_page_table_hash.ampt_hash[idx];
mutex_exit(&amd_iommu_page_table_hash.ampt_lock);