usr/src/boot/libsa/arp.c

102

ah = &wbuf.data.arp;

usr/src/boot/libsa/arp.c

103

ah->arp_hrd = htons(ARPHRD_ETHER);

usr/src/boot/libsa/arp.c

104

ah->arp_pro = htons(ETHERTYPE_IP);

usr/src/boot/libsa/arp.c

105

ah->arp_hln = sizeof (ah->arp_sha); /* hardware address length */

usr/src/boot/libsa/arp.c

106

ah->arp_pln = sizeof (ah->arp_spa); /* protocol address length */

usr/src/boot/libsa/arp.c

107

ah->arp_op = htons(ARPOP_REQUEST);

usr/src/boot/libsa/arp.c

108

MACPY(d->myea, ah->arp_sha);

usr/src/boot/libsa/arp.c

109

bcopy(&d->myip, ah->arp_spa, sizeof (ah->arp_spa));

usr/src/boot/libsa/arp.c

111

bcopy(&addr, ah->arp_tpa, sizeof (ah->arp_tpa));

usr/src/boot/libsa/arp.c

117

ah = NULL;

usr/src/boot/libsa/arp.c

120

arprecv, &pkt, (void **)&ah, NULL);

usr/src/boot/libsa/arp.c

133

inet_ntoa(addr), ether_sprintf(ah->arp_sha));

usr/src/boot/libsa/arp.c

136

MACPY(ah->arp_sha, al->ea);

usr/src/boot/libsa/arp.c

163

struct ether_arp *ah;

usr/src/boot/libsa/arp.c

173

n = readether(d, &ptr, (void **)&ah, tleft, &etype);

usr/src/boot/libsa/arp.c

194

if (ah->arp_hrd != htons(ARPHRD_ETHER) ||

usr/src/boot/libsa/arp.c

195

ah->arp_pro != htons(ETHERTYPE_IP) ||

usr/src/boot/libsa/arp.c

196

ah->arp_hln != sizeof (ah->arp_sha) ||

usr/src/boot/libsa/arp.c

197

ah->arp_pln != sizeof (ah->arp_spa)) {

usr/src/boot/libsa/arp.c

206

if (ah->arp_op == htons(ARPOP_REQUEST)) {

usr/src/boot/libsa/arp.c

211

arp_reply(d, ah);

usr/src/boot/libsa/arp.c

216

if (ah->arp_op != htons(ARPOP_REPLY)) {

usr/src/boot/libsa/arp.c

226

if (bcmp(&arp_list[arp_num].addr, ah->arp_spa, sizeof (ah->arp_spa))) {

usr/src/boot/libsa/arp.c

242

*payload = ah;

usr/src/boot/libsa/arp.c

74

struct ether_arp *ah;

usr/src/boot/libsa/ip.c

458

struct arphdr *ah = data;

usr/src/boot/libsa/ip.c

465

if (ah->ar_op == htons(ARPOP_REQUEST)) {

usr/src/boot/libsa/ip.c

467

arp_reply(d, ah);

usr/src/cmd/cmd-inet/usr.bin/pppd/auth.c

1680

u_int32_t a, mask, newmask, ah, offset;

usr/src/cmd/cmd-inet/usr.bin/pppd/auth.c

1763

ah = np->n_net;

usr/src/cmd/cmd-inet/usr.bin/pppd/auth.c

1765

if ((ah & 0xff000000ul) == 0)

usr/src/cmd/cmd-inet/usr.bin/pppd/auth.c

1766

ah <<= 8, newmask <<= 8;

usr/src/cmd/cmd-inet/usr.bin/pppd/auth.c

1767

if ((ah & 0xff000000ul) == 0)

usr/src/cmd/cmd-inet/usr.bin/pppd/auth.c

1768

ah <<= 8, newmask <<= 8;

usr/src/cmd/cmd-inet/usr.bin/pppd/auth.c

1769

if ((ah & 0xff000000ul) == 0)

usr/src/cmd/cmd-inet/usr.bin/pppd/auth.c

1770

ah <<= 8, newmask <<= 8;

usr/src/cmd/cmd-inet/usr.bin/pppd/auth.c

1773

a = htonl(ah);

usr/src/cmd/cmd-inet/usr.lib/ilbd/ilbd_hc.c

112

adt_session_data_t *ah;

usr/src/cmd/cmd-inet/usr.lib/ilbd/ilbd_hc.c

129

if (adt_start_session(&ah, NULL, 0) != 0) {

usr/src/cmd/cmd-inet/usr.lib/ilbd/ilbd_hc.c

133

if (adt_set_from_ucred(ah, ucredp, ADT_NEW) != 0) {

usr/src/cmd/cmd-inet/usr.lib/ilbd/ilbd_hc.c

134

(void) adt_end_session(ah);

usr/src/cmd/cmd-inet/usr.lib/ilbd/ilbd_hc.c

143

if ((event = adt_alloc_event(ah, flag)) == NULL) {

usr/src/cmd/cmd-inet/usr.lib/ilbd/ilbd_hc.c

193

(void) adt_end_session(ah);

usr/src/cmd/cmd-inet/usr.lib/ilbd/ilbd_rules.c

507

adt_session_data_t *ah;

usr/src/cmd/cmd-inet/usr.lib/ilbd/ilbd_rules.c

528

if (adt_start_session(&ah, NULL, 0) != 0) {

usr/src/cmd/cmd-inet/usr.lib/ilbd/ilbd_rules.c

532

if (adt_set_from_ucred(ah, ucredp, ADT_NEW) != 0) {

usr/src/cmd/cmd-inet/usr.lib/ilbd/ilbd_rules.c

533

(void) adt_end_session(ah);

usr/src/cmd/cmd-inet/usr.lib/ilbd/ilbd_rules.c

546

if ((event = adt_alloc_event(ah, flag)) == NULL) {

usr/src/cmd/cmd-inet/usr.lib/ilbd/ilbd_rules.c

729

(void) adt_end_session(ah);

usr/src/cmd/cmd-inet/usr.lib/ilbd/ilbd_sg.c

158

adt_session_data_t *ah;

usr/src/cmd/cmd-inet/usr.lib/ilbd/ilbd_sg.c

173

if (adt_start_session(&ah, NULL, 0) != 0) {

usr/src/cmd/cmd-inet/usr.lib/ilbd/ilbd_sg.c

178

if (adt_set_from_ucred(ah, ucredp, ADT_NEW) != 0) {

usr/src/cmd/cmd-inet/usr.lib/ilbd/ilbd_sg.c

179

(void) adt_end_session(ah);

usr/src/cmd/cmd-inet/usr.lib/ilbd/ilbd_sg.c

197

if ((event = adt_alloc_event(ah, flag)) == NULL) {

usr/src/cmd/cmd-inet/usr.lib/ilbd/ilbd_sg.c

285

(void) adt_end_session(ah);

usr/src/cmd/cmd-inet/usr.sbin/ilbadm/ilbadm_subr.c

252

uint64_t al, ah;

usr/src/cmd/cmd-inet/usr.sbin/ilbadm/ilbadm_subr.c

254

ah = INV6_N2H_MSB64(a);

usr/src/cmd/cmd-inet/usr.sbin/ilbadm/ilbadm_subr.c

260

ah++;

usr/src/cmd/cmd-inet/usr.sbin/ilbadm/ilbadm_subr.c

264

ah--;

usr/src/cmd/cmd-inet/usr.sbin/ilbadm/ilbadm_subr.c

267

INV6_H2N_MSB64(&ia6, ah);

usr/src/cmd/cmd-inet/usr.sbin/in.rlogind.c

161

adt_session_data_t *ah;

usr/src/cmd/cmd-inet/usr.sbin/in.rlogind.c

165

if ((rc = adt_start_session(&ah, NULL, 0)) == 0) {

usr/src/cmd/cmd-inet/usr.sbin/in.rlogind.c

167

if ((rc = adt_set_user(ah, ADT_NO_AUDIT,

usr/src/cmd/cmd-inet/usr.sbin/in.rlogind.c

170

(void) adt_set_proc(ah);

usr/src/cmd/cmd-inet/usr.sbin/in.rlogind.c

173

(void) adt_end_session(ah);

usr/src/cmd/cmd-inet/usr.sbin/in.telnetd.c

2170

adt_session_data_t *ah;

usr/src/cmd/cmd-inet/usr.sbin/in.telnetd.c

2174

if ((rc = adt_start_session(&ah, NULL, 0)) == 0) {

usr/src/cmd/cmd-inet/usr.sbin/in.telnetd.c

2176

if ((rc = adt_set_user(ah, ADT_NO_AUDIT,

usr/src/cmd/cmd-inet/usr.sbin/in.telnetd.c

2179

(void) adt_set_proc(ah);

usr/src/cmd/cmd-inet/usr.sbin/in.telnetd.c

2182

(void) adt_end_session(ah);

usr/src/cmd/cmd-inet/usr.sbin/snoop/snoop_ipsec.c

106

ah_t *ah = (ah_t *)hdr;

usr/src/cmd/cmd-inet/usr.sbin/snoop/snoop_ipsec.c

122

aligned_ah = ah;

usr/src/cmd/cmd-inet/usr.sbin/snoop/snoop_ipsec.c

139

auth_data = (uint8_t *)(ah + 1);

usr/src/cmd/cmd-inet/usr.sbin/snoop/snoop_ipsec.c

152

(void) sprintf(get_line((char *)&ah->ah_nexthdr - dlc_header,

usr/src/cmd/cmd-inet/usr.sbin/snoop/snoop_ipsec.c

155

(void) sprintf(get_line((char *)&ah->ah_length - dlc_header, 1),

usr/src/cmd/cmd-inet/usr.sbin/snoop/snoop_ipsec.c

157

(void) sprintf(get_line((char *)&ah->ah_reserved - dlc_header,

usr/src/cmd/cmd-inet/usr.sbin/snoop/snoop_ipsec.c

160

(void) sprintf(get_line((char *)&ah->ah_spi - dlc_header, 4),

usr/src/cmd/cmd-inet/usr.sbin/snoop/snoop_ipsec.c

162

(void) sprintf(get_line((char *)&ah->ah_replay - dlc_header, 4),

usr/src/cmd/dladm/dladm.c

7353

adt_session_data_t *ah;

usr/src/cmd/dladm/dladm.c

7366

if (adt_start_session(&ah, NULL, ADT_USE_PROC_DATA) != 0)

usr/src/cmd/dladm/dladm.c

7369

if ((event = adt_alloc_event(ah, flag)) == NULL)

usr/src/cmd/dladm/dladm.c

7397

(void) adt_end_session(ah);

usr/src/cmd/fm/fmd/common/fmd_mdb.c

1016

fmd_asru_hash_t ah;

usr/src/cmd/fm/fmd/common/fmd_mdb.c

1027

if (mdb_vread(&ah, sizeof (ah), wsp->walk_addr) != sizeof (ah)) {

usr/src/cmd/fm/fmd/common/fmd_mdb.c

1032

return (hash_walk_init(wsp, (uintptr_t)ah.ah_hash, ah.ah_hashlen,

usr/src/cmd/fm/fmd/common/fmd_mdb.c

1070

fmd_asru_hash_t ah;

usr/src/cmd/fm/fmd/common/fmd_mdb.c

1081

if (mdb_vread(&ah, sizeof (ah), wsp->walk_addr) != sizeof (ah)) {

usr/src/cmd/fm/fmd/common/fmd_mdb.c

1086

return (hash_walk_init(wsp, (uintptr_t)ah.ah_rsrc_hash, ah.ah_hashlen,

usr/src/cmd/fs.d/autofs/autod_nfs.c

2938

AUTH *ah = NULL;

usr/src/cmd/fs.d/autofs/autod_nfs.c

2972

ah = authsys_create_default();

usr/src/cmd/fs.d/autofs/autod_nfs.c

2973

if (ah != NULL) {

usr/src/cmd/fs.d/autofs/autod_nfs.c

2979

cl->cl_auth = ah;

usr/src/cmd/fs.d/nfs/mount/mount.c

1402

AUTH *ah = NULL;

usr/src/cmd/fs.d/nfs/mount/mount.c

1494

ah = authsys_create_default();

usr/src/cmd/fs.d/nfs/mount/mount.c

1495

if (ah != NULL)

usr/src/cmd/fs.d/nfs/mount/mount.c

1496

cl->cl_auth = ah;

usr/src/cmd/fs.d/nfs/mount/mount.c

1681

if (ah != NULL) {

usr/src/cmd/fs.d/nfs/mount/mount.c

1683

AUTH_DESTROY(ah);

usr/src/cmd/fs.d/nfs/statd/sm_proc.c

329

addr->ah.n_len == regargs->address.n_len &&

usr/src/cmd/fs.d/nfs/statd/sm_proc.c

330

memcmp(addr->ah.n_bytes, regargs->address.n_bytes,

usr/src/cmd/fs.d/nfs/statd/sm_proc.c

331

addr->ah.n_len) == 0) {

usr/src/cmd/fs.d/nfs/statd/sm_proc.c

336

for (i = 0; i < addr->ah.n_len; i++) {

usr/src/cmd/fs.d/nfs/statd/sm_proc.c

338

(unsigned char)addr->ah.n_bytes[i]);

usr/src/cmd/fs.d/nfs/statd/sm_proc.c

381

addr->ah.n_len = regargs->address.n_len;

usr/src/cmd/fs.d/nfs/statd/sm_proc.c

382

addr->ah.n_bytes = tmp_n_bytes;

usr/src/cmd/fs.d/nfs/statd/sm_proc.c

392

(void) memcpy(addr->ah.n_bytes, regargs->address.n_bytes,

usr/src/cmd/fs.d/nfs/statd/sm_proc.c

393

addr->ah.n_len);

usr/src/cmd/fs.d/nfs/statd/sm_proc.c

475

addr->family, &addr->ah);

usr/src/cmd/fs.d/nfs/statd/sm_proc.c

924

ipv4_addr = *(struct in_addr *)addr->ah.n_bytes;

usr/src/cmd/fs.d/nfs/statd/sm_proc.c

929

ipv6_addr = (char *)addr->ah.n_bytes;

usr/src/cmd/fs.d/nfs/statd/sm_statd.c

1292

record_addr(char *name, sa_family_t family, struct netobj *ah)

usr/src/cmd/fs.d/nfs/statd/sm_statd.c

1303

if (ah->n_len != sizeof (struct in_addr))

usr/src/cmd/fs.d/nfs/statd/sm_statd.c

1305

addr = *(struct in_addr *)ah->n_bytes;

usr/src/cmd/fs.d/nfs/statd/sm_statd.c

1307

if (ah->n_len != sizeof (struct in6_addr))

usr/src/cmd/fs.d/nfs/statd/sm_statd.c

1309

addr6 = (char *)ah->n_bytes;

usr/src/cmd/fs.d/nfs/statd/sm_statd.h

118

struct netobj ah;

usr/src/cmd/fs.d/nfs/statd/sm_statd.h

217

extern void record_addr(char *name, sa_family_t family, struct netobj *ah);

usr/src/cmd/fs.d/udfs/fsdb/fsdb.c

518

struct attr_hdr *ah;

usr/src/cmd/fs.d/udfs/fsdb/fsdb.c

650

ah = (struct attr_hdr *)

usr/src/cmd/fs.d/udfs/fsdb/fsdb.c

652

if ((ah->ahdr_atype == SWAP_32(12)) &&

usr/src/cmd/fs.d/udfs/fsdb/fsdb.c

653

(ah->ahdr_astype == 1)) {

usr/src/cmd/fs.d/udfs/fsdb/fsdb.c

655

ds = (struct dev_spec_ear *)ah;

usr/src/cmd/hal/addons/cpufreq/addon-cpufreq.c

599

adt_session_data_t *ah;

usr/src/cmd/hal/addons/cpufreq/addon-cpufreq.c

604

if (adt_start_session (&ah, imported_state, 0) != 0) {

usr/src/cmd/hal/addons/cpufreq/addon-cpufreq.c

609

if ((event = adt_alloc_event (ah, event_id)) == NULL) {

usr/src/cmd/hal/addons/cpufreq/addon-cpufreq.c

644

(void) adt_end_session (ah);

usr/src/cmd/hal/tools/hal-storage-shared.c

706

adt_session_data_t *ah;

usr/src/cmd/hal/tools/hal-storage-shared.c

709

if (adt_start_session(&ah, imported_state, 0) != 0) {

usr/src/cmd/hal/tools/hal-storage-shared.c

713

if ((event = adt_alloc_event(ah, event_id)) == NULL) {

usr/src/cmd/hal/tools/hal-storage-shared.c

751

(void) adt_end_session(ah);

usr/src/cmd/hal/tools/hal-storage-zpool.c

55

adt_session_data_t *ah;

usr/src/cmd/hal/tools/hal-storage-zpool.c

58

if (adt_start_session(&ah, imported_state, 0) != 0) {

usr/src/cmd/hal/tools/hal-storage-zpool.c

62

if ((event = adt_alloc_event(ah, event_id)) == NULL) {

usr/src/cmd/hal/tools/hal-storage-zpool.c

93

(void) adt_end_session(ah);

usr/src/cmd/init/init.c

4532

adt_session_data_t *ah;

usr/src/cmd/init/init.c

4542

if (adt_start_session(&ah, NULL, ADT_USE_PROC_DATA)) {

usr/src/cmd/init/init.c

4546

event = adt_alloc_event(ah, ADT_init_solaris);

usr/src/cmd/init/init.c

4549

(void) adt_end_session(ah);

usr/src/cmd/init/init.c

4556

(void) adt_end_session(ah);

usr/src/cmd/init/init.c

4561

(void) adt_end_session(ah);

usr/src/cmd/login/login_audit.c

108

audit_logout(ah); /* fork to catch logout */

usr/src/cmd/login/login_audit.c

112

(void) adt_end_session(ah);

usr/src/cmd/login/login_audit.c

119

audit_logout(adt_session_data_t *ah)

usr/src/cmd/login/login_audit.c

126

if ((logout = adt_alloc_event(ah, ADT_logout)) == NULL) {

usr/src/cmd/login/login_audit.c

196

(void) adt_end_session(ah);

usr/src/cmd/login/login_audit.c

209

adt_session_data_t *ah;

usr/src/cmd/login/login_audit.c

215

if (adt_start_session(&ah, NULL, ADT_USE_PROC_DATA))

usr/src/cmd/login/login_audit.c

236

if (adt_set_user(ah, uid, gid, uid, gid, p_tid, ADT_NEW)) {

usr/src/cmd/login/login_audit.c

237

(void) adt_end_session(ah);

usr/src/cmd/login/login_audit.c

245

event = adt_alloc_event(ah, event_id);

usr/src/cmd/login/login_audit.c

257

(void) adt_end_session(ah);

usr/src/cmd/login/login_audit.c

61

adt_session_data_t *ah;

usr/src/cmd/login/login_audit.c

67

if (adt_start_session(&ah, NULL, ADT_USE_PROC_DATA)) {

usr/src/cmd/login/login_audit.c

71

if (adt_set_user(ah, pwd->pw_uid, pwd->pw_gid,

usr/src/cmd/login/login_audit.c

74

(void) adt_end_session(ah);

usr/src/cmd/login/login_audit.c

77

event = adt_alloc_event(ah, event_id);

usr/src/cmd/login/login_audit.c

93

(void) adt_end_session(ah);

usr/src/cmd/mdb/common/modules/genunix/gcore.c

307

mdb_anon_hdr_t ah;

usr/src/cmd/mdb/common/modules/genunix/gcore.c

311

if (mdb_ctf_vread(&ah, "struct anon_hdr", "mdb_anon_hdr_t", ah_addr,

usr/src/cmd/mdb/common/modules/genunix/gcore.c

319

if ((ah.size <= ANON_CHUNK_SIZE) || (ah.flags & ANON_ALLOC_FORCE)) {

usr/src/cmd/mdb/common/modules/genunix/gcore.c

320

anon_addr = ah.array_chunk + (sizeof (anon_ptr) * an_idx);

usr/src/cmd/mdb/common/modules/genunix/gcore.c

334

anon_addr = ah.array_chunk + (sizeof (anon_ptr) *

usr/src/cmd/newgrp/newgrp.c

207

adt_session_data_t *ah;

usr/src/cmd/newgrp/newgrp.c

210

if (adt_start_session(&ah, NULL, ADT_USE_PROC_DATA) != 0) {

usr/src/cmd/newgrp/newgrp.c

214

if ((event = adt_alloc_event(ah, ADT_newgrp_login)) == NULL) {

usr/src/cmd/newgrp/newgrp.c

226

(void) adt_end_session(ah);

usr/src/cmd/passwd/passwd.c

1562

(void) adt_end_session(ah);

usr/src/cmd/passwd/passwd.c

1568

(void) adt_end_session(ah);

usr/src/cmd/passwd/passwd.c

186

static adt_session_data_t *ah; /* audit session handle */

usr/src/cmd/passwd/passwd.c

374

if (adt_start_session(&ah, NULL, ADT_USE_PROC_DATA) != 0) {

usr/src/cmd/passwd/passwd.c

378

if ((event = adt_alloc_event(ah, ADT_passwd)) == NULL) {

usr/src/cmd/power/sys-suspend.c

136

pm_audit_event(adt_session_data_t *ah, au_event_t event_id, int status)

usr/src/cmd/power/sys-suspend.c

141

if ((event = adt_alloc_event(ah, event_id)) == NULL) {

usr/src/cmd/power/sys-suspend.c

275

adt_session_data_t *ah = NULL; /* audit session handle */

usr/src/cmd/power/sys-suspend.c

335

if (adt_start_session(&ah, NULL, ADT_USE_PROC_DATA) == 0) {

usr/src/cmd/power/sys-suspend.c

336

if ((event = adt_alloc_event(ah, event_id)) != NULL) {

usr/src/cmd/power/sys-suspend.c

381

if (ah != NULL) {

usr/src/cmd/power/sys-suspend.c

383

((event = adt_alloc_event(ah, ADT_uadmin_thaw))

usr/src/cmd/power/sys-suspend.c

400

pm_do_auth(ah);

usr/src/cmd/power/sys-suspend.c

403

(void) adt_end_session(ah);

usr/src/cmd/power/sys-suspend.c

807

pm_do_auth(adt_session_data_t *ah)

usr/src/cmd/power/sys-suspend.c

841

pm_audit_event(ah, ADT_passwd, err);

usr/src/cmd/power/sys-suspend.c

848

pm_audit_event(ah, ADT_screenunlock, err);

usr/src/cmd/power/sys-suspend.c

851

pm_audit_event(ah, ADT_passwd, 0);

usr/src/cmd/smbsrv/smbd/smbd_logon.c

156

adt_session_data_t *ah = NULL;

usr/src/cmd/smbsrv/smbd/smbd_logon.c

187

if (adt_start_session(&ah, NULL, 0)) {

usr/src/cmd/smbsrv/smbd/smbd_logon.c

192

if ((event = adt_alloc_event(ah, ADT_smbd_session)) == NULL) {

usr/src/cmd/smbsrv/smbd/smbd_logon.c

209

adt_set_termid(ah, &termid);

usr/src/cmd/smbsrv/smbd/smbd_logon.c

211

if (adt_set_user(ah, uid, gid, uid, gid, NULL, ADT_NEW)) {

usr/src/cmd/smbsrv/smbd/smbd_logon.c

232

entry->sa_handle = ah;

usr/src/cmd/smbsrv/smbd/smbd_logon.c

244

(void) adt_end_session(ah);

usr/src/cmd/smbsrv/smbd/smbd_logon.c

306

adt_session_data_t *ah;

usr/src/cmd/smbsrv/smbd/smbd_logon.c

323

ah = entry->sa_handle;

usr/src/cmd/smbsrv/smbd/smbd_logon.c

325

if ((event = adt_alloc_event(ah, ADT_smbd_logoff)) == NULL) {

usr/src/cmd/smbsrv/smbd/smbd_logon.c

338

(void) adt_end_session(ah);

usr/src/cmd/su/su.c

1010

(void) adt_end_session(ah);

usr/src/cmd/su/su.c

1031

adt_session_data_t *ah; /* audit session handle */

usr/src/cmd/su/su.c

1035

if (adt_start_session(&ah, NULL, ADT_USE_PROC_DATA) != 0) {

usr/src/cmd/su/su.c

1043

if (adt_set_user(ah, pwd->pw_uid, pwd->pw_gid, pwd->pw_uid,

usr/src/cmd/su/su.c

1051

if ((event = adt_alloc_event(ah, event_id)) == NULL) {

usr/src/cmd/su/su.c

1078

if ((event = adt_alloc_event(ah, ADT_passwd)) == NULL) {

usr/src/cmd/su/su.c

1088

(void) adt_end_session(ah);

usr/src/cmd/su/su.c

1448

adt_session_data_t *ah; /* audit session handle */

usr/src/cmd/su/su.c

1450

if (adt_start_session(&ah, NULL, ADT_USE_PROC_DATA) != 0) {

usr/src/cmd/su/su.c

1459

if (adt_set_user(ah, pwd->pw_uid, pwd->pw_gid, pwd->pw_uid,

usr/src/cmd/su/su.c

817

adt_session_data_t *ah = NULL;

usr/src/cmd/su/su.c

821

if (adt_start_session(&ah, NULL, ADT_USE_PROC_DATA) != 0) {

usr/src/cmd/su/su.c

830

if (adt_set_user(ah, pwd->pw_uid, pwd->pw_gid, pwd->pw_uid,

usr/src/cmd/su/su.c

835

if ((event = adt_alloc_event(ah, event_id)) == NULL) {

usr/src/cmd/su/su.c

845

if ((event = adt_alloc_event(ah, ADT_passwd)) == NULL) {

usr/src/cmd/su/su.c

860

audit_logout(ah, event_id); /* fork to catch logout */

usr/src/cmd/su/su.c

862

(void) adt_end_session(ah);

usr/src/cmd/su/su.c

876

audit_logout(adt_session_data_t *ah, au_event_t event_id)

usr/src/cmd/su/su.c

888

if ((event = adt_alloc_event(ah, event_id)) == NULL) {

usr/src/cmd/sunpc/other/dos2unix.c

327

regs.h.ah = 0x66; /* get/set global code page */

usr/src/cmd/sunpc/other/unix2dos.c

332

regs.h.ah = 0x66; /* get/set global code page */

usr/src/cmd/uadmin/uadmin.c

126

(event = adt_alloc_event(ah, event_id)) == NULL) {

usr/src/cmd/uadmin/uadmin.c

291

if ((event = adt_alloc_event(ah, ADT_uadmin_thaw)) == NULL) {

usr/src/cmd/uadmin/uadmin.c

302

(void) adt_end_session(ah);

usr/src/cmd/uadmin/uadmin.c

65

adt_session_data_t *ah; /* audit session handle */

usr/src/cmd/uadmin/uadmin.c

93

if (adt_start_session(&ah, NULL, ADT_USE_PROC_DATA) != 0) {

usr/src/cmd/vscan/vscand/vs_svc.c

386

adt_session_data_t *ah;

usr/src/cmd/vscan/vscand/vs_svc.c

390

if (adt_start_session(&ah, NULL, ADT_USE_PROC_DATA)) {

usr/src/cmd/vscan/vscand/vs_svc.c

401

if (adt_set_user(ah, ADT_NO_ATTRIB, ADT_NO_ATTRIB, ADT_NO_ATTRIB,

usr/src/cmd/vscan/vscand/vs_svc.c

404

(void) adt_end_session(ah);

usr/src/cmd/vscan/vscand/vs_svc.c

408

if ((event = adt_alloc_event(ah, ADT_vscan_quarantine)) == NULL) {

usr/src/cmd/vscan/vscand/vs_svc.c

411

(void) adt_end_session(ah);

usr/src/cmd/vscan/vscand/vs_svc.c

430

(void) adt_end_session(ah);

usr/src/cmd/vt/vtdaemon.c

1311

vt_audit_start(adt_session_data_t **ah, pid_t pid)

usr/src/cmd/vt/vtdaemon.c

1315

if (adt_start_session(ah, NULL, 0))

usr/src/cmd/vt/vtdaemon.c

1319

(void) adt_end_session(*ah);

usr/src/cmd/vt/vtdaemon.c

1323

if (adt_set_from_ucred(*ah, uc, ADT_NEW)) {

usr/src/cmd/vt/vtdaemon.c

1325

(void) adt_end_session(*ah);

usr/src/cmd/vt/vtdaemon.c

1337

vt_audit_event(adt_session_data_t *ah, au_event_t event_id, int status)

usr/src/cmd/vt/vtdaemon.c

1342

if ((event = adt_alloc_event(ah, event_id)) == NULL) {

usr/src/cmd/vt/vtdaemon.c

1361

adt_session_data_t *ah;

usr/src/cmd/vt/vtdaemon.c

1383

if (vt_audit_start(&ah, pid) != 0) {

usr/src/cmd/vt/vtdaemon.c

1394

vt_ah_array[source_vt - 1] = ah;

usr/src/cmd/vt/vtdaemon.c

1396

vt_audit_event(ah, ADT_screenlock, PAM_SUCCESS);

usr/src/cmd/vt/vtdaemon.c

689

adt_session_data_t *ah;

usr/src/cmd/vt/vtdaemon.c

717

ah = vt_ah_array[target_vt - 1];

usr/src/cmd/vt/vtdaemon.c

777

vt_audit_event(ah, ADT_passwd, err);

usr/src/cmd/vt/vtdaemon.c

789

vt_audit_event(ah, ADT_screenunlock, err);

usr/src/cmd/vt/vtdaemon.c

808

vt_audit_event(ah, ADT_screenunlock, err);

usr/src/cmd/vt/vtdaemon.c

813

(void) adt_end_session(ah);

usr/src/cmd/zoneadmd/zoneadmd.c

1158

adt_session_data_t *ah;

usr/src/cmd/zoneadmd/zoneadmd.c

1173

if (adt_start_session(&ah, NULL, 0)) {

usr/src/cmd/zoneadmd/zoneadmd.c

1177

if (adt_set_from_ucred(ah, uc, ADT_NEW)) {

usr/src/cmd/zoneadmd/zoneadmd.c

1179

(void) adt_end_session(ah);

usr/src/cmd/zoneadmd/zoneadmd.c

1183

event = adt_alloc_event(ah, ADT_zone_state);

usr/src/cmd/zoneadmd/zoneadmd.c

1186

(void) adt_end_session(ah);

usr/src/cmd/zoneadmd/zoneadmd.c

1197

(void) adt_end_session(ah);

usr/src/common/inet/inet_hash.c

336

ah_t *ah = (ah_t *)(mp->b_rptr + skip_len);

usr/src/common/inet/inet_hash.c

337

uint_t ah_length = AH_TOTAL_LEN(ah);

usr/src/common/inet/inet_hash.c

339

if ((unsigned char *)ah + sizeof (ah_t) > mp->b_wptr)

usr/src/common/inet/inet_hash.c

342

proto = ah->ah_nexthdr;

usr/src/grub/grub-0.97/stage2/bios.c

30

extern int biosdisk_standard (int ah, int drive,

usr/src/grub/grub-0.97/stage2/expand.c

104

int ret, ah;

usr/src/grub/grub-0.97/stage2/expand.c

112

ah = ret >> 8;

usr/src/grub/grub-0.97/stage2/expand.c

115

if (ah == 0x86 && ret != 0) {

usr/src/grub/grub-0.97/stage2/expand.c

121

if (ah == 0 && ret == 0) {

usr/src/grub/grub-0.97/stage2/expand.c

126

if (ah == 0 && ret != 0) {

usr/src/grub/grub-0.97/stage2/expand.c

133

"confused.\n %%ax >> 8 = 0x%x, carry = %d\n", ah, ret);

usr/src/grub/grub-0.97/stage2/moddiv.c

46

#define sub_ddmmss(sh, sl, ah, al, bh, bl) \

usr/src/grub/grub-0.97/stage2/moddiv.c

50

: "0" ((USItype) (ah)), \

usr/src/lib/libm/common/C/atan2.c

410

double ah, al, t, xh, x, y, z;

usr/src/lib/libm/common/C/atan2.c

432

ah = pio2;

usr/src/lib/libm/common/C/atan2.c

435

ah = -pio2;

usr/src/lib/libm/common/C/atan2.c

443

ah = mpi;

usr/src/lib/libm/common/C/atan2.c

447

ah = al = zero;

usr/src/lib/libm/common/C/atan2.c

456

ah += pio4;

usr/src/lib/libm/common/C/atan2.c

458

inexact = (int)ah; /* inexact if ah != 0 */

usr/src/lib/libm/common/C/atan2.c

460

return ((sy)? -ah : ah);

usr/src/lib/libm/common/C/atan2.c

463

if ((int)ah == 0)

usr/src/lib/libm/common/C/atan2.c

464

ah = y / x;

usr/src/lib/libm/common/C/atan2.c

465

return ((sy)? -ah : ah);

usr/src/lib/libm/common/C/atan2.c

476

inexact = (int)ah; /* inexact if ah != 0 */

usr/src/lib/libm/common/C/atan2.c

478

return ((sy)? -ah : ah);

usr/src/lib/libm/common/C/atan2.c

489

ah += TBL[k];

usr/src/lib/libm/common/C/atan2.c

497

t = ah + (z + (al + (z * x) * (p1 + x * (p2 + x * (p3 + x * p4)))));

usr/src/lib/libnwam/common/libnwam_audit.c

40

adt_session_data_t *ah;

usr/src/lib/libnwam/common/libnwam_audit.c

43

if (adt_start_session(&ah, NULL, 0) != 0)

usr/src/lib/libnwam/common/libnwam_audit.c

46

if (adt_set_from_ucred(ah, ucr, ADT_NEW) != 0) {

usr/src/lib/libnwam/common/libnwam_audit.c

47

(void) adt_end_session(ah);

usr/src/lib/libnwam/common/libnwam_audit.c

51

if ((edata = adt_alloc_event(ah, eid)) == NULL) {

usr/src/lib/libnwam/common/libnwam_audit.c

52

(void) adt_end_session(ah);

usr/src/lib/libnwam/common/libnwam_audit.c

81

(void) adt_end_session(ah);

usr/src/lib/libzonecfg/common/libzonecfg.c

7506

adt_session_data_t *ah;

usr/src/lib/libzonecfg/common/libzonecfg.c

7509

if (adt_start_session(&ah, NULL, 0)) {

usr/src/lib/libzonecfg/common/libzonecfg.c

7513

if (adt_set_user(ah, ADT_NO_AUDIT, ADT_NO_AUDIT,

usr/src/lib/libzonecfg/common/libzonecfg.c

7516

(void) adt_end_session(ah);

usr/src/lib/libzonecfg/common/libzonecfg.c

7519

if (adt_set_proc(ah))

usr/src/lib/libzonecfg/common/libzonecfg.c

7522

(void) adt_end_session(ah);

usr/src/lib/pam_modules/unix_cred/unix_cred.c

185

adt_session_data_t *ah;

usr/src/lib/pam_modules/unix_cred/unix_cred.c

255

if (adt_start_session(&ah, NULL, ADT_USE_PROC_DATA) != 0) {

usr/src/lib/pam_modules/unix_cred/unix_cred.c

260

adt_get_auid(ah, &auid);

usr/src/lib/pam_modules/unix_cred/unix_cred.c

334

if (adt_set_user(ah, apwd.pw_uid, apwd.pw_gid,

usr/src/lib/pam_modules/unix_cred/unix_cred.c

342

if (adt_set_user(ah, pwd.pw_uid, pwd.pw_gid,

usr/src/lib/pam_modules/unix_cred/unix_cred.c

362

if (adt_set_user(ah, pwd.pw_uid, pwd.pw_gid,

usr/src/lib/pam_modules/unix_cred/unix_cred.c

370

if (adt_set_proc(ah) != 0) {

usr/src/lib/pam_modules/unix_cred/unix_cred.c

383

if (adt_set_user(ah, pwd.pw_uid, pwd.pw_gid, pwd.pw_uid,

usr/src/lib/pam_modules/unix_cred/unix_cred.c

390

if (adt_set_proc(ah) != 0) {

usr/src/lib/pam_modules/unix_cred/unix_cred.c

408

if (adt_end_session(ah) != 0) {

usr/src/lib/smbsrv/libmlsvc/common/smb_autohome.c

195

smb_autohome_t *ah = NULL;

usr/src/lib/smbsrv/libmlsvc/common/smb_autohome.c

205

while ((ah = smb_autohome_getent(name)) != NULL) {

usr/src/lib/smbsrv/libmlsvc/common/smb_autohome.c

206

if (strcasecmp(ah->ah_name, name) == 0)

usr/src/lib/smbsrv/libmlsvc/common/smb_autohome.c

210

if (ah == NULL) {

usr/src/lib/smbsrv/libmlsvc/common/smb_autohome.c

213

while ((ah = smb_autohome_getent(name)) != NULL) {

usr/src/lib/smbsrv/libmlsvc/common/smb_autohome.c

214

if (strcasecmp(ah->ah_name, "*") == 0) {

usr/src/lib/smbsrv/libmlsvc/common/smb_autohome.c

215

ah->ah_name = (char *)name;

usr/src/lib/smbsrv/libmlsvc/common/smb_autohome.c

221

if (ah == NULL) {

usr/src/lib/smbsrv/libmlsvc/common/smb_autohome.c

224

while ((ah = smb_autohome_getent("+nsswitch")) != NULL) {

usr/src/lib/smbsrv/libmlsvc/common/smb_autohome.c

225

if (strcasecmp("+nsswitch", ah->ah_name) != 0)

usr/src/lib/smbsrv/libmlsvc/common/smb_autohome.c

228

ah = NULL;

usr/src/lib/smbsrv/libmlsvc/common/smb_autohome.c

232

ah->ah_name = pw->pw_name;

usr/src/lib/smbsrv/libmlsvc/common/smb_autohome.c

234

if (ah->ah_path)

usr/src/lib/smbsrv/libmlsvc/common/smb_autohome.c

235

ah->ah_container = ah->ah_path;

usr/src/lib/smbsrv/libmlsvc/common/smb_autohome.c

237

ah->ah_path = pw->pw_dir;

usr/src/lib/smbsrv/libmlsvc/common/smb_autohome.c

243

return (ah);

usr/src/lib/smbsrv/libmlsvc/common/smb_share.c

2121

smb_ads_handle_t *ah;

usr/src/lib/smbsrv/libmlsvc/common/smb_share.c

2174

if ((ah = smb_ads_open()) != NULL) {

usr/src/lib/smbsrv/libmlsvc/common/smb_share.c

2175

smb_shr_publisher_send(ah, &publist, hostname);

usr/src/lib/smbsrv/libmlsvc/common/smb_share.c

2176

smb_ads_close(ah);

usr/src/lib/smbsrv/libmlsvc/common/smb_share.c

2195

smb_shr_publisher_send(smb_ads_handle_t *ah, list_t *publist, const char *host)

usr/src/lib/smbsrv/libmlsvc/common/smb_share.c

2210

(void) smb_ads_publish_share(ah, shr->spi_name,

usr/src/lib/smbsrv/libmlsvc/common/smb_share.c

2213

(void) smb_ads_remove_share(ah, shr->spi_name,

usr/src/lib/smbsrv/libsmbns/common/smbns_ads.c

1035

smb_ads_lookup_share(smb_ads_handle_t *ah, const char *adsShareName,

usr/src/lib/smbsrv/libsmbns/common/smbns_ads.c

1048

ah->domain_dn)) == NULL)

usr/src/lib/smbsrv/libsmbns/common/smbns_ads.c

1065

if ((ret = ldap_search_s(ah->ld, share_dn,

usr/src/lib/smbsrv/libsmbns/common/smbns_ads.c

1079

if (ldap_count_entries(ah->ld, res) == 0) {

usr/src/lib/smbsrv/libsmbns/common/smbns_ads.c

1109

smb_ads_publish_share(smb_ads_handle_t *ah, const char *adsShareName,

usr/src/lib/smbsrv/libsmbns/common/smbns_ads.c

1125

ret = smb_ads_lookup_share(ah, adsShareName, adsContainer, unc_name);

usr/src/lib/smbsrv/libsmbns/common/smbns_ads.c

1129

(void) smb_ads_del_share(ah, adsShareName, adsContainer);

usr/src/lib/smbsrv/libsmbns/common/smbns_ads.c

1130

ret = smb_ads_add_share(ah, adsShareName, unc_name,

usr/src/lib/smbsrv/libsmbns/common/smbns_ads.c

1135

ret = smb_ads_add_share(ah, adsShareName, unc_name,

usr/src/lib/smbsrv/libsmbns/common/smbns_ads.c

1165

smb_ads_remove_share(smb_ads_handle_t *ah, const char *adsShareName,

usr/src/lib/smbsrv/libsmbns/common/smbns_ads.c

1180

ret = smb_ads_lookup_share(ah, adsShareName, adsContainer, unc_name);

usr/src/lib/smbsrv/libsmbns/common/smbns_ads.c

1186

return (smb_ads_del_share(ah, adsShareName, adsContainer));

usr/src/lib/smbsrv/libsmbns/common/smbns_ads.c

1196

smb_ads_get_new_comp_dn(smb_ads_handle_t *ah, char *buf, size_t buflen,

usr/src/lib/smbsrv/libsmbns/common/smbns_ads.c

1205

nbname, container, ah->domain_dn);

usr/src/lib/smbsrv/libsmbns/common/smbns_ads.c

1214

smb_ads_add_computer(smb_ads_handle_t *ah, int dclevel, char *dn)

usr/src/lib/smbsrv/libsmbns/common/smbns_ads.c

1216

return (smb_ads_computer_op(ah, LDAP_MOD_ADD, dclevel, dn));

usr/src/lib/smbsrv/libsmbns/common/smbns_ads.c

1225

smb_ads_modify_computer(smb_ads_handle_t *ah, int dclevel, char *dn)

usr/src/lib/smbsrv/libsmbns/common/smbns_ads.c

1227

return (smb_ads_computer_op(ah, LDAP_MOD_REPLACE, dclevel, dn));

usr/src/lib/smbsrv/libsmbns/common/smbns_ads.c

1237

smb_ads_get_dc_level(smb_ads_handle_t *ah)

usr/src/lib/smbsrv/libsmbns/common/smbns_ads.c

1247

rc = ldap_search_s(ah->ld, "", LDAP_SCOPE_BASE, NULL, attr, 0, &res);

usr/src/lib/smbsrv/libsmbns/common/smbns_ads.c

1256

if (ldap_count_entries(ah->ld, res) == 0) {

usr/src/lib/smbsrv/libsmbns/common/smbns_ads.c

1262

entry = ldap_first_entry(ah->ld, res);

usr/src/lib/smbsrv/libsmbns/common/smbns_ads.c

1264

if ((vals = ldap_get_values(ah->ld, entry,

usr/src/lib/smbsrv/libsmbns/common/smbns_ads.c

1294

smb_ads_getfqhostname(smb_ads_handle_t *ah, char *fqhost, int len)

usr/src/lib/smbsrv/libsmbns/common/smbns_ads.c

1300

(void) strlcat(fqhost, ah->domain, len);

usr/src/lib/smbsrv/libsmbns/common/smbns_ads.c

1306

smb_ads_computer_op(smb_ads_handle_t *ah, int op, int dclevel, char *dn)

usr/src/lib/smbsrv/libsmbns/common/smbns_ads.c

1327

if (smb_ads_getfqhostname(ah, fqhost, MAXHOSTNAMELEN))

usr/src/lib/smbsrv/libsmbns/common/smbns_ads.c

1331

if (smb_krb5_get_pn_set(&spn, SMB_PN_SPN_ATTR, ah->domain) == 0)

usr/src/lib/smbsrv/libsmbns/common/smbns_ads.c

1335

if (smb_krb5_get_pn_set(&upn, SMB_PN_UPN_ATTR, ah->domain) != 1) {

usr/src/lib/smbsrv/libsmbns/common/smbns_ads.c

1401

if ((ret = ldap_add_s(ah->ld, dn, attrs)) != LDAP_SUCCESS) {

usr/src/lib/smbsrv/libsmbns/common/smbns_ads.c

1409

if ((ret = ldap_modify_s(ah->ld, dn, attrs)) != LDAP_SUCCESS) {

usr/src/lib/smbsrv/libsmbns/common/smbns_ads.c

1432

smb_ads_del_computer(smb_ads_handle_t *ah, char *dn)

usr/src/lib/smbsrv/libsmbns/common/smbns_ads.c

1436

if ((rc = ldap_delete_s(ah->ld, dn)) != LDAP_SUCCESS)

usr/src/lib/smbsrv/libsmbns/common/smbns_ads.c

1492

smb_ads_get_qstat(smb_ads_handle_t *ah, LDAPMessage *res,

usr/src/lib/smbsrv/libsmbns/common/smbns_ads.c

1498

if (ldap_count_entries(ah->ld, res) == 0) {

usr/src/lib/smbsrv/libsmbns/common/smbns_ads.c

1504

if ((entry = ldap_first_entry(ah->ld, res)) == NULL) {

usr/src/lib/smbsrv/libsmbns/common/smbns_ads.c

1520

if (smb_ads_getfqhostname(ah, fqhost, MAXHOSTNAMELEN))

usr/src/lib/smbsrv/libsmbns/common/smbns_ads.c

1525

rc = smb_ads_getattr(ah->ld, entry, &dnshost_avp);

usr/src/lib/smbsrv/libsmbns/common/smbns_ads.c

1570

rc = smb_ads_getattr(ah->ld, entry, avpair);

usr/src/lib/smbsrv/libsmbns/common/smbns_ads.c

1597

smb_ads_lookup_computer_n_attr(smb_ads_handle_t *ah, smb_ads_avpair_t *avpair,

usr/src/lib/smbsrv/libsmbns/common/smbns_ads.c

1638

err = ldap_search_s(ah->ld, dn, scope, filter, attrs, 0, &res);

usr/src/lib/smbsrv/libsmbns/common/smbns_ads.c

1648

rc = smb_ads_get_qstat(ah, res, avpair);

usr/src/lib/smbsrv/libsmbns/common/smbns_ads.c

1671

smb_ads_find_computer(smb_ads_handle_t *ah, char *dn)

usr/src/lib/smbsrv/libsmbns/common/smbns_ads.c

1679

(void) strlcpy(dn, ah->domain_dn, SMB_ADS_DN_MAX);

usr/src/lib/smbsrv/libsmbns/common/smbns_ads.c

1680

stat = smb_ads_lookup_computer_n_attr(ah, &avpair,

usr/src/lib/smbsrv/libsmbns/common/smbns_ads.c

1699

smb_ads_update_acct_passwd(smb_ads_handle_t *ah, char *passwd, char *dn)

usr/src/lib/smbsrv/libsmbns/common/smbns_ads.c

1745

if ((ret = ldap_modify_s(ah->ld, dn, attrs)) != LDAP_SUCCESS) {

usr/src/lib/smbsrv/libsmbns/common/smbns_ads.c

1765

smb_ads_update_computer_cntrl_attr(smb_ads_handle_t *ah, int flags, char *dn)

usr/src/lib/smbsrv/libsmbns/common/smbns_ads.c

1782

if ((ret = ldap_modify_s(ah->ld, dn, attrs)) != LDAP_SUCCESS) {

usr/src/lib/smbsrv/libsmbns/common/smbns_ads.c

1797

smb_ads_lookup_computer_attr_kvno(smb_ads_handle_t *ah, char *dn)

usr/src/lib/smbsrv/libsmbns/common/smbns_ads.c

1804

if (smb_ads_lookup_computer_n_attr(ah, &avpair,

usr/src/lib/smbsrv/libsmbns/common/smbns_ads.c

1845

smb_ads_handle_t *ah = NULL;

usr/src/lib/smbsrv/libsmbns/common/smbns_ads.c

1860

rc = smb_ads_open_main(&ah, domain, user, usr_passwd);

usr/src/lib/smbsrv/libsmbns/common/smbns_ads.c

1868

if ((dclevel = smb_ads_get_dc_level(ah)) == -1) {

usr/src/lib/smbsrv/libsmbns/common/smbns_ads.c

1869

smb_ads_close(ah);

usr/src/lib/smbsrv/libsmbns/common/smbns_ads.c

1874

qstat = smb_ads_find_computer(ah, dn);

usr/src/lib/smbsrv/libsmbns/common/smbns_ads.c

1880

if (smb_ads_modify_computer(ah, dclevel, dn) != 0) {

usr/src/lib/smbsrv/libsmbns/common/smbns_ads.c

1881

smb_ads_close(ah);

usr/src/lib/smbsrv/libsmbns/common/smbns_ads.c

1889

smb_ads_get_new_comp_dn(ah, dn, SMB_ADS_DN_MAX, container);

usr/src/lib/smbsrv/libsmbns/common/smbns_ads.c

1892

if (smb_ads_add_computer(ah, dclevel, dn) != 0) {

usr/src/lib/smbsrv/libsmbns/common/smbns_ads.c

1893

smb_ads_close(ah);

usr/src/lib/smbsrv/libsmbns/common/smbns_ads.c

1905

smb_ads_close(ah);

usr/src/lib/smbsrv/libsmbns/common/smbns_ads.c

1915

if (smb_krb5_get_pn_set(&spns, SMB_PN_KEYTAB_ENTRY, ah->domain) == 0) {

usr/src/lib/smbsrv/libsmbns/common/smbns_ads.c

1931

x = smb_ads_update_acct_passwd(ah, machine_passwd, dn);

usr/src/lib/smbsrv/libsmbns/common/smbns_ads.c

1933

x = smb_krb5_setpwd(ctx, ah->domain, machine_passwd);

usr/src/lib/smbsrv/libsmbns/common/smbns_ads.c

1939

kvno = smb_ads_lookup_computer_attr_kvno(ah, dn);

usr/src/lib/smbsrv/libsmbns/common/smbns_ads.c

1952

x = smb_ads_update_computer_cntrl_attr(ah, usrctl_flags, dn);

usr/src/lib/smbsrv/libsmbns/common/smbns_ads.c

1974

if (smb_krb5_kt_populate(ctx, ah->domain, krb5princs, cnt,

usr/src/lib/smbsrv/libsmbns/common/smbns_ads.c

1985

smb_ads_del_computer(ah, dn);

usr/src/lib/smbsrv/libsmbns/common/smbns_ads.c

2003

smb_ads_close(ah);

usr/src/lib/smbsrv/libsmbns/common/smbns_ads.c

647

smb_ads_handle_t *ah;

usr/src/lib/smbsrv/libsmbns/common/smbns_ads.c

669

ah = (smb_ads_handle_t *)malloc(sizeof (smb_ads_handle_t));

usr/src/lib/smbsrv/libsmbns/common/smbns_ads.c

670

if (ah == NULL) {

usr/src/lib/smbsrv/libsmbns/common/smbns_ads.c

675

(void) memset(ah, 0, sizeof (smb_ads_handle_t));

usr/src/lib/smbsrv/libsmbns/common/smbns_ads.c

680

free(ah);

usr/src/lib/smbsrv/libsmbns/common/smbns_ads.c

688

free(ah);

usr/src/lib/smbsrv/libsmbns/common/smbns_ads.c

695

ah->ld = ld;

usr/src/lib/smbsrv/libsmbns/common/smbns_ads.c

696

ah->domain = strdup(domain);

usr/src/lib/smbsrv/libsmbns/common/smbns_ads.c

698

if (ah->domain == NULL) {

usr/src/lib/smbsrv/libsmbns/common/smbns_ads.c

699

smb_ads_close(ah);

usr/src/lib/smbsrv/libsmbns/common/smbns_ads.c

708

(void) smb_strlwr(ah->domain);

usr/src/lib/smbsrv/libsmbns/common/smbns_ads.c

709

ah->domain_dn = smb_ads_convert_domain(domain);

usr/src/lib/smbsrv/libsmbns/common/smbns_ads.c

710

if (ah->domain_dn == NULL) {

usr/src/lib/smbsrv/libsmbns/common/smbns_ads.c

711

smb_ads_close(ah);

usr/src/lib/smbsrv/libsmbns/common/smbns_ads.c

716

ah->hostname = strdup(ads_host->name);

usr/src/lib/smbsrv/libsmbns/common/smbns_ads.c

717

if (ah->hostname == NULL) {

usr/src/lib/smbsrv/libsmbns/common/smbns_ads.c

718

smb_ads_close(ah);

usr/src/lib/smbsrv/libsmbns/common/smbns_ads.c

724

if ((ah->site = strdup(smb_ads_cfg.c_site)) == NULL) {

usr/src/lib/smbsrv/libsmbns/common/smbns_ads.c

725

smb_ads_close(ah);

usr/src/lib/smbsrv/libsmbns/common/smbns_ads.c

731

ah->site = NULL;

usr/src/lib/smbsrv/libsmbns/common/smbns_ads.c

736

syslog(LOG_DEBUG, "smbns: domain: %s", ah->domain);

usr/src/lib/smbsrv/libsmbns/common/smbns_ads.c

737

syslog(LOG_DEBUG, "smbns: domain_dn: %s", ah->domain_dn);

usr/src/lib/smbsrv/libsmbns/common/smbns_ads.c

738

syslog(LOG_DEBUG, "smbns: ip_addr: %s", ah->ip_addr);

usr/src/lib/smbsrv/libsmbns/common/smbns_ads.c

739

syslog(LOG_DEBUG, "smbns: hostname: %s", ah->hostname);

usr/src/lib/smbsrv/libsmbns/common/smbns_ads.c

741

(ah->site != NULL) ? ah->site : "");

usr/src/lib/smbsrv/libsmbns/common/smbns_ads.c

743

rc = ldap_sasl_interactive_bind_s(ah->ld, "", "GSSAPI", NULL, NULL,

usr/src/lib/smbsrv/libsmbns/common/smbns_ads.c

748

smb_ads_close(ah);

usr/src/lib/smbsrv/libsmbns/common/smbns_ads.c

755

*hp = ah;

usr/src/lib/smbsrv/libsmbns/common/smbns_ads.c

770

smb_ads_close(smb_ads_handle_t *ah)

usr/src/lib/smbsrv/libsmbns/common/smbns_ads.c

772

if (ah == NULL)

usr/src/lib/smbsrv/libsmbns/common/smbns_ads.c

775

if (ah->ld)

usr/src/lib/smbsrv/libsmbns/common/smbns_ads.c

776

(void) ldap_unbind(ah->ld);

usr/src/lib/smbsrv/libsmbns/common/smbns_ads.c

778

free(ah->domain);

usr/src/lib/smbsrv/libsmbns/common/smbns_ads.c

779

free(ah->domain_dn);

usr/src/lib/smbsrv/libsmbns/common/smbns_ads.c

780

free(ah->hostname);

usr/src/lib/smbsrv/libsmbns/common/smbns_ads.c

781

free(ah->site);

usr/src/lib/smbsrv/libsmbns/common/smbns_ads.c

782

free(ah);

usr/src/lib/smbsrv/libsmbns/common/smbns_ads.c

885

smb_ads_add_share(smb_ads_handle_t *ah, const char *adsShareName,

usr/src/lib/smbsrv/libsmbns/common/smbns_ads.c

895

ah->domain_dn)) == NULL)

usr/src/lib/smbsrv/libsmbns/common/smbns_ads.c

911

if ((ret = ldap_add_s(ah->ld, share_dn, attrs)) != LDAP_SUCCESS) {

usr/src/lib/smbsrv/libsmbns/common/smbns_ads.c

946

smb_ads_del_share(smb_ads_handle_t *ah, const char *adsShareName,

usr/src/lib/smbsrv/libsmbns/common/smbns_ads.c

953

ah->domain_dn)) == NULL)

usr/src/lib/smbsrv/libsmbns/common/smbns_ads.c

956

if ((ret = ldap_delete_s(ah->ld, share_dn)) != LDAP_SUCCESS) {

usr/src/uts/common/fs/udfs/udf_inode.c

173

struct attr_hdr *ah;

usr/src/uts/common/fs/udfs/udf_inode.c

644

ah = (struct attr_hdr *)&fe->fe_spec[ea_off];

usr/src/uts/common/fs/udfs/udf_inode.c

649

if ((GET_32(&ah->ahdr_atype) == 12) &&

usr/src/uts/common/fs/udfs/udf_inode.c

650

(ah->ahdr_astype == 1)) {

usr/src/uts/common/fs/udfs/udf_inode.c

664

ds = (struct dev_spec_ear *)ah;

usr/src/uts/common/fs/udfs/udf_inode.c

672

if ((GET_32(&ah->ahdr_atype) == 2048) &&

usr/src/uts/common/fs/udfs/udf_inode.c

673

(ah->ahdr_astype == 1)) {

usr/src/uts/common/fs/udfs/udf_inode.c

685

iuea = (struct iu_ea *)ah;

usr/src/uts/common/fs/udfs/udf_inode.c

702

if (GET_32(&ah->ahdr_length) == 0) {

usr/src/uts/common/fs/udfs/udf_inode.c

705

ea_off += GET_32(&ah->ahdr_length);

usr/src/uts/common/inet/ip/ip6.c

3141

ah_t *ah;

usr/src/uts/common/inet/ip/ip6.c

3164

mp = ipsec_inbound_ah_sa(mp, ira, &ah);

usr/src/uts/common/inet/ip/ip6.c

3167

ASSERT(ah != NULL);

usr/src/uts/common/inet/ip/ip6.c

3171

mp = ira->ira_ipsec_ah_sa->ipsa_input_func(mp, ah, ira);

usr/src/uts/common/inet/ip/ip6.c

4849

ah_t *ah;

usr/src/uts/common/inet/ip/ip6.c

4896

ah = (ah_t *)whereptr;

usr/src/uts/common/inet/ip/ip6.c

4897

nexthdr = ah->ah_nexthdr;

usr/src/uts/common/inet/ip/ip6.c

4898

ehdrlen = (ah->ah_length << 2) + 8;

usr/src/uts/common/inet/ip/ip6_input.c

2666

ah_t *ah;

usr/src/uts/common/inet/ip/ip6_input.c

2668

mp = ipsec_inbound_ah_sa(mp, ira, &ah);

usr/src/uts/common/inet/ip/ip6_input.c

2672

ASSERT(ah != NULL);

usr/src/uts/common/inet/ip/ip6_input.c

2676

mp = ira->ira_ipsec_ah_sa->ipsa_input_func(mp, ah,

usr/src/uts/common/inet/ip/ip_input.c

2893

ah_t *ah;

usr/src/uts/common/inet/ip/ip_input.c

2895

mp = ipsec_inbound_ah_sa(mp, ira, &ah);

usr/src/uts/common/inet/ip/ip_input.c

2899

ASSERT(ah != NULL);

usr/src/uts/common/inet/ip/ip_input.c

2903

mp = ira->ira_ipsec_ah_sa->ipsa_input_func(mp, ah,

usr/src/uts/common/inet/ip/ip_sadb.c

663

ah_t *ah;

usr/src/uts/common/inet/ip/ip_sadb.c

713

ah = (ah_t *)(mp->b_rptr + ah_offset);

usr/src/uts/common/inet/ip/ip_sadb.c

727

hptr = INBOUND_BUCKET(sp, ah->ah_spi);

usr/src/uts/common/inet/ip/ip_sadb.c

729

assoc = ipsec_getassocbyspi(hptr, ah->ah_spi, src_ptr, dst_ptr, af);

usr/src/uts/common/inet/ip/ip_sadb.c

740

ah->ah_spi, dst_ptr, af, ira);

usr/src/uts/common/inet/ip/ip_sadb.c

777

*ahp = ah;

usr/src/uts/common/inet/ip/ipsecah.c

1882

ah_t *ah;

usr/src/uts/common/inet/ip/ipsecah.c

1915

ah = (ah_t *)((uint8_t *)ip6h + hdr_length);

usr/src/uts/common/inet/ip/ipsecah.c

1919

assoc = ipsec_getassocbyspi(isaf, ah->ah_spi,

usr/src/uts/common/inet/ip/ipsecah.c

1932

ah->ah_spi, &oip6h->ip6_src, AF_INET6,

usr/src/uts/common/inet/ip/ipsecah.c

1952

ah_length = (ah->ah_length << 2) + 8;

usr/src/uts/common/inet/ip/ipsecah.c

1953

post_ah_ptr = (uint8_t *)ah + ah_length;

usr/src/uts/common/inet/ip/ipsecah.c

1964

*nexthdrp = ah->ah_nexthdr;

usr/src/uts/common/inet/ip/ipsecah.c

1965

ovbcopy(post_ah_ptr, ah,

usr/src/uts/common/inet/ip/ipsecah.c

1990

ah_t *ah;

usr/src/uts/common/inet/ip/ipsecah.c

2023

ah = (ah_t *)((uint8_t *)ipha + hdr_length);

usr/src/uts/common/inet/ip/ipsecah.c

2024

nexthdr = ah->ah_nexthdr;

usr/src/uts/common/inet/ip/ipsecah.c

2028

assoc = ipsec_getassocbyspi(hptr, ah->ah_spi,

usr/src/uts/common/inet/ip/ipsecah.c

2041

ah->ah_spi, &oipha->ipha_src, AF_INET,

usr/src/uts/common/inet/ip/ipsecah.c

2062

ah_length = (ah->ah_length << 2) + 8;

usr/src/uts/common/inet/ip/ipsecah.c

2076

if (!pullupmsg(mp, (uchar_t *)ah + ah_length - mp->b_rptr)) {

usr/src/uts/common/inet/ip/ipsecah.c

2248

ah_t *ah;

usr/src/uts/common/inet/ip/ipsecah.c

2283

ah = NULL;

usr/src/uts/common/inet/ip/ipsecah.c

2382

ah = (ah_t *)pi_opt;

usr/src/uts/common/inet/ip/ipsecah.c

2383

ah->ah_nexthdr = nexthdr;

usr/src/uts/common/inet/ip/ipsecah.c

3368

ah_t *ah = (ah_t *)arg;

usr/src/uts/common/inet/ip/ipsecah.c

3391

if (!sadb_replay_peek(assoc, ah->ah_replay)) {

usr/src/uts/common/inet/ip/ipsecah.c

3406

ah_offset = (uchar_t *)ah - data_mp->b_rptr;

usr/src/uts/common/inet/ip/ipsecah.c

3412

ah_length = (ah->ah_length << 2) + 8;

usr/src/uts/common/inet/ip/ipsecah.c

3418

if (((uchar_t *)ah + ah_length) > data_mp->b_wptr) {

usr/src/uts/common/inet/ip/ipsecah.c

3419

if (!pullupmsg(data_mp, (uchar_t *)ah + ah_length -

usr/src/uts/common/inet/ip/ipsecah.c

3478

ah_t *ah;

usr/src/uts/common/inet/ip/ipsecah.c

3530

ah = (ah_t *)(mp->b_rptr + ah_offset);

usr/src/uts/common/inet/ip/ipsecah.c

3540

if (!sadb_replay_check(assoc, ah->ah_replay)) {

usr/src/uts/common/inet/ip/ipsecah.c

3593

ipha->ipha_protocol = ah->ah_nexthdr;

usr/src/uts/common/inet/ip/ipsecah.c

3656

*nexthdr = ah->ah_nexthdr;

usr/src/uts/common/inet/ip/ipsecah.c

726

ah_t *ah;

usr/src/uts/common/inet/ip/ipsecah.c

734

mp = ipsec_inbound_ah_sa(mp, ira, &ah);

usr/src/uts/common/inet/ip/ipsecah.c

738

ASSERT(ah != NULL);

usr/src/uts/common/inet/ip/ipsecah.c

742

mp = ira->ira_ipsec_ah_sa->ipsa_input_func(mp, ah, ira);

usr/src/uts/common/inet/ipf/fil.c

1268

authhdr_t *ah;

usr/src/uts/common/inet/ipf/fil.c

1271

if ((fin->fin_off == 0) && (frpr_pullup(fin, sizeof(*ah)) == -1))

usr/src/uts/common/inet/ipf/fil.c

1274

ah = (authhdr_t *)fin->fin_dp;

usr/src/uts/common/inet/ipf/fil.c

1276

len = (ah->ah_plen + 2) << 2;

usr/src/uts/common/inet/ipf/fil.c

816

authhdr_t *ah;

usr/src/uts/common/inet/ipf/fil.c

821

if (frpr_pullup(fin, sizeof(*ah)) == -1)

usr/src/uts/common/inet/ipf/fil.c

830

ah = (authhdr_t *)fin->fin_dp;

usr/src/uts/common/inet/ipf/fil.c

832

shift = (ah->ah_plen + 2) * 4;

usr/src/uts/common/inet/ipf/fil.c

836

return ah->ah_next;

usr/src/uts/common/inet/ipsecah.h

149

#define AH_TOTAL_LEN(ah) (((ah)->ah_length << 2) + AH_BASELEN - \

usr/src/uts/common/inet/ipsecah.h

150

sizeof ((ah)->ah_replay))

usr/src/uts/common/inet/ipsecah.h

162

#define AHOLD_TOTAL_LEN(ah) (((ah)->ah_length << 2) + AH_BASELEN)

usr/src/uts/common/io/arn/arn_ani.c

101

REG_RMW_FIELD(ah, AR_PHY_SFCORR_LOW,

usr/src/uts/common/io/arn/arn_ani.c

104

REG_RMW_FIELD(ah, AR_PHY_SFCORR,

usr/src/uts/common/io/arn/arn_ani.c

107

REG_RMW_FIELD(ah, AR_PHY_SFCORR,

usr/src/uts/common/io/arn/arn_ani.c

110

REG_RMW_FIELD(ah, AR_PHY_SFCORR,

usr/src/uts/common/io/arn/arn_ani.c

113

REG_RMW_FIELD(ah, AR_PHY_SFCORR_LOW,

usr/src/uts/common/io/arn/arn_ani.c

117

REG_RMW_FIELD(ah, AR_PHY_SFCORR_EXT,

usr/src/uts/common/io/arn/arn_ani.c

120

REG_RMW_FIELD(ah, AR_PHY_SFCORR_EXT,

usr/src/uts/common/io/arn/arn_ani.c

123

REG_RMW_FIELD(ah, AR_PHY_SFCORR_EXT,

usr/src/uts/common/io/arn/arn_ani.c

126

REG_RMW_FIELD(ah, AR_PHY_SFCORR_EXT,

usr/src/uts/common/io/arn/arn_ani.c

131

REG_SET_BIT(ah, AR_PHY_SFCORR_LOW,

usr/src/uts/common/io/arn/arn_ani.c

134

REG_CLR_BIT(ah, AR_PHY_SFCORR_LOW,

usr/src/uts/common/io/arn/arn_ani.c

150

REG_RMW_FIELD(ah, AR_PHY_CCK_DETECT,

usr/src/uts/common/io/arn/arn_ani.c

175

REG_RMW_FIELD(ah, AR_PHY_FIND_SIG,

usr/src/uts/common/io/arn/arn_ani.c

197

REG_RMW_FIELD(ah, AR_PHY_TIMING5,

usr/src/uts/common/io/arn/arn_ani.c

235

ath9k_hw_update_mibstats(struct ath_hal *ah, struct ath9k_mib_stats *stats)

usr/src/uts/common/io/arn/arn_ani.c

237

stats->ackrcv_bad += REG_READ(ah, AR_ACK_FAIL);

usr/src/uts/common/io/arn/arn_ani.c

238

stats->rts_bad += REG_READ(ah, AR_RTS_FAIL);

usr/src/uts/common/io/arn/arn_ani.c

239

stats->fcs_bad += REG_READ(ah, AR_FCS_FAIL);

usr/src/uts/common/io/arn/arn_ani.c

240

stats->rts_good += REG_READ(ah, AR_RTS_OK);

usr/src/uts/common/io/arn/arn_ani.c

241

stats->beacons += REG_READ(ah, AR_BEACON_CNT);

usr/src/uts/common/io/arn/arn_ani.c

245

ath9k_ani_restart(struct ath_hal *ah)

usr/src/uts/common/io/arn/arn_ani.c

247

struct ath_hal_5416 *ahp = AH5416(ah);

usr/src/uts/common/io/arn/arn_ani.c

250

if (!DO_ANI(ah))

usr/src/uts/common/io/arn/arn_ani.c

279

REG_WRITE(ah, AR_PHY_ERR_1, aniState->ofdmPhyErrBase);

usr/src/uts/common/io/arn/arn_ani.c

28

ath9k_hw_get_ani_channel_idx(struct ath_hal *ah, struct ath9k_channel *chan)

usr/src/uts/common/io/arn/arn_ani.c

280

REG_WRITE(ah, AR_PHY_ERR_2, aniState->cckPhyErrBase);

usr/src/uts/common/io/arn/arn_ani.c

281

REG_WRITE(ah, AR_PHY_ERR_MASK_1, AR_PHY_ERR_OFDM_TIMING);

usr/src/uts/common/io/arn/arn_ani.c

282

REG_WRITE(ah, AR_PHY_ERR_MASK_2, AR_PHY_ERR_CCK_TIMING);

usr/src/uts/common/io/arn/arn_ani.c

284

ath9k_hw_update_mibstats(ah, &ahp->ah_mibStats);

usr/src/uts/common/io/arn/arn_ani.c

291

ath9k_hw_ani_ofdm_err_trigger(struct ath_hal *ah)

usr/src/uts/common/io/arn/arn_ani.c

293

struct ath_hal_5416 *ahp = AH5416(ah);

usr/src/uts/common/io/arn/arn_ani.c

294

struct ath9k_channel *chan = ah->ah_curchan;

usr/src/uts/common/io/arn/arn_ani.c

299

if (!DO_ANI(ah))

usr/src/uts/common/io/arn/arn_ani.c

30

struct ath_hal_5416 *ahp = AH5416(ah);

usr/src/uts/common/io/arn/arn_ani.c

305

if (ath9k_hw_ani_control(ah, ATH9K_ANI_NOISE_IMMUNITY_LEVEL,

usr/src/uts/common/io/arn/arn_ani.c

312

if (ath9k_hw_ani_control(ah, ATH9K_ANI_SPUR_IMMUNITY_LEVEL,

usr/src/uts/common/io/arn/arn_ani.c

318

if (ah->ah_opmode == ATH9K_M_HOSTAP) {

usr/src/uts/common/io/arn/arn_ani.c

320

(void) ath9k_hw_ani_control(ah, ATH9K_ANI_FIRSTEP_LEVEL,

usr/src/uts/common/io/arn/arn_ani.c

328

if (ath9k_hw_ani_control(ah,

usr/src/uts/common/io/arn/arn_ani.c

331

(void) ath9k_hw_ani_control(ah,

usr/src/uts/common/io/arn/arn_ani.c

337

(void) ath9k_hw_ani_control(ah, ATH9K_ANI_FIRSTEP_LEVEL,

usr/src/uts/common/io/arn/arn_ani.c

343

(void) ath9k_hw_ani_control(ah,

usr/src/uts/common/io/arn/arn_ani.c

347

(void) ath9k_hw_ani_control(ah, ATH9K_ANI_FIRSTEP_LEVEL,

usr/src/uts/common/io/arn/arn_ani.c

351

mode = ath9k_hw_chan2wmode(ah, chan);

usr/src/uts/common/io/arn/arn_ani.c

354

(void) ath9k_hw_ani_control(ah,

usr/src/uts/common/io/arn/arn_ani.c

358

(void) ath9k_hw_ani_control(ah,

usr/src/uts/common/io/arn/arn_ani.c

366

ath9k_hw_ani_cck_err_trigger(struct ath_hal *ah)

usr/src/uts/common/io/arn/arn_ani.c

368

struct ath_hal_5416 *ahp = AH5416(ah);

usr/src/uts/common/io/arn/arn_ani.c

369

struct ath9k_channel *chan = ah->ah_curchan;

usr/src/uts/common/io/arn/arn_ani.c

374

if (!DO_ANI(ah))

usr/src/uts/common/io/arn/arn_ani.c

379

if (ath9k_hw_ani_control(ah, ATH9K_ANI_NOISE_IMMUNITY_LEVEL,

usr/src/uts/common/io/arn/arn_ani.c

384

if (ah->ah_opmode == ATH9K_M_HOSTAP) {

usr/src/uts/common/io/arn/arn_ani.c

386

(void) ath9k_hw_ani_control(ah, ATH9K_ANI_FIRSTEP_LEVEL,

usr/src/uts/common/io/arn/arn_ani.c

394

(void) ath9k_hw_ani_control(ah, ATH9K_ANI_FIRSTEP_LEVEL,

usr/src/uts/common/io/arn/arn_ani.c

397

mode = ath9k_hw_chan2wmode(ah, chan);

usr/src/uts/common/io/arn/arn_ani.c

400

(void) ath9k_hw_ani_control(ah,

usr/src/uts/common/io/arn/arn_ani.c

407

ath9k_hw_ani_lower_immunity(struct ath_hal *ah)

usr/src/uts/common/io/arn/arn_ani.c

409

struct ath_hal_5416 *ahp = AH5416(ah);

usr/src/uts/common/io/arn/arn_ani.c

415

if (ah->ah_opmode == ATH9K_M_HOSTAP) {

usr/src/uts/common/io/arn/arn_ani.c

417

if (ath9k_hw_ani_control(ah, ATH9K_ANI_FIRSTEP_LEVEL,

usr/src/uts/common/io/arn/arn_ani.c

428

if (ath9k_hw_ani_control(ah,

usr/src/uts/common/io/arn/arn_ani.c

434

if (ath9k_hw_ani_control(ah,

usr/src/uts/common/io/arn/arn_ani.c

441

if (ath9k_hw_ani_control(ah,

usr/src/uts/common/io/arn/arn_ani.c

450

if (ath9k_hw_ani_control(ah, ATH9K_ANI_SPUR_IMMUNITY_LEVEL,

usr/src/uts/common/io/arn/arn_ani.c

456

(void) ath9k_hw_ani_control(ah, ATH9K_ANI_NOISE_IMMUNITY_LEVEL,

usr/src/uts/common/io/arn/arn_ani.c

463

ath9k_hw_ani_get_listen_time(struct ath_hal *ah)

usr/src/uts/common/io/arn/arn_ani.c

465

struct ath_hal_5416 *ahp = AH5416(ah);

usr/src/uts/common/io/arn/arn_ani.c

470

txFrameCount = REG_READ(ah, AR_TFCNT);

usr/src/uts/common/io/arn/arn_ani.c

471

rxFrameCount = REG_READ(ah, AR_RFCNT);

usr/src/uts/common/io/arn/arn_ani.c

472

cycleCount = REG_READ(ah, AR_CCCNT);

usr/src/uts/common/io/arn/arn_ani.c

493

ath9k_ani_reset(struct ath_hal *ah)

usr/src/uts/common/io/arn/arn_ani.c

495

struct ath_hal_5416 *ahp = AH5416(ah);

usr/src/uts/common/io/arn/arn_ani.c

497

struct ath9k_channel *chan = ah->ah_curchan;

usr/src/uts/common/io/arn/arn_ani.c

50

ath9k_hw_ani_control(struct ath_hal *ah, enum ath9k_ani_cmd cmd, int param)

usr/src/uts/common/io/arn/arn_ani.c

503

if (!DO_ANI(ah))

usr/src/uts/common/io/arn/arn_ani.c

506

index = ath9k_hw_get_ani_channel_idx(ah, chan);

usr/src/uts/common/io/arn/arn_ani.c

510

if (DO_ANI(ah) && ah->ah_opmode != ATH9K_M_STA &&

usr/src/uts/common/io/arn/arn_ani.c

511

ah->ah_opmode != ATH9K_M_IBSS) {

usr/src/uts/common/io/arn/arn_ani.c

513

"Reset ANI state opmode %u\n", ah->ah_opmode));

usr/src/uts/common/io/arn/arn_ani.c

516

(void) ath9k_hw_ani_control(ah,

usr/src/uts/common/io/arn/arn_ani.c

518

(void) ath9k_hw_ani_control(ah,

usr/src/uts/common/io/arn/arn_ani.c

52

struct ath_hal_5416 *ahp = AH5416(ah);

usr/src/uts/common/io/arn/arn_ani.c

520

(void) ath9k_hw_ani_control(ah, ATH9K_ANI_FIRSTEP_LEVEL, 0);

usr/src/uts/common/io/arn/arn_ani.c

522

(ah, ATH9K_ANI_OFDM_WEAK_SIGNAL_DETECTION,

usr/src/uts/common/io/arn/arn_ani.c

524

(void) ath9k_hw_ani_control(ah, ATH9K_ANI_CCK_WEAK_SIGNAL_THR,

usr/src/uts/common/io/arn/arn_ani.c

527

ath9k_hw_setrxfilter(ah, ath9k_hw_getrxfilter(ah) |

usr/src/uts/common/io/arn/arn_ani.c

530

if (ah->ah_opmode == ATH9K_M_HOSTAP) {

usr/src/uts/common/io/arn/arn_ani.c

532

ah->ah_config.ofdm_trig_high;

usr/src/uts/common/io/arn/arn_ani.c

534

ah->ah_config.ofdm_trig_low;

usr/src/uts/common/io/arn/arn_ani.c

536

ah->ah_config.cck_trig_high;

usr/src/uts/common/io/arn/arn_ani.c

538

ah->ah_config.cck_trig_low;

usr/src/uts/common/io/arn/arn_ani.c

540

ath9k_ani_restart(ah);

usr/src/uts/common/io/arn/arn_ani.c

545

(void) ath9k_hw_ani_control(ah, ATH9K_ANI_NOISE_IMMUNITY_LEVEL,

usr/src/uts/common/io/arn/arn_ani.c

548

(void) ath9k_hw_ani_control(ah, ATH9K_ANI_SPUR_IMMUNITY_LEVEL,

usr/src/uts/common/io/arn/arn_ani.c

552

(ah, ATH9K_ANI_OFDM_WEAK_SIGNAL_DETECTION,

usr/src/uts/common/io/arn/arn_ani.c

555

(void) ath9k_hw_ani_control(ah, ATH9K_ANI_CCK_WEAK_SIGNAL_THR,

usr/src/uts/common/io/arn/arn_ani.c

558

(void) ath9k_hw_ani_control(ah, ATH9K_ANI_FIRSTEP_LEVEL,

usr/src/uts/common/io/arn/arn_ani.c

561

ath9k_hw_setrxfilter(ah, ath9k_hw_getrxfilter(ah) &

usr/src/uts/common/io/arn/arn_ani.c

563

ath9k_ani_restart(ah);

usr/src/uts/common/io/arn/arn_ani.c

564

REG_WRITE(ah, AR_PHY_ERR_MASK_1, AR_PHY_ERR_OFDM_TIMING);

usr/src/uts/common/io/arn/arn_ani.c

565

REG_WRITE(ah, AR_PHY_ERR_MASK_2, AR_PHY_ERR_CCK_TIMING);

usr/src/uts/common/io/arn/arn_ani.c

568

ath9k_ani_restart(ah);

usr/src/uts/common/io/arn/arn_ani.c

569

ath9k_hw_setrxfilter(ah, ath9k_hw_getrxfilter(ah) |

usr/src/uts/common/io/arn/arn_ani.c

576

ath9k_hw_ani_monitor(struct ath_hal *ah, const struct ath9k_node_stats *stats,

usr/src/uts/common/io/arn/arn_ani.c

579

struct ath_hal_5416 *ahp = AH5416(ah);

usr/src/uts/common/io/arn/arn_ani.c

586

listenTime = ath9k_hw_ani_get_listen_time(ah);

usr/src/uts/common/io/arn/arn_ani.c

589

ath9k_ani_restart(ah);

usr/src/uts/common/io/arn/arn_ani.c

599

ath9k_hw_update_mibstats(ah, &ahp->ah_mibStats);

usr/src/uts/common/io/arn/arn_ani.c

601

phyCnt1 = REG_READ(ah, AR_PHY_ERR_1);

usr/src/uts/common/io/arn/arn_ani.c

602

phyCnt2 = REG_READ(ah, AR_PHY_ERR_2);

usr/src/uts/common/io/arn/arn_ani.c

612

REG_WRITE(ah, AR_PHY_ERR_1,

usr/src/uts/common/io/arn/arn_ani.c

614

REG_WRITE(ah, AR_PHY_ERR_MASK_1,

usr/src/uts/common/io/arn/arn_ani.c

623

REG_WRITE(ah, AR_PHY_ERR_2,

usr/src/uts/common/io/arn/arn_ani.c

625

REG_WRITE(ah, AR_PHY_ERR_MASK_2,

usr/src/uts/common/io/arn/arn_ani.c

642

if (!DO_ANI(ah))

usr/src/uts/common/io/arn/arn_ani.c

650

ath9k_hw_ani_lower_immunity(ah);

usr/src/uts/common/io/arn/arn_ani.c

651

ath9k_ani_restart(ah);

usr/src/uts/common/io/arn/arn_ani.c

655

ath9k_hw_ani_ofdm_err_trigger(ah);

usr/src/uts/common/io/arn/arn_ani.c

656

ath9k_ani_restart(ah);

usr/src/uts/common/io/arn/arn_ani.c

659

ath9k_hw_ani_cck_err_trigger(ah);

usr/src/uts/common/io/arn/arn_ani.c

660

ath9k_ani_restart(ah);

usr/src/uts/common/io/arn/arn_ani.c

666

ath9k_hw_phycounters(struct ath_hal *ah)

usr/src/uts/common/io/arn/arn_ani.c

668

struct ath_hal_5416 *ahp = AH5416(ah);

usr/src/uts/common/io/arn/arn_ani.c

674

ath9k_enable_mib_counters(struct ath_hal *ah)

usr/src/uts/common/io/arn/arn_ani.c

676

struct ath_hal_5416 *ahp = AH5416(ah);

usr/src/uts/common/io/arn/arn_ani.c

681

ath9k_hw_update_mibstats(ah, &ahp->ah_mibStats);

usr/src/uts/common/io/arn/arn_ani.c

683

REG_WRITE(ah, AR_FILT_OFDM, 0);

usr/src/uts/common/io/arn/arn_ani.c

684

REG_WRITE(ah, AR_FILT_CCK, 0);

usr/src/uts/common/io/arn/arn_ani.c

685

REG_WRITE(ah, AR_MIBC,

usr/src/uts/common/io/arn/arn_ani.c

687

REG_WRITE(ah, AR_PHY_ERR_MASK_1, AR_PHY_ERR_OFDM_TIMING);

usr/src/uts/common/io/arn/arn_ani.c

688

REG_WRITE(ah, AR_PHY_ERR_MASK_2, AR_PHY_ERR_CCK_TIMING);

usr/src/uts/common/io/arn/arn_ani.c

69

REG_RMW_FIELD(ah, AR_PHY_DESIRED_SZ,

usr/src/uts/common/io/arn/arn_ani.c

692

ath9k_hw_disable_mib_counters(struct ath_hal *ah)

usr/src/uts/common/io/arn/arn_ani.c

694

struct ath_hal_5416 *ahp = AH5416(ah);

usr/src/uts/common/io/arn/arn_ani.c

700

REG_WRITE(ah, AR_MIBC, AR_MIBC_FMC | AR_MIBC_CMC);

usr/src/uts/common/io/arn/arn_ani.c

702

ath9k_hw_update_mibstats(ah, &ahp->ah_mibStats);

usr/src/uts/common/io/arn/arn_ani.c

704

REG_WRITE(ah, AR_FILT_OFDM, 0);

usr/src/uts/common/io/arn/arn_ani.c

705

REG_WRITE(ah, AR_FILT_CCK, 0);

usr/src/uts/common/io/arn/arn_ani.c

709

ath9k_hw_GetMibCycleCountsPct(struct ath_hal *ah, uint32_t *rxc_pcnt,

usr/src/uts/common/io/arn/arn_ani.c

715

uint32_t rc = REG_READ(ah, AR_RCCNT);

usr/src/uts/common/io/arn/arn_ani.c

716

uint32_t rf = REG_READ(ah, AR_RFCNT);

usr/src/uts/common/io/arn/arn_ani.c

717

uint32_t tf = REG_READ(ah, AR_TFCNT);

usr/src/uts/common/io/arn/arn_ani.c

718

uint32_t cc = REG_READ(ah, AR_CCCNT);

usr/src/uts/common/io/arn/arn_ani.c

72

REG_RMW_FIELD(ah, AR_PHY_AGC_CTL1,

usr/src/uts/common/io/arn/arn_ani.c

75

REG_RMW_FIELD(ah, AR_PHY_AGC_CTL1,

usr/src/uts/common/io/arn/arn_ani.c

754

ath9k_hw_procmibevent(struct ath_hal *ah,

usr/src/uts/common/io/arn/arn_ani.c

757

struct ath_hal_5416 *ahp = AH5416(ah);

usr/src/uts/common/io/arn/arn_ani.c

761

REG_WRITE(ah, AR_FILT_OFDM, 0);

usr/src/uts/common/io/arn/arn_ani.c

762

REG_WRITE(ah, AR_FILT_CCK, 0);

usr/src/uts/common/io/arn/arn_ani.c

763

if (!(REG_READ(ah, AR_SLP_MIB_CTRL) & AR_SLP_MIB_PENDING))

usr/src/uts/common/io/arn/arn_ani.c

764

REG_WRITE(ah, AR_SLP_MIB_CTRL, AR_SLP_MIB_CLEAR);

usr/src/uts/common/io/arn/arn_ani.c

767

ath9k_hw_update_mibstats(ah, &ahp->ah_mibStats);

usr/src/uts/common/io/arn/arn_ani.c

770

if (!DO_ANI(ah))

usr/src/uts/common/io/arn/arn_ani.c

774

phyCnt1 = REG_READ(ah, AR_PHY_ERR_1);

usr/src/uts/common/io/arn/arn_ani.c

775

phyCnt2 = REG_READ(ah, AR_PHY_ERR_2);

usr/src/uts/common/io/arn/arn_ani.c

78

REG_RMW_FIELD(ah, AR_PHY_FIND_SIG,

usr/src/uts/common/io/arn/arn_ani.c

799

ath9k_hw_ani_ofdm_err_trigger(ah);

usr/src/uts/common/io/arn/arn_ani.c

801

ath9k_hw_ani_cck_err_trigger(ah);

usr/src/uts/common/io/arn/arn_ani.c

803

ath9k_ani_restart(ah);

usr/src/uts/common/io/arn/arn_ani.c

808

ath9k_hw_ani_setup(struct ath_hal *ah)

usr/src/uts/common/io/arn/arn_ani.c

810

struct ath_hal_5416 *ahp = AH5416(ah);

usr/src/uts/common/io/arn/arn_ani.c

827

ath9k_hw_ani_attach(struct ath_hal *ah)

usr/src/uts/common/io/arn/arn_ani.c

829

struct ath_hal_5416 *ahp = AH5416(ah);

usr/src/uts/common/io/arn/arn_ani.c

869

REG_WRITE(ah, AR_PHY_ERR_1, ahp->ah_ani[0].ofdmPhyErrBase);

usr/src/uts/common/io/arn/arn_ani.c

870

REG_WRITE(ah, AR_PHY_ERR_2, ahp->ah_ani[0].cckPhyErrBase);

usr/src/uts/common/io/arn/arn_ani.c

871

ath9k_enable_mib_counters(ah);

usr/src/uts/common/io/arn/arn_ani.c

874

if (ah->ah_config.enable_ani)

usr/src/uts/common/io/arn/arn_ani.c

879

ath9k_hw_ani_detach(struct ath_hal *ah)

usr/src/uts/common/io/arn/arn_ani.c

881

struct ath_hal_5416 *ahp = AH5416(ah);

usr/src/uts/common/io/arn/arn_ani.c

887

ath9k_hw_disable_mib_counters(ah);

usr/src/uts/common/io/arn/arn_ani.c

888

REG_WRITE(ah, AR_PHY_ERR_1, 0);

usr/src/uts/common/io/arn/arn_ani.c

889

REG_WRITE(ah, AR_PHY_ERR_2, 0);

usr/src/uts/common/io/arn/arn_ani.c

98

REG_RMW_FIELD(ah, AR_PHY_SFCORR_LOW,

usr/src/uts/common/io/arn/arn_ath9k.h

1002

void ath9k_hw_set_addac(struct ath_hal *ah, struct ath9k_channel *chan);

usr/src/uts/common/io/arn/arn_ath9k.h

1003

boolean_t ath9k_hw_set_power_per_rate_table(struct ath_hal *ah,

usr/src/uts/common/io/arn/arn_ath9k.h

1010

boolean_t ath9k_hw_set_power_cal_table(struct ath_hal *ah,

usr/src/uts/common/io/arn/arn_ath9k.h

1012

boolean_t ath9k_hw_eeprom_set_board_values(struct ath_hal *ah,

usr/src/uts/common/io/arn/arn_ath9k.h

1014

int ath9k_hw_get_eeprom_antenna_cfg(struct ath_hal *ah,

usr/src/uts/common/io/arn/arn_ath9k.h

1017

uint8_t ath9k_hw_get_num_ant_config(struct ath_hal *ah,

usr/src/uts/common/io/arn/arn_ath9k.h

1020

uint16_t ath9k_hw_eeprom_get_spur_chan(struct ath_hal *ah, uint16_t i,

usr/src/uts/common/io/arn/arn_ath9k.h

1022

int ath9k_hw_eeprom_attach(struct ath_hal *ah);

usr/src/uts/common/io/arn/arn_ath9k.h

1026

boolean_t ath9k_hw_intrpend(struct ath_hal *ah);

usr/src/uts/common/io/arn/arn_ath9k.h

1027

boolean_t ath9k_hw_getisr(struct ath_hal *ah, enum ath9k_int *masked);

usr/src/uts/common/io/arn/arn_ath9k.h

1028

enum ath9k_int ath9k_hw_intrget(struct ath_hal *ah);

usr/src/uts/common/io/arn/arn_ath9k.h

1029

enum ath9k_int ath9k_hw_set_interrupts(struct ath_hal *ah, enum ath9k_int ints);

usr/src/uts/common/io/arn/arn_ath9k.h

1033

void ath9k_hw_dmaRegDump(struct ath_hal *ah);

usr/src/uts/common/io/arn/arn_ath9k.h

1034

uint32_t ath9k_hw_gettxbuf(struct ath_hal *ah, uint32_t q);

usr/src/uts/common/io/arn/arn_ath9k.h

1035

boolean_t ath9k_hw_puttxbuf(struct ath_hal *ah, uint32_t q, uint32_t txdp);

usr/src/uts/common/io/arn/arn_ath9k.h

1036

boolean_t ath9k_hw_txstart(struct ath_hal *ah, uint32_t q);

usr/src/uts/common/io/arn/arn_ath9k.h

1037

uint32_t ath9k_hw_numtxpending(struct ath_hal *ah, uint32_t q);

usr/src/uts/common/io/arn/arn_ath9k.h

1038

boolean_t ath9k_hw_updatetxtriglevel(struct ath_hal *ah,

usr/src/uts/common/io/arn/arn_ath9k.h

1040

boolean_t ath9k_hw_stoptxdma(struct ath_hal *ah, uint32_t q);

usr/src/uts/common/io/arn/arn_ath9k.h

1041

boolean_t ath9k_hw_filltxdesc(struct ath_hal *ah, struct ath_desc *ds,

usr/src/uts/common/io/arn/arn_ath9k.h

1044

void ath9k_hw_cleartxdesc(struct ath_hal *ah, struct ath_desc *ds);

usr/src/uts/common/io/arn/arn_ath9k.h

1045

int ath9k_hw_txprocdesc(struct ath_hal *ah, struct ath_desc *ds);

usr/src/uts/common/io/arn/arn_ath9k.h

1046

void ath9k_hw_set11n_txdesc(struct ath_hal *ah, struct ath_desc *ds,

usr/src/uts/common/io/arn/arn_ath9k.h

1049

void ath9k_hw_set11n_ratescenario(struct ath_hal *ah, struct ath_desc *ds,

usr/src/uts/common/io/arn/arn_ath9k.h

1055

void ath9k_hw_set11n_aggr_first(struct ath_hal *ah, struct ath_desc *ds,

usr/src/uts/common/io/arn/arn_ath9k.h

1057

void ath9k_hw_set11n_aggr_middle(struct ath_hal *ah, struct ath_desc *ds,

usr/src/uts/common/io/arn/arn_ath9k.h

1059

void ath9k_hw_set11n_aggr_last(struct ath_hal *ah, struct ath_desc *ds);

usr/src/uts/common/io/arn/arn_ath9k.h

1060

void ath9k_hw_clr11n_aggr(struct ath_hal *ah, struct ath_desc *ds);

usr/src/uts/common/io/arn/arn_ath9k.h

1061

void ath9k_hw_set11n_burstduration(struct ath_hal *ah, struct ath_desc *ds,

usr/src/uts/common/io/arn/arn_ath9k.h

1063

void ath9k_hw_set11n_virtualmorefrag(struct ath_hal *ah, struct ath_desc *ds,

usr/src/uts/common/io/arn/arn_ath9k.h

1065

void ath9k_hw_gettxintrtxqs(struct ath_hal *ah, uint32_t *txqs);

usr/src/uts/common/io/arn/arn_ath9k.h

1066

boolean_t ath9k_hw_set_txq_props(struct ath_hal *ah, int q,

usr/src/uts/common/io/arn/arn_ath9k.h

1068

boolean_t ath9k_hw_get_txq_props(struct ath_hal *ah, int q,

usr/src/uts/common/io/arn/arn_ath9k.h

1070

int ath9k_hw_setuptxqueue(struct ath_hal *ah, enum ath9k_tx_queue type,

usr/src/uts/common/io/arn/arn_ath9k.h

1072

boolean_t ath9k_hw_releasetxqueue(struct ath_hal *ah, uint32_t q);

usr/src/uts/common/io/arn/arn_ath9k.h

1073

boolean_t ath9k_hw_resettxqueue(struct ath_hal *ah, uint32_t q);

usr/src/uts/common/io/arn/arn_ath9k.h

1074

int ath9k_hw_rxprocdesc(struct ath_hal *ah, struct ath_desc *ds,

usr/src/uts/common/io/arn/arn_ath9k.h

1076

boolean_t ath9k_hw_setuprxdesc(struct ath_hal *ah, struct ath_desc *ds,

usr/src/uts/common/io/arn/arn_ath9k.h

1078

boolean_t ath9k_hw_setrxabort(struct ath_hal *ah, boolean_t set);

usr/src/uts/common/io/arn/arn_ath9k.h

1079

void ath9k_hw_putrxbuf(struct ath_hal *ah, uint32_t rxdp);

usr/src/uts/common/io/arn/arn_ath9k.h

1080

void ath9k_hw_rxena(struct ath_hal *ah);

usr/src/uts/common/io/arn/arn_ath9k.h

1081

void ath9k_hw_startpcureceive(struct ath_hal *ah);

usr/src/uts/common/io/arn/arn_ath9k.h

1082

void ath9k_hw_stoppcurecv(struct ath_hal *ah);

usr/src/uts/common/io/arn/arn_ath9k.h

1083

boolean_t ath9k_hw_stopdmarecv(struct ath_hal *ah);

usr/src/uts/common/io/arn/arn_ath9k.h

839

enum wireless_mode ath9k_hw_chan2wmode(struct ath_hal *ah,

usr/src/uts/common/io/arn/arn_ath9k.h

841

boolean_t ath9k_hw_wait(struct ath_hal *ah, uint32_t reg, uint32_t mask,

usr/src/uts/common/io/arn/arn_ath9k.h

844

boolean_t ath9k_get_channel_edges(struct ath_hal *ah,

usr/src/uts/common/io/arn/arn_ath9k.h

846

uint16_t ath9k_hw_computetxtime(struct ath_hal *ah,

usr/src/uts/common/io/arn/arn_ath9k.h

850

uint32_t ath9k_hw_mhz2ieee(struct ath_hal *ah, uint32_t freq, uint32_t flags);

usr/src/uts/common/io/arn/arn_ath9k.h

851

void ath9k_hw_get_channel_centers(struct ath_hal *ah,

usr/src/uts/common/io/arn/arn_ath9k.h

858

void ath9k_hw_detach(struct ath_hal *ah);

usr/src/uts/common/io/arn/arn_ath9k.h

861

void ath9k_hw_rfdetach(struct ath_hal *ah);

usr/src/uts/common/io/arn/arn_ath9k.h

866

boolean_t ath9k_hw_reset(struct ath_hal *ah, struct ath9k_channel *chan,

usr/src/uts/common/io/arn/arn_ath9k.h

874

boolean_t ath9k_hw_keyreset(struct ath_hal *ah, uint16_t entry);

usr/src/uts/common/io/arn/arn_ath9k.h

875

boolean_t ath9k_hw_keysetmac(struct ath_hal *ah, uint16_t entry,

usr/src/uts/common/io/arn/arn_ath9k.h

877

boolean_t ath9k_hw_set_keycache_entry(struct ath_hal *ah, uint16_t entry,

usr/src/uts/common/io/arn/arn_ath9k.h

879

boolean_t ath9k_hw_keyisvalid(struct ath_hal *ah, uint16_t entry);

usr/src/uts/common/io/arn/arn_ath9k.h

883

boolean_t ath9k_hw_setpower(struct ath_hal *ah,

usr/src/uts/common/io/arn/arn_ath9k.h

885

void ath9k_hw_configpcipowersave(struct ath_hal *ah, int restore);

usr/src/uts/common/io/arn/arn_ath9k.h

889

void ath9k_hw_beaconinit(struct ath_hal *ah, uint32_t next_beacon,

usr/src/uts/common/io/arn/arn_ath9k.h

891

void ath9k_hw_set_sta_beacon_timers(struct ath_hal *ah,

usr/src/uts/common/io/arn/arn_ath9k.h

895

boolean_t ath9k_hw_fill_cap_info(struct ath_hal *ah);

usr/src/uts/common/io/arn/arn_ath9k.h

896

boolean_t ath9k_hw_getcapability(struct ath_hal *ah,

usr/src/uts/common/io/arn/arn_ath9k.h

899

boolean_t ath9k_hw_setcapability(struct ath_hal *ah,

usr/src/uts/common/io/arn/arn_ath9k.h

906

void ath9k_hw_cfg_gpio_input(struct ath_hal *ah, uint32_t gpio);

usr/src/uts/common/io/arn/arn_ath9k.h

907

uint32_t ath9k_hw_gpio_get(struct ath_hal *ah, uint32_t gpio);

usr/src/uts/common/io/arn/arn_ath9k.h

908

void ath9k_hw_cfg_output(struct ath_hal *ah, uint32_t gpio,

usr/src/uts/common/io/arn/arn_ath9k.h

910

void ath9k_hw_set_gpio(struct ath_hal *ah, uint32_t gpio, uint32_t val);

usr/src/uts/common/io/arn/arn_ath9k.h

912

void ath9k_enable_rfkill(struct ath_hal *ah);

usr/src/uts/common/io/arn/arn_ath9k.h

914

int ath9k_hw_select_antconfig(struct ath_hal *ah, uint32_t cfg);

usr/src/uts/common/io/arn/arn_ath9k.h

915

uint32_t ath9k_hw_getdefantenna(struct ath_hal *ah);

usr/src/uts/common/io/arn/arn_ath9k.h

916

void ath9k_hw_setantenna(struct ath_hal *ah, uint32_t antenna);

usr/src/uts/common/io/arn/arn_ath9k.h

917

boolean_t ath9k_hw_setantennaswitch(struct ath_hal *ah,

usr/src/uts/common/io/arn/arn_ath9k.h

926

uint32_t ath9k_hw_getrxfilter(struct ath_hal *ah);

usr/src/uts/common/io/arn/arn_ath9k.h

927

void ath9k_hw_setrxfilter(struct ath_hal *ah, uint32_t bits);

usr/src/uts/common/io/arn/arn_ath9k.h

928

boolean_t ath9k_hw_phy_disable(struct ath_hal *ah);

usr/src/uts/common/io/arn/arn_ath9k.h

929

boolean_t ath9k_hw_disable(struct ath_hal *ah);

usr/src/uts/common/io/arn/arn_ath9k.h

930

boolean_t ath9k_hw_set_txpowerlimit(struct ath_hal *ah, uint32_t limit);

usr/src/uts/common/io/arn/arn_ath9k.h

931

void ath9k_hw_getmac(struct ath_hal *ah, uint8_t *mac);

usr/src/uts/common/io/arn/arn_ath9k.h

932

boolean_t ath9k_hw_setmac(struct ath_hal *ah, const uint8_t *mac);

usr/src/uts/common/io/arn/arn_ath9k.h

933

void ath9k_hw_setopmode(struct ath_hal *ah);

usr/src/uts/common/io/arn/arn_ath9k.h

934

void ath9k_hw_setmcastfilter(struct ath_hal *ah, uint32_t filter0,

usr/src/uts/common/io/arn/arn_ath9k.h

936

void ath9k_hw_getbssidmask(struct ath_hal *ah, uint8_t *mask);

usr/src/uts/common/io/arn/arn_ath9k.h

937

boolean_t ath9k_hw_setbssidmask(struct ath_hal *ah, const uint8_t *mask);

usr/src/uts/common/io/arn/arn_ath9k.h

938

void ath9k_hw_write_associd(struct ath_hal *ah, const uint8_t *bssid,

usr/src/uts/common/io/arn/arn_ath9k.h

940

uint64_t ath9k_hw_gettsf64(struct ath_hal *ah);

usr/src/uts/common/io/arn/arn_ath9k.h

941

void ath9k_hw_reset_tsf(struct ath_hal *ah);

usr/src/uts/common/io/arn/arn_ath9k.h

942

boolean_t ath9k_hw_set_tsfadjust(struct ath_hal *ah, uint32_t setting);

usr/src/uts/common/io/arn/arn_ath9k.h

943

boolean_t ath9k_hw_setslottime(struct ath_hal *ah, uint32_t us);

usr/src/uts/common/io/arn/arn_ath9k.h

944

void ath9k_hw_set11nmac2040(struct ath_hal *ah, enum ath9k_ht_macmode mode);

usr/src/uts/common/io/arn/arn_ath9k.h

948

boolean_t ath9k_regd_is_public_safety_sku(struct ath_hal *ah);

usr/src/uts/common/io/arn/arn_ath9k.h

949

struct ath9k_channel *ath9k_regd_check_channel(struct ath_hal *ah,

usr/src/uts/common/io/arn/arn_ath9k.h

951

uint32_t ath9k_regd_get_ctl(struct ath_hal *ah, struct ath9k_channel *chan);

usr/src/uts/common/io/arn/arn_ath9k.h

952

uint32_t ath9k_regd_get_antenna_allowed(struct ath_hal *ah,

usr/src/uts/common/io/arn/arn_ath9k.h

954

boolean_t ath9k_regd_init_channels(struct ath_hal *ah,

usr/src/uts/common/io/arn/arn_ath9k.h

961

void ath9k_ani_reset(struct ath_hal *ah);

usr/src/uts/common/io/arn/arn_ath9k.h

962

void ath9k_hw_ani_monitor(struct ath_hal *ah,

usr/src/uts/common/io/arn/arn_ath9k.h

965

boolean_t ath9k_hw_phycounters(struct ath_hal *ah);

usr/src/uts/common/io/arn/arn_ath9k.h

966

void ath9k_enable_mib_counters(struct ath_hal *ah);

usr/src/uts/common/io/arn/arn_ath9k.h

967

void ath9k_hw_disable_mib_counters(struct ath_hal *ah);

usr/src/uts/common/io/arn/arn_ath9k.h

968

uint32_t ath9k_hw_GetMibCycleCountsPct(struct ath_hal *ah,

usr/src/uts/common/io/arn/arn_ath9k.h

972

void ath9k_hw_procmibevent(struct ath_hal *ah,

usr/src/uts/common/io/arn/arn_ath9k.h

974

void ath9k_hw_ani_setup(struct ath_hal *ah);

usr/src/uts/common/io/arn/arn_ath9k.h

975

void ath9k_hw_ani_attach(struct ath_hal *ah);

usr/src/uts/common/io/arn/arn_ath9k.h

976

void ath9k_hw_ani_detach(struct ath_hal *ah);

usr/src/uts/common/io/arn/arn_ath9k.h

980

void ath9k_hw_reset_calvalid(struct ath_hal *ah, struct ath9k_channel *chan,

usr/src/uts/common/io/arn/arn_ath9k.h

982

void ath9k_hw_start_nfcal(struct ath_hal *ah);

usr/src/uts/common/io/arn/arn_ath9k.h

983

void ath9k_hw_loadnf(struct ath_hal *ah, struct ath9k_channel *chan);

usr/src/uts/common/io/arn/arn_ath9k.h

984

int16_t ath9k_hw_getnf(struct ath_hal *ah, struct ath9k_channel *chan);

usr/src/uts/common/io/arn/arn_ath9k.h

985

void ath9k_init_nfcal_hist_buffer(struct ath_hal *ah);

usr/src/uts/common/io/arn/arn_ath9k.h

986

signed short ath9k_hw_getchan_noise(struct ath_hal *ah,

usr/src/uts/common/io/arn/arn_ath9k.h

988

boolean_t ath9k_hw_calibrate(struct ath_hal *ah, struct ath9k_channel *chan,

usr/src/uts/common/io/arn/arn_ath9k.h

990

boolean_t ath9k_hw_init_cal(struct ath_hal *ah,

usr/src/uts/common/io/arn/arn_ath9k.h

996

int ath9k_hw_set_txpower(struct ath_hal *ah,

usr/src/uts/common/io/arn/arn_beacon.c

106

ath9k_hw_set11n_ratescenario(ah, ds, ds, 0,

usr/src/uts/common/io/arn/arn_beacon.c

123

struct ath_hal *ah = sc->sc_ah;

usr/src/uts/common/io/arn/arn_beacon.c

138

if (!ath9k_hw_stoptxdma(ah, sc->sc_beaconq)) {

usr/src/uts/common/io/arn/arn_beacon.c

145

(void) ath9k_hw_puttxbuf(ah, sc->sc_beaconq, bf->bf_daddr);

usr/src/uts/common/io/arn/arn_beacon.c

146

(void) ath9k_hw_txstart(ah, sc->sc_beaconq);

usr/src/uts/common/io/arn/arn_beacon.c

155

arn_beaconq_setup(struct ath_hal *ah)

usr/src/uts/common/io/arn/arn_beacon.c

164

return (ath9k_hw_setuptxqueue(ah, ATH9K_TX_QUEUE_BEACON, &qi));

usr/src/uts/common/io/arn/arn_beacon.c

44

struct ath_hal *ah = sc->sc_ah;

usr/src/uts/common/io/arn/arn_beacon.c

59

(ah->ah_caps.hw_caps & ATH9K_HW_CAP_VEOL)) {

usr/src/uts/common/io/arn/arn_beacon.c

86

ath9k_hw_set11n_txdesc(ah, ds,

usr/src/uts/common/io/arn/arn_beacon.c

95

(void) ath9k_hw_filltxdesc(ah, ds,

usr/src/uts/common/io/arn/arn_calib.c

1000

if (ath9k_hw_iscal_supported(ah, chan, IQ_MISMATCH_CAL)) {

usr/src/uts/common/io/arn/arn_calib.c

1013

ath9k_hw_reset_calibration(ah, ahp->ah_cal_list_curr);

usr/src/uts/common/io/arn/arn_calib.c

106

ath9k_hw_do_getnf(struct ath_hal *ah,

usr/src/uts/common/io/arn/arn_calib.c

111

if (AR_SREV_9280_10_OR_LATER(ah))

usr/src/uts/common/io/arn/arn_calib.c

112

nf = MS(REG_READ(ah, AR_PHY_CCA), AR9280_PHY_MINCCA_PWR);

usr/src/uts/common/io/arn/arn_calib.c

114

nf = MS(REG_READ(ah, AR_PHY_CCA), AR_PHY_MINCCA_PWR);

usr/src/uts/common/io/arn/arn_calib.c

122

if (AR_SREV_9280_10_OR_LATER(ah))

usr/src/uts/common/io/arn/arn_calib.c

123

nf = MS(REG_READ(ah, AR_PHY_CH1_CCA),

usr/src/uts/common/io/arn/arn_calib.c

126

nf = MS(REG_READ(ah, AR_PHY_CH1_CCA),

usr/src/uts/common/io/arn/arn_calib.c

135

if (!AR_SREV_9280(ah)) {

usr/src/uts/common/io/arn/arn_calib.c

136

nf = MS(REG_READ(ah, AR_PHY_CH2_CCA),

usr/src/uts/common/io/arn/arn_calib.c

145

if (AR_SREV_9280_10_OR_LATER(ah))

usr/src/uts/common/io/arn/arn_calib.c

146

nf = MS(REG_READ(ah, AR_PHY_EXT_CCA),

usr/src/uts/common/io/arn/arn_calib.c

149

nf = MS(REG_READ(ah, AR_PHY_EXT_CCA),

usr/src/uts/common/io/arn/arn_calib.c

158

if (AR_SREV_9280_10_OR_LATER(ah))

usr/src/uts/common/io/arn/arn_calib.c

159

nf = MS(REG_READ(ah, AR_PHY_CH1_EXT_CCA),

usr/src/uts/common/io/arn/arn_calib.c

162

nf = MS(REG_READ(ah, AR_PHY_CH1_EXT_CCA),

usr/src/uts/common/io/arn/arn_calib.c

171

if (!AR_SREV_9280(ah)) {

usr/src/uts/common/io/arn/arn_calib.c

172

nf = MS(REG_READ(ah, AR_PHY_CH2_EXT_CCA),

usr/src/uts/common/io/arn/arn_calib.c

183

getNoiseFloorThresh(struct ath_hal *ah,

usr/src/uts/common/io/arn/arn_calib.c

192

*nft = (int8_t)ath9k_hw_get_eeprom(ah, EEP_NFTHRESH_5);

usr/src/uts/common/io/arn/arn_calib.c

199

*nft = (int8_t)ath9k_hw_get_eeprom(ah, EEP_NFTHRESH_2);

usr/src/uts/common/io/arn/arn_calib.c

212

ath9k_hw_setup_calibration(struct ath_hal *ah,

usr/src/uts/common/io/arn/arn_calib.c

215

REG_RMW_FIELD(ah, AR_PHY_TIMING_CTRL4(0),

usr/src/uts/common/io/arn/arn_calib.c

221

REG_WRITE(ah, AR_PHY_CALMODE, AR_PHY_CALMODE_IQ);

usr/src/uts/common/io/arn/arn_calib.c

227

REG_WRITE(ah, AR_PHY_CALMODE, AR_PHY_CALMODE_ADC_GAIN);

usr/src/uts/common/io/arn/arn_calib.c

232

REG_WRITE(ah, AR_PHY_CALMODE, AR_PHY_CALMODE_ADC_DC_PER);

usr/src/uts/common/io/arn/arn_calib.c

237

REG_WRITE(ah, AR_PHY_CALMODE, AR_PHY_CALMODE_ADC_DC_INIT);

usr/src/uts/common/io/arn/arn_calib.c

244

REG_SET_BIT(ah, AR_PHY_TIMING_CTRL4(0),

usr/src/uts/common/io/arn/arn_calib.c

249

ath9k_hw_reset_calibration(struct ath_hal *ah,

usr/src/uts/common/io/arn/arn_calib.c

252

struct ath_hal_5416 *ahp = AH5416(ah);

usr/src/uts/common/io/arn/arn_calib.c

255

ath9k_hw_setup_calibration(ah, currCal);

usr/src/uts/common/io/arn/arn_calib.c

270

ath9k_hw_per_calibration(struct ath_hal *ah,

usr/src/uts/common/io/arn/arn_calib.c

276

struct ath_hal_5416 *ahp = AH5416(ah);

usr/src/uts/common/io/arn/arn_calib.c

281

if (!(REG_READ(ah, AR_PHY_TIMING_CTRL4(0)) &

usr/src/uts/common/io/arn/arn_calib.c

284

currCal->calData->calCollect(ah);

usr/src/uts/common/io/arn/arn_calib.c

295

currCal->calData->calPostProc(ah, numChains);

usr/src/uts/common/io/arn/arn_calib.c

300

ath9k_hw_setup_calibration(ah, currCal);

usr/src/uts/common/io/arn/arn_calib.c

304

ath9k_hw_reset_calibration(ah, currCal);

usr/src/uts/common/io/arn/arn_calib.c

309

ath9k_hw_iscal_supported(struct ath_hal *ah,

usr/src/uts/common/io/arn/arn_calib.c

313

struct ath_hal_5416 *ahp = AH5416(ah);

usr/src/uts/common/io/arn/arn_calib.c

333

ath9k_hw_iqcal_collect(struct ath_hal *ah)

usr/src/uts/common/io/arn/arn_calib.c

335

struct ath_hal_5416 *ahp = AH5416(ah);

usr/src/uts/common/io/arn/arn_calib.c

340

REG_READ(ah, AR_PHY_CAL_MEAS_0(i));

usr/src/uts/common/io/arn/arn_calib.c

342

REG_READ(ah, AR_PHY_CAL_MEAS_1(i));

usr/src/uts/common/io/arn/arn_calib.c

344

(int32_t)REG_READ(ah, AR_PHY_CAL_MEAS_2(i));

usr/src/uts/common/io/arn/arn_calib.c

354

ath9k_hw_adc_gaincal_collect(struct ath_hal *ah)

usr/src/uts/common/io/arn/arn_calib.c

356

struct ath_hal_5416 *ahp = AH5416(ah);

usr/src/uts/common/io/arn/arn_calib.c

361

REG_READ(ah, AR_PHY_CAL_MEAS_0(i));

usr/src/uts/common/io/arn/arn_calib.c

363

REG_READ(ah, AR_PHY_CAL_MEAS_1(i));

usr/src/uts/common/io/arn/arn_calib.c

365

REG_READ(ah, AR_PHY_CAL_MEAS_2(i));

usr/src/uts/common/io/arn/arn_calib.c

367

REG_READ(ah, AR_PHY_CAL_MEAS_3(i));

usr/src/uts/common/io/arn/arn_calib.c

380

ath9k_hw_adc_dccal_collect(struct ath_hal *ah)

usr/src/uts/common/io/arn/arn_calib.c

382

struct ath_hal_5416 *ahp = AH5416(ah);

usr/src/uts/common/io/arn/arn_calib.c

387

(int32_t)REG_READ(ah, AR_PHY_CAL_MEAS_0(i));

usr/src/uts/common/io/arn/arn_calib.c

389

(int32_t)REG_READ(ah, AR_PHY_CAL_MEAS_1(i));

usr/src/uts/common/io/arn/arn_calib.c

391

(int32_t)REG_READ(ah, AR_PHY_CAL_MEAS_2(i));

usr/src/uts/common/io/arn/arn_calib.c

393

(int32_t)REG_READ(ah, AR_PHY_CAL_MEAS_3(i));

usr/src/uts/common/io/arn/arn_calib.c

40

ath9k_hw_nf_in_range(struct ath_hal *ah, signed short nf)

usr/src/uts/common/io/arn/arn_calib.c

406

ath9k_hw_iqcalibrate(struct ath_hal *ah, uint8_t numChains)

usr/src/uts/common/io/arn/arn_calib.c

408

struct ath_hal_5416 *ahp = AH5416(ah);

usr/src/uts/common/io/arn/arn_calib.c

469

REG_RMW_FIELD(ah, AR_PHY_TIMING_CTRL4(i),

usr/src/uts/common/io/arn/arn_calib.c

472

REG_RMW_FIELD(ah, AR_PHY_TIMING_CTRL4(i),

usr/src/uts/common/io/arn/arn_calib.c

482

REG_SET_BIT(ah, AR_PHY_TIMING_CTRL4(0),

usr/src/uts/common/io/arn/arn_calib.c

487

ath9k_hw_adc_gaincal_calibrate(struct ath_hal *ah, uint8_t numChains)

usr/src/uts/common/io/arn/arn_calib.c

489

struct ath_hal_5416 *ahp = AH5416(ah);

usr/src/uts/common/io/arn/arn_calib.c

531

val = REG_READ(ah, AR_PHY_NEW_ADC_DC_GAIN_CORR(i));

usr/src/uts/common/io/arn/arn_calib.c

534

REG_WRITE(ah, AR_PHY_NEW_ADC_DC_GAIN_CORR(i), val);

usr/src/uts/common/io/arn/arn_calib.c

541

REG_WRITE(ah, AR_PHY_NEW_ADC_DC_GAIN_CORR(0),

usr/src/uts/common/io/arn/arn_calib.c

542

REG_READ(ah, AR_PHY_NEW_ADC_DC_GAIN_CORR(0)) |

usr/src/uts/common/io/arn/arn_calib.c

547

ath9k_hw_adc_dccal_calibrate(struct ath_hal *ah, uint8_t numChains)

usr/src/uts/common/io/arn/arn_calib.c

549

struct ath_hal_5416 *ahp = AH5416(ah);

usr/src/uts/common/io/arn/arn_calib.c

591

val = REG_READ(ah, AR_PHY_NEW_ADC_DC_GAIN_CORR(i));

usr/src/uts/common/io/arn/arn_calib.c

594

REG_WRITE(ah, AR_PHY_NEW_ADC_DC_GAIN_CORR(i), val);

usr/src/uts/common/io/arn/arn_calib.c

600

REG_WRITE(ah, AR_PHY_NEW_ADC_DC_GAIN_CORR(0),

usr/src/uts/common/io/arn/arn_calib.c

601

REG_READ(ah, AR_PHY_NEW_ADC_DC_GAIN_CORR(0)) |

usr/src/uts/common/io/arn/arn_calib.c

606

ath9k_hw_reset_calvalid(struct ath_hal *ah, struct ath9k_channel *chan,

usr/src/uts/common/io/arn/arn_calib.c

609

struct ath_hal_5416 *ahp = AH5416(ah);

usr/src/uts/common/io/arn/arn_calib.c

611

ath9k_regd_check_channel(ah, chan);

usr/src/uts/common/io/arn/arn_calib.c

616

if (!AR_SREV_9100(ah) && !AR_SREV_9160_10_OR_LATER(ah))

usr/src/uts/common/io/arn/arn_calib.c

638

if (!ath9k_hw_iscal_supported(ah, chan, currCal->calData->calType))

usr/src/uts/common/io/arn/arn_calib.c

652

ath9k_hw_start_nfcal(struct ath_hal *ah)

usr/src/uts/common/io/arn/arn_calib.c

654

REG_SET_BIT(ah, AR_PHY_AGC_CONTROL,

usr/src/uts/common/io/arn/arn_calib.c

656

REG_SET_BIT(ah, AR_PHY_AGC_CONTROL,

usr/src/uts/common/io/arn/arn_calib.c

658

REG_SET_BIT(ah, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_NF);

usr/src/uts/common/io/arn/arn_calib.c

663

ath9k_hw_loadnf(struct ath_hal *ah, struct ath9k_channel *chan)

usr/src/uts/common/io/arn/arn_calib.c

678

if (AR_SREV_9280(ah))

usr/src/uts/common/io/arn/arn_calib.c

686

h = ah->nfCalHist;

usr/src/uts/common/io/arn/arn_calib.c

691

val = REG_READ(ah, ar5416_cca_regs[i]);

usr/src/uts/common/io/arn/arn_calib.c

694

REG_WRITE(ah, ar5416_cca_regs[i], val);

usr/src/uts/common/io/arn/arn_calib.c

698

REG_CLR_BIT(ah, AR_PHY_AGC_CONTROL,

usr/src/uts/common/io/arn/arn_calib.c

700

REG_CLR_BIT(ah, AR_PHY_AGC_CONTROL,

usr/src/uts/common/io/arn/arn_calib.c

702

REG_SET_BIT(ah, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_NF);

usr/src/uts/common/io/arn/arn_calib.c

705

if ((REG_READ(ah, AR_PHY_AGC_CONTROL) &

usr/src/uts/common/io/arn/arn_calib.c

713

val = REG_READ(ah, ar5416_cca_regs[i]);

usr/src/uts/common/io/arn/arn_calib.c

716

REG_WRITE(ah, ar5416_cca_regs[i], val);

usr/src/uts/common/io/arn/arn_calib.c

722

ath9k_hw_getnf(struct ath_hal *ah, struct ath9k_channel *chan)

usr/src/uts/common/io/arn/arn_calib.c

729

if (REG_READ(ah, AR_PHY_AGC_CONTROL) & AR_PHY_AGC_CONTROL_NF) {

usr/src/uts/common/io/arn/arn_calib.c

737

ath9k_hw_do_getnf(ah, nfarray);

usr/src/uts/common/io/arn/arn_calib.c

739

if (getNoiseFloorThresh(ah, chan, &nfThresh) &&

usr/src/uts/common/io/arn/arn_calib.c

752

h = ah->nfCalHist;

usr/src/uts/common/io/arn/arn_calib.c

762

ath9k_init_nfcal_hist_buffer(struct ath_hal *ah)

usr/src/uts/common/io/arn/arn_calib.c

767

if (AR_SREV_9280(ah))

usr/src/uts/common/io/arn/arn_calib.c

769

else if (AR_SREV_9285(ah))

usr/src/uts/common/io/arn/arn_calib.c

775

ah->nfCalHist[i].currIndex = 0;

usr/src/uts/common/io/arn/arn_calib.c

776

ah->nfCalHist[i].privNF = noise_floor;

usr/src/uts/common/io/arn/arn_calib.c

777

ah->nfCalHist[i].invalidNFcount =

usr/src/uts/common/io/arn/arn_calib.c

780

ah->nfCalHist[i].nfCalBuffer[j] = noise_floor;

usr/src/uts/common/io/arn/arn_calib.c

786

ath9k_hw_getchan_noise(struct ath_hal *ah, struct ath9k_channel *chan)

usr/src/uts/common/io/arn/arn_calib.c

791

ichan = ath9k_regd_check_channel(ah, chan);

usr/src/uts/common/io/arn/arn_calib.c

799

enum wireless_mode mode = ath9k_hw_chan2wmode(ah, chan);

usr/src/uts/common/io/arn/arn_calib.c

804

if (!ath9k_hw_nf_in_range(ah, nf))

usr/src/uts/common/io/arn/arn_calib.c

811

ath9k_hw_calibrate(struct ath_hal *ah, struct ath9k_channel *chan,

usr/src/uts/common/io/arn/arn_calib.c

815

struct ath_hal_5416 *ahp = AH5416(ah);

usr/src/uts/common/io/arn/arn_calib.c

817

struct ath9k_channel *ichan = ath9k_regd_check_channel(ah, chan);

usr/src/uts/common/io/arn/arn_calib.c

831

ath9k_hw_per_calibration(ah, ichan, rxchainmask, currCal,

usr/src/uts/common/io/arn/arn_calib.c

838

ath9k_hw_reset_calibration(ah, currCal);

usr/src/uts/common/io/arn/arn_calib.c

844

(void) ath9k_hw_getnf(ah, ichan);

usr/src/uts/common/io/arn/arn_calib.c

845

ath9k_hw_loadnf(ah, ah->ah_curchan);

usr/src/uts/common/io/arn/arn_calib.c

846

ath9k_hw_start_nfcal(ah);

usr/src/uts/common/io/arn/arn_calib.c

859

ath9k_hw_9285_pa_cal(struct ath_hal *ah)

usr/src/uts/common/io/arn/arn_calib.c

875

if (AR_SREV_9285_11(ah)) {

usr/src/uts/common/io/arn/arn_calib.c

876

REG_WRITE(ah, AR9285_AN_TOP4, (AR9285_AN_TOP4_DEFAULT | 0x14));

usr/src/uts/common/io/arn/arn_calib.c

881

regList[i][1] = REG_READ(ah, regList[i][0]);

usr/src/uts/common/io/arn/arn_calib.c

883

regVal = REG_READ(ah, 0x7834);

usr/src/uts/common/io/arn/arn_calib.c

885

REG_WRITE(ah, 0x7834, regVal);

usr/src/uts/common/io/arn/arn_calib.c

886

regVal = REG_READ(ah, 0x9808);

usr/src/uts/common/io/arn/arn_calib.c

888

REG_WRITE(ah, 0x9808, regVal);

usr/src/uts/common/io/arn/arn_calib.c

890

REG_RMW_FIELD(ah, AR9285_AN_TOP3, AR9285_AN_TOP3_PWDDAC, 1);

usr/src/uts/common/io/arn/arn_calib.c

891

REG_RMW_FIELD(ah, AR9285_AN_RXTXBB1, AR9285_AN_RXTXBB1_PDRXTXBB1, 1);

usr/src/uts/common/io/arn/arn_calib.c

892

REG_RMW_FIELD(ah, AR9285_AN_RXTXBB1, AR9285_AN_RXTXBB1_PDV2I, 1);

usr/src/uts/common/io/arn/arn_calib.c

893

REG_RMW_FIELD(ah, AR9285_AN_RXTXBB1, AR9285_AN_RXTXBB1_PDDACIF, 1);

usr/src/uts/common/io/arn/arn_calib.c

894

REG_RMW_FIELD(ah, AR9285_AN_RF2G2, AR9285_AN_RF2G2_OFFCAL, 0);

usr/src/uts/common/io/arn/arn_calib.c

895

REG_RMW_FIELD(ah, AR9285_AN_RF2G7, AR9285_AN_RF2G7_PWDDB, 0);

usr/src/uts/common/io/arn/arn_calib.c

896

REG_RMW_FIELD(ah, AR9285_AN_RF2G1, AR9285_AN_RF2G1_ENPACAL, 0);

usr/src/uts/common/io/arn/arn_calib.c

897

REG_RMW_FIELD(ah, AR9285_AN_RF2G1, AR9285_AN_RF2G1_PDPADRV1, 1);

usr/src/uts/common/io/arn/arn_calib.c

898

REG_RMW_FIELD(ah, AR9285_AN_RF2G1, AR9285_AN_RF2G1_PDPADRV2, 0);

usr/src/uts/common/io/arn/arn_calib.c

899

REG_RMW_FIELD(ah, AR9285_AN_RF2G1, AR9285_AN_RF2G1_PDPAOUT, 0);

usr/src/uts/common/io/arn/arn_calib.c

900

REG_RMW_FIELD(ah, AR9285_AN_RF2G8, AR9285_AN_RF2G8_PADRVGN2TAB0, 7);

usr/src/uts/common/io/arn/arn_calib.c

901

REG_RMW_FIELD(ah, AR9285_AN_RF2G7, AR9285_AN_RF2G7_PADRVGN2TAB0, 0);

usr/src/uts/common/io/arn/arn_calib.c

902

ccomp_org = MS(REG_READ(ah, AR9285_AN_RF2G6), AR9285_AN_RF2G6_CCOMP);

usr/src/uts/common/io/arn/arn_calib.c

903

REG_RMW_FIELD(ah, AR9285_AN_RF2G6, AR9285_AN_RF2G6_CCOMP, 7);

usr/src/uts/common/io/arn/arn_calib.c

905

REG_WRITE(ah, AR9285_AN_TOP2, 0xca0358a0);

usr/src/uts/common/io/arn/arn_calib.c

907

REG_RMW_FIELD(ah, AR9285_AN_RF2G6, AR9285_AN_RF2G6_OFFS, 0);

usr/src/uts/common/io/arn/arn_calib.c

908

REG_RMW_FIELD(ah, AR9285_AN_RF2G3, AR9285_AN_RF2G3_PDVCCOMP, 0);

usr/src/uts/common/io/arn/arn_calib.c

911

regVal = REG_READ(ah, 0x7834);

usr/src/uts/common/io/arn/arn_calib.c

913

REG_WRITE(ah, 0x7834, regVal);

usr/src/uts/common/io/arn/arn_calib.c

915

regVal = REG_READ(ah, 0x7834);

usr/src/uts/common/io/arn/arn_calib.c

917

reg_field = MS(REG_READ(ah, 0x7840), AR9285_AN_RXTXBB1_SPARE9);

usr/src/uts/common/io/arn/arn_calib.c

919

REG_WRITE(ah, 0x7834, regVal);

usr/src/uts/common/io/arn/arn_calib.c

922

REG_RMW_FIELD(ah, AR9285_AN_RF2G3, AR9285_AN_RF2G3_PDVCCOMP, 1);

usr/src/uts/common/io/arn/arn_calib.c

924

reg_field = MS(REG_READ(ah, AR9285_AN_RF2G9), AR9285_AN_RXTXBB1_SPARE9);

usr/src/uts/common/io/arn/arn_calib.c

925

REG_RMW_FIELD(ah, AR9285_AN_RF2G3, AR9285_AN_RF2G3_PDVCCOMP, reg_field);

usr/src/uts/common/io/arn/arn_calib.c

926

offs_6_1 = MS(REG_READ(ah, AR9285_AN_RF2G6), AR9285_AN_RF2G6_OFFS);

usr/src/uts/common/io/arn/arn_calib.c

927

offs_0 = MS(REG_READ(ah, AR9285_AN_RF2G3), AR9285_AN_RF2G3_PDVCCOMP);

usr/src/uts/common/io/arn/arn_calib.c

934

REG_RMW_FIELD(ah, AR9285_AN_RF2G6, AR9285_AN_RF2G6_OFFS, offs_6_1);

usr/src/uts/common/io/arn/arn_calib.c

935

REG_RMW_FIELD(ah, AR9285_AN_RF2G3, AR9285_AN_RF2G3_PDVCCOMP, offs_0);

usr/src/uts/common/io/arn/arn_calib.c

937

regVal = REG_READ(ah, 0x7834);

usr/src/uts/common/io/arn/arn_calib.c

939

REG_WRITE(ah, 0x7834, regVal);

usr/src/uts/common/io/arn/arn_calib.c

940

regVal = REG_READ(ah, 0x9808);

usr/src/uts/common/io/arn/arn_calib.c

942

REG_WRITE(ah, 0x9808, regVal);

usr/src/uts/common/io/arn/arn_calib.c

945

REG_WRITE(ah, regList[i][0], regList[i][1]);

usr/src/uts/common/io/arn/arn_calib.c

947

REG_RMW_FIELD(ah, AR9285_AN_RF2G6, AR9285_AN_RF2G6_CCOMP, ccomp_org);

usr/src/uts/common/io/arn/arn_calib.c

949

if (AR_SREV_9285_11(ah))

usr/src/uts/common/io/arn/arn_calib.c

950

REG_WRITE(ah, AR9285_AN_TOP4, AR9285_AN_TOP4_DEFAULT);

usr/src/uts/common/io/arn/arn_calib.c

955

ath9k_hw_init_cal(struct ath_hal *ah,

usr/src/uts/common/io/arn/arn_calib.c

958

struct ath_hal_5416 *ahp = AH5416(ah);

usr/src/uts/common/io/arn/arn_calib.c

959

struct ath9k_channel *ichan = ath9k_regd_check_channel(ah, chan);

usr/src/uts/common/io/arn/arn_calib.c

961

REG_WRITE(ah, AR_PHY_AGC_CONTROL,

usr/src/uts/common/io/arn/arn_calib.c

962

REG_READ(ah, AR_PHY_AGC_CONTROL) |

usr/src/uts/common/io/arn/arn_calib.c

965

if (!ath9k_hw_wait(ah, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_CAL, 0)) {

usr/src/uts/common/io/arn/arn_calib.c

972

if (AR_SREV_9285(ah) && AR_SREV_9285_11_OR_LATER(ah))

usr/src/uts/common/io/arn/arn_calib.c

973

ath9k_hw_9285_pa_cal(ah);

usr/src/uts/common/io/arn/arn_calib.c

975

REG_WRITE(ah, AR_PHY_AGC_CONTROL,

usr/src/uts/common/io/arn/arn_calib.c

976

REG_READ(ah, AR_PHY_AGC_CONTROL) |

usr/src/uts/common/io/arn/arn_calib.c

981

if (AR_SREV_9100(ah) || AR_SREV_9160_10_OR_LATER(ah)) {

usr/src/uts/common/io/arn/arn_calib.c

982

if (ath9k_hw_iscal_supported(ah, chan, ADC_GAIN_CAL)) {

usr/src/uts/common/io/arn/arn_calib.c

991

if (ath9k_hw_iscal_supported(ah, chan, ADC_DC_CAL)) {

usr/src/uts/common/io/arn/arn_core.h

1012

arn_iowrite32(struct ath_hal *ah, uint32_t reg_offset, uint32_t val);

usr/src/uts/common/io/arn/arn_core.h

1014

arn_ioread32(struct ath_hal *ah, uint32_t reg_offset);

usr/src/uts/common/io/arn/arn_core.h

624

void ath9k_init_nfcal_hist_buffer(struct ath_hal *ah);

usr/src/uts/common/io/arn/arn_core.h

723

uint32_t arn_beaconq_setup(struct ath_hal *ah);

usr/src/uts/common/io/arn/arn_eeprom.c

1028

ath9k_hw_set_def_power_cal_table(struct ath_hal *ah,

usr/src/uts/common/io/arn/arn_eeprom.c

1031

struct ath_hal_5416 *ahp = AH5416(ah);

usr/src/uts/common/io/arn/arn_eeprom.c

1054

(uint16_t)(MS(REG_READ(ah, AR_PHY_TPCRG5),

usr/src/uts/common/io/arn/arn_eeprom.c

1078

REG_RMW_FIELD(ah, AR_PHY_TPCRG1, AR_PHY_TPCRG1_NUM_PD_GAIN,

usr/src/uts/common/io/arn/arn_eeprom.c

1080

REG_RMW_FIELD(ah, AR_PHY_TPCRG1, AR_PHY_TPCRG1_PD_GAIN_1,

usr/src/uts/common/io/arn/arn_eeprom.c

1082

REG_RMW_FIELD(ah, AR_PHY_TPCRG1, AR_PHY_TPCRG1_PD_GAIN_2,

usr/src/uts/common/io/arn/arn_eeprom.c

1084

REG_RMW_FIELD(ah, AR_PHY_TPCRG1, AR_PHY_TPCRG1_PD_GAIN_3,

usr/src/uts/common/io/arn/arn_eeprom.c

1088

if (AR_SREV_5416_V20_OR_LATER(ah) &&

usr/src/uts/common/io/arn/arn_eeprom.c

1101

ath9k_hw_get_def_gain_boundaries_pdadcs(ah, chan,

usr/src/uts/common/io/arn/arn_eeprom.c

1107

if ((i == 0) || AR_SREV_5416_V20_OR_LATER(ah)) {

usr/src/uts/common/io/arn/arn_eeprom.c

1108

REG_WRITE(ah,

usr/src/uts/common/io/arn/arn_eeprom.c

1128

REG_WRITE(ah, regOffset, reg32);

usr/src/uts/common/io/arn/arn_eeprom.c

1156

ath9k_hw_set_4k_power_cal_table(struct ath_hal *ah,

usr/src/uts/common/io/arn/arn_eeprom.c

1159

struct ath_hal_5416 *ahp = AH5416(ah);

usr/src/uts/common/io/arn/arn_eeprom.c

1179

pdGainOverlap_t2 = (uint16_t)(MS(REG_READ(ah, AR_PHY_TPCRG5),

usr/src/uts/common/io/arn/arn_eeprom.c

1198

REG_RMW_FIELD(ah, AR_PHY_TPCRG1, AR_PHY_TPCRG1_NUM_PD_GAIN,

usr/src/uts/common/io/arn/arn_eeprom.c

1200

REG_RMW_FIELD(ah, AR_PHY_TPCRG1, AR_PHY_TPCRG1_PD_GAIN_1,

usr/src/uts/common/io/arn/arn_eeprom.c

1202

REG_RMW_FIELD(ah, AR_PHY_TPCRG1, AR_PHY_TPCRG1_PD_GAIN_2,

usr/src/uts/common/io/arn/arn_eeprom.c

1204

REG_RMW_FIELD(ah, AR_PHY_TPCRG1, AR_PHY_TPCRG1_PD_GAIN_3,

usr/src/uts/common/io/arn/arn_eeprom.c

1208

if (AR_SREV_5416_V20_OR_LATER(ah) &&

usr/src/uts/common/io/arn/arn_eeprom.c

1218

ath9k_hw_get_4k_gain_boundaries_pdadcs(ah, chan,

usr/src/uts/common/io/arn/arn_eeprom.c

1224

if ((i == 0) || AR_SREV_5416_V20_OR_LATER(ah)) {

usr/src/uts/common/io/arn/arn_eeprom.c

1225

REG_WRITE(ah, AR_PHY_TPCRG5 + regChainOffset,

usr/src/uts/common/io/arn/arn_eeprom.c

1244

REG_WRITE(ah, regOffset, reg32);

usr/src/uts/common/io/arn/arn_eeprom.c

1273

ath9k_hw_set_def_power_per_rate_table(struct ath_hal *ah,

usr/src/uts/common/io/arn/arn_eeprom.c

1283

struct ath_hal_5416 *ahp = AH5416(ah);

usr/src/uts/common/io/arn/arn_eeprom.c

131

ath9k_hw_eeprom_read(struct ath_hal *ah, uint32_t off, uint16_t *data)

usr/src/uts/common/io/arn/arn_eeprom.c

1316

ath9k_hw_get_channel_centers(ah, chan, &centers);

usr/src/uts/common/io/arn/arn_eeprom.c

133

(void) REG_READ(ah, AR5416_EEPROM_OFFSET + (off << AR5416_EEPROM_S));

usr/src/uts/common/io/arn/arn_eeprom.c

1335

if (ah->ah_tpScale != ATH9K_TP_SCALE_MAX) {

usr/src/uts/common/io/arn/arn_eeprom.c

1337

(tpScaleReductionTable[(ah->ah_tpScale)] * 2);

usr/src/uts/common/io/arn/arn_eeprom.c

135

if (!ath9k_hw_wait(ah, AR_EEPROM_STATUS_DATA,

usr/src/uts/common/io/arn/arn_eeprom.c

1360

ath9k_hw_get_legacy_target_powers(ah, chan,

usr/src/uts/common/io/arn/arn_eeprom.c

1364

ath9k_hw_get_legacy_target_powers(ah, chan,

usr/src/uts/common/io/arn/arn_eeprom.c

1368

ath9k_hw_get_target_powers(ah, chan,

usr/src/uts/common/io/arn/arn_eeprom.c

1375

ath9k_hw_get_target_powers(ah, chan,

usr/src/uts/common/io/arn/arn_eeprom.c

1379

ath9k_hw_get_legacy_target_powers(ah, chan,

usr/src/uts/common/io/arn/arn_eeprom.c

1383

ath9k_hw_get_legacy_target_powers(ah, chan,

usr/src/uts/common/io/arn/arn_eeprom.c

1393

ath9k_hw_get_legacy_target_powers(ah, chan,

usr/src/uts/common/io/arn/arn_eeprom.c

1397

ath9k_hw_get_target_powers(ah, chan,

usr/src/uts/common/io/arn/arn_eeprom.c

1404

ath9k_hw_get_target_powers(ah, chan,

usr/src/uts/common/io/arn/arn_eeprom.c

1408

ath9k_hw_get_legacy_target_powers(ah, chan,

usr/src/uts/common/io/arn/arn_eeprom.c

141

*data = MS(REG_READ(ah, AR_EEPROM_STATUS_DATA),

usr/src/uts/common/io/arn/arn_eeprom.c

149

ath9k_hw_flash_map(struct ath_hal *ah)

usr/src/uts/common/io/arn/arn_eeprom.c

1578

ath9k_hw_set_4k_power_per_rate_table(struct ath_hal *ah,

usr/src/uts/common/io/arn/arn_eeprom.c

158

ath9k_hw_flash_read(struct ath_hal *ah, uint32_t off, uint16_t *data)

usr/src/uts/common/io/arn/arn_eeprom.c

1586

struct ath_hal_5416 *ahp = AH5416(ah);

usr/src/uts/common/io/arn/arn_eeprom.c

160

*data = FLASH_READ(ah, off);

usr/src/uts/common/io/arn/arn_eeprom.c

1617

ath9k_hw_get_channel_centers(ah, chan, &centers);

usr/src/uts/common/io/arn/arn_eeprom.c

1626

if (ah->ah_tpScale != ATH9K_TP_SCALE_MAX) {

usr/src/uts/common/io/arn/arn_eeprom.c

1628

(tpScaleReductionTable[(ah->ah_tpScale)] * 2);

usr/src/uts/common/io/arn/arn_eeprom.c

1637

ath9k_hw_get_legacy_target_powers(ah, chan,

usr/src/uts/common/io/arn/arn_eeprom.c

1641

ath9k_hw_get_legacy_target_powers(ah, chan,

usr/src/uts/common/io/arn/arn_eeprom.c

1645

ath9k_hw_get_target_powers(ah, chan,

usr/src/uts/common/io/arn/arn_eeprom.c

1652

ath9k_hw_get_target_powers(ah, chan,

usr/src/uts/common/io/arn/arn_eeprom.c

1656

ath9k_hw_get_legacy_target_powers(ah, chan,

usr/src/uts/common/io/arn/arn_eeprom.c

166

ath9k_hw_nvram_read(struct ath_hal *ah, uint32_t off, uint16_t *data)

usr/src/uts/common/io/arn/arn_eeprom.c

1660

ath9k_hw_get_legacy_target_powers(ah, chan,

usr/src/uts/common/io/arn/arn_eeprom.c

168

if (ath9k_hw_use_flash(ah))

usr/src/uts/common/io/arn/arn_eeprom.c

169

return (ath9k_hw_flash_read(ah, off, data));

usr/src/uts/common/io/arn/arn_eeprom.c

171

return (ath9k_hw_eeprom_read(ah, off, data));

usr/src/uts/common/io/arn/arn_eeprom.c

175

ath9k_hw_fill_4k_eeprom(struct ath_hal *ah)

usr/src/uts/common/io/arn/arn_eeprom.c

178

struct ath_hal_5416 *ahp = AH5416(ah);

usr/src/uts/common/io/arn/arn_eeprom.c

1815

ath9k_hw_def_set_txpower(struct ath_hal *ah, struct ath9k_channel *chan,

usr/src/uts/common/io/arn/arn_eeprom.c

1819

struct ath_hal_5416 *ahp = AH5416(ah);

usr/src/uts/common/io/arn/arn_eeprom.c

1835

if (!ath9k_hw_set_def_power_per_rate_table(ah, chan,

usr/src/uts/common/io/arn/arn_eeprom.c

1848

if (!ath9k_hw_set_def_power_cal_table(ah, chan, &txPowerIndexOffset)) {

usr/src/uts/common/io/arn/arn_eeprom.c

185

if (!ath9k_hw_use_flash(ah)) {

usr/src/uts/common/io/arn/arn_eeprom.c

1860

if (AR_SREV_9280_10_OR_LATER(ah)) {

usr/src/uts/common/io/arn/arn_eeprom.c

1865

REG_WRITE(ah, AR_PHY_POWER_TX_RATE1,

usr/src/uts/common/io/arn/arn_eeprom.c

1870

REG_WRITE(ah, AR_PHY_POWER_TX_RATE2,

usr/src/uts/common/io/arn/arn_eeprom.c

1877

REG_WRITE(ah, AR_PHY_POWER_TX_RATE3,

usr/src/uts/common/io/arn/arn_eeprom.c

1882

REG_WRITE(ah, AR_PHY_POWER_TX_RATE4,

usr/src/uts/common/io/arn/arn_eeprom.c

1889

REG_WRITE(ah, AR_PHY_POWER_TX_RATE5,

usr/src/uts/common/io/arn/arn_eeprom.c

1894

REG_WRITE(ah, AR_PHY_POWER_TX_RATE6,

usr/src/uts/common/io/arn/arn_eeprom.c

1901

REG_WRITE(ah, AR_PHY_POWER_TX_RATE7,

usr/src/uts/common/io/arn/arn_eeprom.c

1910

REG_WRITE(ah, AR_PHY_POWER_TX_RATE8,

usr/src/uts/common/io/arn/arn_eeprom.c

1920

REG_WRITE(ah, AR_PHY_POWER_TX_RATE9,

usr/src/uts/common/io/arn/arn_eeprom.c

1927

REG_WRITE(ah, AR_PHY_POWER_TX_SUB,

usr/src/uts/common/io/arn/arn_eeprom.c

193

if (!ath9k_hw_nvram_read(ah, addr + eep_start_loc, eep_data)) {

usr/src/uts/common/io/arn/arn_eeprom.c

1938

if (AR_SREV_9280_10_OR_LATER(ah))

usr/src/uts/common/io/arn/arn_eeprom.c

1939

ah->ah_maxPowerLevel =

usr/src/uts/common/io/arn/arn_eeprom.c

1942

ah->ah_maxPowerLevel = ratesArray[i];

usr/src/uts/common/io/arn/arn_eeprom.c

1948

ath9k_hw_4k_set_txpower(struct ath_hal *ah,

usr/src/uts/common/io/arn/arn_eeprom.c

1955

struct ath_hal_5416 *ahp = AH5416(ah);

usr/src/uts/common/io/arn/arn_eeprom.c

1970

if (!ath9k_hw_set_4k_power_per_rate_table(ah, chan,

usr/src/uts/common/io/arn/arn_eeprom.c

1981

if (!ath9k_hw_set_4k_power_cal_table(ah, chan, &txPowerIndexOffset)) {

usr/src/uts/common/io/arn/arn_eeprom.c

1993

if (AR_SREV_9280_10_OR_LATER(ah)) {

usr/src/uts/common/io/arn/arn_eeprom.c

1998

REG_WRITE(ah, AR_PHY_POWER_TX_RATE1,

usr/src/uts/common/io/arn/arn_eeprom.c

2003

REG_WRITE(ah, AR_PHY_POWER_TX_RATE2,

usr/src/uts/common/io/arn/arn_eeprom.c

2010

REG_WRITE(ah, AR_PHY_POWER_TX_RATE3,

usr/src/uts/common/io/arn/arn_eeprom.c

2015

REG_WRITE(ah, AR_PHY_POWER_TX_RATE4,

usr/src/uts/common/io/arn/arn_eeprom.c

2022

REG_WRITE(ah, AR_PHY_POWER_TX_RATE5,

usr/src/uts/common/io/arn/arn_eeprom.c

2027

REG_WRITE(ah, AR_PHY_POWER_TX_RATE6,

usr/src/uts/common/io/arn/arn_eeprom.c

2034

REG_WRITE(ah, AR_PHY_POWER_TX_RATE7,

usr/src/uts/common/io/arn/arn_eeprom.c

2044

REG_WRITE(ah, AR_PHY_POWER_TX_RATE8,

usr/src/uts/common/io/arn/arn_eeprom.c

205

ath9k_hw_fill_def_eeprom(struct ath_hal *ah)

usr/src/uts/common/io/arn/arn_eeprom.c

2054

REG_WRITE(ah, AR_PHY_POWER_TX_RATE9,

usr/src/uts/common/io/arn/arn_eeprom.c

2068

if (AR_SREV_9280_10_OR_LATER(ah))

usr/src/uts/common/io/arn/arn_eeprom.c

2069

ah->ah_maxPowerLevel =

usr/src/uts/common/io/arn/arn_eeprom.c

2072

ah->ah_maxPowerLevel = ratesArray[i];

usr/src/uts/common/io/arn/arn_eeprom.c

2078

ath9k_hw_set_txpower(struct ath_hal *ah,

usr/src/uts/common/io/arn/arn_eeprom.c

208

struct ath_hal_5416 *ahp = AH5416(ah);

usr/src/uts/common/io/arn/arn_eeprom.c

2085

struct ath_hal_5416 *ahp = AH5416(ah);

usr/src/uts/common/io/arn/arn_eeprom.c

2089

val = ath9k_hw_def_set_txpower(ah, chan, cfgCtl,

usr/src/uts/common/io/arn/arn_eeprom.c

2093

val = ath9k_hw_4k_set_txpower(ah, chan, cfgCtl,

usr/src/uts/common/io/arn/arn_eeprom.c

2100

ath9k_hw_set_def_addac(struct ath_hal *ah, struct ath9k_channel *chan)

usr/src/uts/common/io/arn/arn_eeprom.c

2104

struct ath_hal_5416 *ahp = AH5416(ah);

usr/src/uts/common/io/arn/arn_eeprom.c

2108

if (ah->ah_macVersion != AR_SREV_VERSION_9160)

usr/src/uts/common/io/arn/arn_eeprom.c

2122

ath9k_hw_get_channel_centers(ah, chan, &centers);

usr/src/uts/common/io/arn/arn_eeprom.c

216

if (!ath9k_hw_nvram_read(ah, addr + ar5416_eep_start_loc,

usr/src/uts/common/io/arn/arn_eeprom.c

2161

ath9k_hw_set_4k_addac(struct ath_hal *ah, struct ath9k_channel *chan)

usr/src/uts/common/io/arn/arn_eeprom.c

2164

struct ath_hal_5416 *ahp = AH5416(ah);

usr/src/uts/common/io/arn/arn_eeprom.c

2168

if (ah->ah_macVersion != AR_SREV_VERSION_9160)

usr/src/uts/common/io/arn/arn_eeprom.c

2185

ath9k_hw_set_addac(struct ath_hal *ah, struct ath9k_channel *chan)

usr/src/uts/common/io/arn/arn_eeprom.c

2187

struct ath_hal_5416 *ahp = AH5416(ah);

usr/src/uts/common/io/arn/arn_eeprom.c

2190

ath9k_hw_set_def_addac(ah, chan);

usr/src/uts/common/io/arn/arn_eeprom.c

2192

ath9k_hw_set_4k_addac(ah, chan);

usr/src/uts/common/io/arn/arn_eeprom.c

2197

ath9k_hw_eeprom_set_def_board_values(struct ath_hal *ah,

usr/src/uts/common/io/arn/arn_eeprom.c

2201

struct ath_hal_5416 *ahp = AH5416(ah);

usr/src/uts/common/io/arn/arn_eeprom.c

2211

(void) ath9k_hw_get_eeprom_antenna_cfg(ah, chan, 0, &ant_config);

usr/src/uts/common/io/arn/arn_eeprom.c

2212

REG_WRITE(ah, AR_PHY_SWITCH_COM, ant_config);

usr/src/uts/common/io/arn/arn_eeprom.c

2215

if (AR_SREV_9280(ah)) {

usr/src/uts/common/io/arn/arn_eeprom.c

2220

if (AR_SREV_5416_V20_OR_LATER(ah) &&

usr/src/uts/common/io/arn/arn_eeprom.c

2227

REG_WRITE(ah, AR_PHY_SWITCH_CHAIN_0 + regChainOffset,

usr/src/uts/common/io/arn/arn_eeprom.c

2230

REG_WRITE(ah, AR_PHY_TIMING_CTRL4(0) + regChainOffset,

usr/src/uts/common/io/arn/arn_eeprom.c

2231

(REG_READ(ah, AR_PHY_TIMING_CTRL4(0) + regChainOffset) &

usr/src/uts/common/io/arn/arn_eeprom.c

2239

if ((i == 0) || AR_SREV_5416_V20_OR_LATER(ah)) {

usr/src/uts/common/io/arn/arn_eeprom.c

2244

if (AR_SREV_9280_10_OR_LATER(ah)) {

usr/src/uts/common/io/arn/arn_eeprom.c

2245

REG_RMW_FIELD(ah,

usr/src/uts/common/io/arn/arn_eeprom.c

2251

REG_RMW_FIELD(ah,

usr/src/uts/common/io/arn/arn_eeprom.c

2257

REG_RMW_FIELD(ah,

usr/src/uts/common/io/arn/arn_eeprom.c

2263

REG_RMW_FIELD(ah,

usr/src/uts/common/io/arn/arn_eeprom.c

2270

REG_WRITE(ah,

usr/src/uts/common/io/arn/arn_eeprom.c

2273

(REG_READ(ah,

usr/src/uts/common/io/arn/arn_eeprom.c

2280

REG_WRITE(ah,

usr/src/uts/common/io/arn/arn_eeprom.c

2283

(REG_READ(ah,

usr/src/uts/common/io/arn/arn_eeprom.c

2291

if (AR_SREV_9280_10_OR_LATER(ah)) {

usr/src/uts/common/io/arn/arn_eeprom.c

2292

REG_RMW_FIELD(ah,

usr/src/uts/common/io/arn/arn_eeprom.c

2297

REG_RMW_FIELD(ah,

usr/src/uts/common/io/arn/arn_eeprom.c

2303

REG_WRITE(ah,

usr/src/uts/common/io/arn/arn_eeprom.c

2305

(REG_READ(ah,

usr/src/uts/common/io/arn/arn_eeprom.c

2311

REG_WRITE(ah,

usr/src/uts/common/io/arn/arn_eeprom.c

2314

(REG_READ(ah,

usr/src/uts/common/io/arn/arn_eeprom.c

2324

if (AR_SREV_9280_10_OR_LATER(ah)) {

usr/src/uts/common/io/arn/arn_eeprom.c

2326

ath9k_hw_analog_shift_rmw(ah, AR_AN_RF2G1_CH0,

usr/src/uts/common/io/arn/arn_eeprom.c

2330

ath9k_hw_analog_shift_rmw(ah, AR_AN_RF2G1_CH0,

usr/src/uts/common/io/arn/arn_eeprom.c

2334

ath9k_hw_analog_shift_rmw(ah, AR_AN_RF2G1_CH1,

usr/src/uts/common/io/arn/arn_eeprom.c

2338

ath9k_hw_analog_shift_rmw(ah, AR_AN_RF2G1_CH1,

usr/src/uts/common/io/arn/arn_eeprom.c

234

ath9k_hw_fill_eeprom(struct ath_hal *ah)

usr/src/uts/common/io/arn/arn_eeprom.c

2343

ath9k_hw_analog_shift_rmw(ah, AR_AN_RF5G1_CH0,

usr/src/uts/common/io/arn/arn_eeprom.c

2347

ath9k_hw_analog_shift_rmw(ah, AR_AN_RF5G1_CH0,

usr/src/uts/common/io/arn/arn_eeprom.c

2351

ath9k_hw_analog_shift_rmw(ah, AR_AN_RF5G1_CH1,

usr/src/uts/common/io/arn/arn_eeprom.c

2355

ath9k_hw_analog_shift_rmw(ah, AR_AN_RF5G1_CH1,

usr/src/uts/common/io/arn/arn_eeprom.c

236

struct ath_hal_5416 *ahp = AH5416(ah);

usr/src/uts/common/io/arn/arn_eeprom.c

2360

ath9k_hw_analog_shift_rmw(ah, AR_AN_TOP2,

usr/src/uts/common/io/arn/arn_eeprom.c

2364

ath9k_hw_analog_shift_rmw(ah, AR_AN_TOP2,

usr/src/uts/common/io/arn/arn_eeprom.c

2372

REG_RMW_FIELD(ah, AR_PHY_XPA_CFG, AR_PHY_FORCE_XPA_CFG,

usr/src/uts/common/io/arn/arn_eeprom.c

2376

REG_RMW_FIELD(ah, AR_PHY_SETTLING, AR_PHY_SETTLING_SWITCH,

usr/src/uts/common/io/arn/arn_eeprom.c

2378

REG_RMW_FIELD(ah, AR_PHY_DESIRED_SZ, AR_PHY_DESIRED_SZ_ADC,

usr/src/uts/common/io/arn/arn_eeprom.c

238

return (ath9k_fill_eeprom[ahp->ah_eep_map](ah));

usr/src/uts/common/io/arn/arn_eeprom.c

2381

if (!AR_SREV_9280_10_OR_LATER(ah))

usr/src/uts/common/io/arn/arn_eeprom.c

2382

REG_RMW_FIELD(ah, AR_PHY_DESIRED_SZ,

usr/src/uts/common/io/arn/arn_eeprom.c

2386

REG_WRITE(ah, AR_PHY_RF_CTL4,

usr/src/uts/common/io/arn/arn_eeprom.c

2392

REG_RMW_FIELD(ah, AR_PHY_RF_CTL3, AR_PHY_TX_END_TO_A2_RX_ON,

usr/src/uts/common/io/arn/arn_eeprom.c

2394

if (AR_SREV_9280_10_OR_LATER(ah)) {

usr/src/uts/common/io/arn/arn_eeprom.c

2395

REG_RMW_FIELD(ah, AR_PHY_CCA, AR9280_PHY_CCA_THRESH62,

usr/src/uts/common/io/arn/arn_eeprom.c

2397

REG_RMW_FIELD(ah, AR_PHY_EXT_CCA0,

usr/src/uts/common/io/arn/arn_eeprom.c

2401

REG_RMW_FIELD(ah, AR_PHY_CCA, AR_PHY_CCA_THRESH62,

usr/src/uts/common/io/arn/arn_eeprom.c

2403

REG_RMW_FIELD(ah, AR_PHY_EXT_CCA,

usr/src/uts/common/io/arn/arn_eeprom.c

2410

REG_RMW_FIELD(ah, AR_PHY_RF_CTL2,

usr/src/uts/common/io/arn/arn_eeprom.c

2413

REG_RMW_FIELD(ah, AR_PHY_RF_CTL2, AR_PHY_TX_END_PA_ON,

usr/src/uts/common/io/arn/arn_eeprom.c

242

ath9k_hw_check_def_eeprom(struct ath_hal *ah)

usr/src/uts/common/io/arn/arn_eeprom.c

2420

REG_RMW_FIELD(ah, AR_PHY_SETTLING,

usr/src/uts/common/io/arn/arn_eeprom.c

2429

ath9k_hw_eeprom_set_4k_board_values(struct ath_hal *ah,

usr/src/uts/common/io/arn/arn_eeprom.c

2433

struct ath_hal_5416 *ahp = AH5416(ah);

usr/src/uts/common/io/arn/arn_eeprom.c

244

struct ath_hal_5416 *ahp = AH5416(ah);

usr/src/uts/common/io/arn/arn_eeprom.c

2447

(void) ath9k_hw_get_eeprom_antenna_cfg(ah, chan, 0, &ant_config);

usr/src/uts/common/io/arn/arn_eeprom.c

2448

REG_WRITE(ah, AR_PHY_SWITCH_COM, ant_config);

usr/src/uts/common/io/arn/arn_eeprom.c

2451

REG_WRITE(ah, AR_PHY_SWITCH_CHAIN_0 + regChainOffset,

usr/src/uts/common/io/arn/arn_eeprom.c

2454

REG_WRITE(ah, AR_PHY_TIMING_CTRL4(0) + regChainOffset,

usr/src/uts/common/io/arn/arn_eeprom.c

2455

(REG_READ(ah, AR_PHY_TIMING_CTRL4(0) + regChainOffset) &

usr/src/uts/common/io/arn/arn_eeprom.c

2464

REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ + regChainOffset,

usr/src/uts/common/io/arn/arn_eeprom.c

2466

REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ + regChainOffset,

usr/src/uts/common/io/arn/arn_eeprom.c

2468

REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ + regChainOffset,

usr/src/uts/common/io/arn/arn_eeprom.c

2471

REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ + regChainOffset,

usr/src/uts/common/io/arn/arn_eeprom.c

2475

REG_RMW_FIELD(ah, AR_PHY_RXGAIN + regChainOffset,

usr/src/uts/common/io/arn/arn_eeprom.c

2477

REG_RMW_FIELD(ah, AR_PHY_RXGAIN + regChainOffset,

usr/src/uts/common/io/arn/arn_eeprom.c

2480

if (AR_SREV_9285_11(ah))

usr/src/uts/common/io/arn/arn_eeprom.c

2481

REG_WRITE(ah, AR9285_AN_TOP4, (AR9285_AN_TOP4_DEFAULT | 0x14));

usr/src/uts/common/io/arn/arn_eeprom.c

2487

regVal = REG_READ(ah, 0x99ac);

usr/src/uts/common/io/arn/arn_eeprom.c

2494

REG_WRITE(ah, 0x99ac, regVal);

usr/src/uts/common/io/arn/arn_eeprom.c

2495

regVal = REG_READ(ah, 0x99ac);

usr/src/uts/common/io/arn/arn_eeprom.c

2496

regVal = REG_READ(ah, 0xa208);

usr/src/uts/common/io/arn/arn_eeprom.c

2499

REG_WRITE(ah, 0xa208, regVal);

usr/src/uts/common/io/arn/arn_eeprom.c

2500

regVal = REG_READ(ah, 0xa208);

usr/src/uts/common/io/arn/arn_eeprom.c

251

if (!ath9k_hw_nvram_read(ah, AR5416_EEPROM_MAGIC_OFFSET, &magic)) {

usr/src/uts/common/io/arn/arn_eeprom.c

2543

ath9k_hw_analog_shift_rmw(ah, AR9285_AN_RF2G3,

usr/src/uts/common/io/arn/arn_eeprom.c

2545

ath9k_hw_analog_shift_rmw(ah, AR9285_AN_RF2G3,

usr/src/uts/common/io/arn/arn_eeprom.c

2547

ath9k_hw_analog_shift_rmw(ah, AR9285_AN_RF2G3,

usr/src/uts/common/io/arn/arn_eeprom.c

2549

ath9k_hw_analog_shift_rmw(ah, AR9285_AN_RF2G3,

usr/src/uts/common/io/arn/arn_eeprom.c

2551

ath9k_hw_analog_shift_rmw(ah, AR9285_AN_RF2G3,

usr/src/uts/common/io/arn/arn_eeprom.c

2554

ath9k_hw_analog_shift_rmw(ah, AR9285_AN_RF2G3,

usr/src/uts/common/io/arn/arn_eeprom.c

2556

ath9k_hw_analog_shift_rmw(ah, AR9285_AN_RF2G3,

usr/src/uts/common/io/arn/arn_eeprom.c

2558

ath9k_hw_analog_shift_rmw(ah, AR9285_AN_RF2G3,

usr/src/uts/common/io/arn/arn_eeprom.c

2560

ath9k_hw_analog_shift_rmw(ah, AR9285_AN_RF2G4,

usr/src/uts/common/io/arn/arn_eeprom.c

2562

ath9k_hw_analog_shift_rmw(ah, AR9285_AN_RF2G4,

usr/src/uts/common/io/arn/arn_eeprom.c

2565

ath9k_hw_analog_shift_rmw(ah, AR9285_AN_RF2G4,

usr/src/uts/common/io/arn/arn_eeprom.c

2567

ath9k_hw_analog_shift_rmw(ah, AR9285_AN_RF2G4,

usr/src/uts/common/io/arn/arn_eeprom.c

2569

ath9k_hw_analog_shift_rmw(ah, AR9285_AN_RF2G4,

usr/src/uts/common/io/arn/arn_eeprom.c

257

if (!ath9k_hw_use_flash(ah)) {

usr/src/uts/common/io/arn/arn_eeprom.c

2571

ath9k_hw_analog_shift_rmw(ah, AR9285_AN_RF2G4,

usr/src/uts/common/io/arn/arn_eeprom.c

2573

ath9k_hw_analog_shift_rmw(ah, AR9285_AN_RF2G4,

usr/src/uts/common/io/arn/arn_eeprom.c

2577

if (AR_SREV_9285_11(ah))

usr/src/uts/common/io/arn/arn_eeprom.c

2578

REG_WRITE(ah, AR9285_AN_TOP4, AR9285_AN_TOP4_DEFAULT);

usr/src/uts/common/io/arn/arn_eeprom.c

2580

REG_RMW_FIELD(ah, AR_PHY_SETTLING, AR_PHY_SETTLING_SWITCH,

usr/src/uts/common/io/arn/arn_eeprom.c

2582

REG_RMW_FIELD(ah, AR_PHY_DESIRED_SZ, AR_PHY_DESIRED_SZ_ADC,

usr/src/uts/common/io/arn/arn_eeprom.c

2585

REG_WRITE(ah, AR_PHY_RF_CTL4,

usr/src/uts/common/io/arn/arn_eeprom.c

2591

REG_RMW_FIELD(ah, AR_PHY_RF_CTL3, AR_PHY_TX_END_TO_A2_RX_ON,

usr/src/uts/common/io/arn/arn_eeprom.c

2593

REG_RMW_FIELD(ah, AR_PHY_CCA, AR9280_PHY_CCA_THRESH62,

usr/src/uts/common/io/arn/arn_eeprom.c

2595

REG_RMW_FIELD(ah, AR_PHY_EXT_CCA0, AR_PHY_EXT_CCA0_THRESH62,

usr/src/uts/common/io/arn/arn_eeprom.c

2600

REG_RMW_FIELD(ah, AR_PHY_RF_CTL2, AR_PHY_TX_END_DATA_START,

usr/src/uts/common/io/arn/arn_eeprom.c

2602

REG_RMW_FIELD(ah, AR_PHY_RF_CTL2, AR_PHY_TX_END_PA_ON,

usr/src/uts/common/io/arn/arn_eeprom.c

2609

REG_RMW_FIELD(ah, AR_PHY_SETTLING,

usr/src/uts/common/io/arn/arn_eeprom.c

2617

ath9k_hw_eeprom_set_board_values(struct ath_hal *ah, struct ath9k_channel *chan)

usr/src/uts/common/io/arn/arn_eeprom.c

2619

struct ath_hal_5416 *ahp = AH5416(ah);

usr/src/uts/common/io/arn/arn_eeprom.c

2623

val = ath9k_hw_eeprom_set_def_board_values(ah, chan);

usr/src/uts/common/io/arn/arn_eeprom.c

2625

val = ath9k_hw_eeprom_set_4k_board_values(ah, chan);

usr/src/uts/common/io/arn/arn_eeprom.c

2631

ath9k_hw_get_def_eeprom_antenna_cfg(struct ath_hal *ah,

usr/src/uts/common/io/arn/arn_eeprom.c

2635

struct ath_hal_5416 *ahp = AH5416(ah);

usr/src/uts/common/io/arn/arn_eeprom.c

2664

ath9k_hw_get_4k_eeprom_antenna_cfg(struct ath_hal *ah,

usr/src/uts/common/io/arn/arn_eeprom.c

2668

struct ath_hal_5416 *ahp = AH5416(ah);

usr/src/uts/common/io/arn/arn_eeprom.c

2684

ath9k_hw_get_eeprom_antenna_cfg(struct ath_hal *ah,

usr/src/uts/common/io/arn/arn_eeprom.c

2688

struct ath_hal_5416 *ahp = AH5416(ah);

usr/src/uts/common/io/arn/arn_eeprom.c

2692

val = ath9k_hw_get_def_eeprom_antenna_cfg(ah, chan,

usr/src/uts/common/io/arn/arn_eeprom.c

2695

val = ath9k_hw_get_4k_eeprom_antenna_cfg(ah, chan,

usr/src/uts/common/io/arn/arn_eeprom.c

2703

ath9k_hw_get_4k_num_ant_config(struct ath_hal *ah,

usr/src/uts/common/io/arn/arn_eeprom.c

2710

ath9k_hw_get_def_num_ant_config(struct ath_hal *ah,

usr/src/uts/common/io/arn/arn_eeprom.c

2713

struct ath_hal_5416 *ahp = AH5416(ah);

usr/src/uts/common/io/arn/arn_eeprom.c

2731

ath9k_hw_get_num_ant_config(struct ath_hal *ah,

usr/src/uts/common/io/arn/arn_eeprom.c

2734

struct ath_hal_5416 *ahp = AH5416(ah);

usr/src/uts/common/io/arn/arn_eeprom.c

2738

val = ath9k_hw_get_def_num_ant_config(ah, freq_band);

usr/src/uts/common/io/arn/arn_eeprom.c

2740

val = ath9k_hw_get_4k_num_ant_config(ah, freq_band);

usr/src/uts/common/io/arn/arn_eeprom.c

2746

ath9k_hw_eeprom_get_spur_chan(struct ath_hal *ah, uint16_t i, boolean_t is2GHz)

usr/src/uts/common/io/arn/arn_eeprom.c

2753

struct ath_hal_5416 *ahp = AH5416(ah);

usr/src/uts/common/io/arn/arn_eeprom.c

2758

i, is2GHz, ah->ah_config.spurchans[i][is2GHz]));

usr/src/uts/common/io/arn/arn_eeprom.c

2760

switch (ah->ah_config.spurmode) {

usr/src/uts/common/io/arn/arn_eeprom.c

2764

spur_val = ah->ah_config.spurchans[i][is2GHz];

usr/src/uts/common/io/arn/arn_eeprom.c

2783

ath9k_hw_get_eeprom_4k(struct ath_hal *ah,

usr/src/uts/common/io/arn/arn_eeprom.c

2786

struct ath_hal_5416 *ahp = AH5416(ah);

usr/src/uts/common/io/arn/arn_eeprom.c

2829

ath9k_hw_get_eeprom_def(struct ath_hal *ah, enum eeprom_param param)

usr/src/uts/common/io/arn/arn_eeprom.c

2831

struct ath_hal_5416 *ahp = AH5416(ah);

usr/src/uts/common/io/arn/arn_eeprom.c

2903

ath9k_hw_get_eeprom(struct ath_hal *ah, enum eeprom_param param)

usr/src/uts/common/io/arn/arn_eeprom.c

2905

struct ath_hal_5416 *ahp = AH5416(ah);

usr/src/uts/common/io/arn/arn_eeprom.c

2909

val = ath9k_hw_get_eeprom_def(ah, param);

usr/src/uts/common/io/arn/arn_eeprom.c

2911

val = ath9k_hw_get_eeprom_4k(ah, param);

usr/src/uts/common/io/arn/arn_eeprom.c

2917

ath9k_hw_eeprom_attach(struct ath_hal *ah)

usr/src/uts/common/io/arn/arn_eeprom.c

2920

struct ath_hal_5416 *ahp = AH5416(ah);

usr/src/uts/common/io/arn/arn_eeprom.c

2922

if (ath9k_hw_use_flash(ah))

usr/src/uts/common/io/arn/arn_eeprom.c

2923

(void) ath9k_hw_flash_map(ah);

usr/src/uts/common/io/arn/arn_eeprom.c

2925

if (AR_SREV_9285(ah))

usr/src/uts/common/io/arn/arn_eeprom.c

2930

if (!ath9k_hw_fill_eeprom(ah))

usr/src/uts/common/io/arn/arn_eeprom.c

2933

status = ath9k_hw_check_eeprom(ah);

usr/src/uts/common/io/arn/arn_eeprom.c

371

ath9k_hw_check_4k_eeprom(struct ath_hal *ah)

usr/src/uts/common/io/arn/arn_eeprom.c

374

struct ath_hal_5416 *ahp = AH5416(ah);

usr/src/uts/common/io/arn/arn_eeprom.c

383

if (!ath9k_hw_use_flash(ah)) {

usr/src/uts/common/io/arn/arn_eeprom.c

385

if (!ath9k_hw_nvram_read(ah, AR5416_EEPROM_MAGIC_OFFSET,

usr/src/uts/common/io/arn/arn_eeprom.c

504

ath9k_hw_check_eeprom(struct ath_hal *ah)

usr/src/uts/common/io/arn/arn_eeprom.c

506

struct ath_hal_5416 *ahp = AH5416(ah);

usr/src/uts/common/io/arn/arn_eeprom.c

508

return (ath9k_check_eeprom[ahp->ah_eep_map](ah));

usr/src/uts/common/io/arn/arn_eeprom.c

541

ath9k_hw_get_4k_gain_boundaries_pdadcs(struct ath_hal *ah,

usr/src/uts/common/io/arn/arn_eeprom.c

572

ath9k_hw_get_channel_centers(ah, chan, &centers);

usr/src/uts/common/io/arn/arn_eeprom.c

60

ath9k_hw_analog_shift_rmw(struct ath_hal *ah,

usr/src/uts/common/io/arn/arn_eeprom.c

645

if ((i == 0) && !AR_SREV_5416_V20_OR_LATER(ah)) {

usr/src/uts/common/io/arn/arn_eeprom.c

653

if (AR_SREV_9280_10_OR_LATER(ah))

usr/src/uts/common/io/arn/arn_eeprom.c

66

regVal = REG_READ(ah, reg) & ~mask;

usr/src/uts/common/io/arn/arn_eeprom.c

69

REG_WRITE(ah, reg, regVal);

usr/src/uts/common/io/arn/arn_eeprom.c

71

if (ah->ah_config.analog_shiftreg)

usr/src/uts/common/io/arn/arn_eeprom.c

712

ath9k_hw_get_def_gain_boundaries_pdadcs(struct ath_hal *ah,

usr/src/uts/common/io/arn/arn_eeprom.c

740

ath9k_hw_get_channel_centers(ah, chan, &centers);

usr/src/uts/common/io/arn/arn_eeprom.c

813

if ((i == 0) && !AR_SREV_5416_V20_OR_LATER(ah)) {

usr/src/uts/common/io/arn/arn_eeprom.c

821

if (AR_SREV_9280_10_OR_LATER(ah))

usr/src/uts/common/io/arn/arn_eeprom.c

881

ath9k_hw_get_legacy_target_powers(struct ath_hal *ah,

usr/src/uts/common/io/arn/arn_eeprom.c

894

ath9k_hw_get_channel_centers(ah, chan, &centers);

usr/src/uts/common/io/arn/arn_eeprom.c

938

ath9k_hw_get_target_powers(struct ath_hal *ah,

usr/src/uts/common/io/arn/arn_eeprom.c

951

ath9k_hw_get_channel_centers(ah, chan, &centers);

usr/src/uts/common/io/arn/arn_hw.c

1002

ath9k_hw_ini_fixup(ah, &ahp->ah_eeprom.def,

usr/src/uts/common/io/arn/arn_hw.c

1008

if (!ath9k_hw_fill_cap_info(ah)) {

usr/src/uts/common/io/arn/arn_hw.c

1014

ecode = ath9k_hw_init_macaddr(ah);

usr/src/uts/common/io/arn/arn_hw.c

1022

if (AR_SREV_9285(ah))

usr/src/uts/common/io/arn/arn_hw.c

1023

ah->ah_txTrigLevel = (AR_FTRIG_256B >> AR_FTRIG_S);

usr/src/uts/common/io/arn/arn_hw.c

1025

ah->ah_txTrigLevel = (AR_FTRIG_512B >> AR_FTRIG_S);

usr/src/uts/common/io/arn/arn_hw.c

1027

ath9k_init_nfcal_hist_buffer(ah);

usr/src/uts/common/io/arn/arn_hw.c

1029

return (ah);

usr/src/uts/common/io/arn/arn_hw.c

104

ath9k_hw_chan2wmode(struct ath_hal *ah, const struct ath9k_channel *chan)

usr/src/uts/common/io/arn/arn_hw.c

1040

ath9k_hw_init_bb(struct ath_hal *ah, struct ath9k_channel *chan)

usr/src/uts/common/io/arn/arn_hw.c

1044

synthDelay = REG_READ(ah, AR_PHY_RX_DELAY) & AR_PHY_RX_DELAY_DELAY;

usr/src/uts/common/io/arn/arn_hw.c

1050

REG_WRITE(ah, AR_PHY_ACTIVE, AR_PHY_ACTIVE_EN);

usr/src/uts/common/io/arn/arn_hw.c

1056

ath9k_hw_init_qos(struct ath_hal *ah)

usr/src/uts/common/io/arn/arn_hw.c

1058

REG_WRITE(ah, AR_MIC_QOS_CONTROL, 0x100aa);

usr/src/uts/common/io/arn/arn_hw.c

1059

REG_WRITE(ah, AR_MIC_QOS_SELECT, 0x3210);

usr/src/uts/common/io/arn/arn_hw.c

1061

REG_WRITE(ah, AR_QOS_NO_ACK,

usr/src/uts/common/io/arn/arn_hw.c

1066

REG_WRITE(ah, AR_TXOP_X, AR_TXOP_X_VAL);

usr/src/uts/common/io/arn/arn_hw.c

1067

REG_WRITE(ah, AR_TXOP_0_3, 0xFFFFFFFF);

usr/src/uts/common/io/arn/arn_hw.c

1068

REG_WRITE(ah, AR_TXOP_4_7, 0xFFFFFFFF);

usr/src/uts/common/io/arn/arn_hw.c

1069

REG_WRITE(ah, AR_TXOP_8_11, 0xFFFFFFFF);

usr/src/uts/common/io/arn/arn_hw.c

1070

REG_WRITE(ah, AR_TXOP_12_15, 0xFFFFFFFF);

usr/src/uts/common/io/arn/arn_hw.c

1074

ath9k_hw_init_pll(struct ath_hal *ah, struct ath9k_channel *chan)

usr/src/uts/common/io/arn/arn_hw.c

1078

if (AR_SREV_9100(ah)) {

usr/src/uts/common/io/arn/arn_hw.c

1084

if (AR_SREV_9280_10_OR_LATER(ah)) {

usr/src/uts/common/io/arn/arn_hw.c

1096

if (AR_SREV_9280_20(ah)) {

usr/src/uts/common/io/arn/arn_hw.c

1107

} else if (AR_SREV_9160_10_OR_LATER(ah)) {

usr/src/uts/common/io/arn/arn_hw.c

1134

REG_WRITE(ah, (uint16_t)(AR_RTC_PLL_CONTROL), pll);

usr/src/uts/common/io/arn/arn_hw.c

1138

REG_WRITE(ah, AR_RTC_SLEEP_CLK, AR_RTC_FORCE_DERIVED_CLK);

usr/src/uts/common/io/arn/arn_hw.c

1142

ath9k_hw_init_chain_masks(struct ath_hal *ah)

usr/src/uts/common/io/arn/arn_hw.c

1144

struct ath_hal_5416 *ahp = AH5416(ah);

usr/src/uts/common/io/arn/arn_hw.c

115

ath9k_hw_wait(struct ath_hal *ah, uint32_t reg, uint32_t mask, uint32_t val)

usr/src/uts/common/io/arn/arn_hw.c

1152

REG_SET_BIT(ah, AR_PHY_ANALOG_SWAP,

usr/src/uts/common/io/arn/arn_hw.c

1156

if (((ah)->ah_macVersion <= AR_SREV_VERSION_9160)) {

usr/src/uts/common/io/arn/arn_hw.c

1157

REG_WRITE(ah, AR_PHY_RX_CHAINMASK, 0x7);

usr/src/uts/common/io/arn/arn_hw.c

1158

REG_WRITE(ah, AR_PHY_CAL_CHAINMASK, 0x7);

usr/src/uts/common/io/arn/arn_hw.c

1165

REG_WRITE(ah, AR_PHY_RX_CHAINMASK, rx_chainmask);

usr/src/uts/common/io/arn/arn_hw.c

1166

REG_WRITE(ah, AR_PHY_CAL_CHAINMASK, rx_chainmask);

usr/src/uts/common/io/arn/arn_hw.c

1172

REG_WRITE(ah, AR_SELFGEN_MASK, tx_chainmask);

usr/src/uts/common/io/arn/arn_hw.c

1174

REG_SET_BIT(ah, AR_PHY_ANALOG_SWAP,

usr/src/uts/common/io/arn/arn_hw.c

1177

if (AR_SREV_9100(ah))

usr/src/uts/common/io/arn/arn_hw.c

1178

REG_WRITE(ah, AR_PHY_ANALOG_SWAP,

usr/src/uts/common/io/arn/arn_hw.c

1179

REG_READ(ah, AR_PHY_ANALOG_SWAP) | 0x00000001);

usr/src/uts/common/io/arn/arn_hw.c

1183

ath9k_hw_init_interrupt_masks(struct ath_hal *ah, enum ath9k_opmode opmode)

usr/src/uts/common/io/arn/arn_hw.c

1185

struct ath_hal_5416 *ahp = AH5416(ah);

usr/src/uts/common/io/arn/arn_hw.c

120

if ((REG_READ(ah, reg) & mask) == val)

usr/src/uts/common/io/arn/arn_hw.c

1203

REG_WRITE(ah, AR_IMR, ahp->ah_maskReg);

usr/src/uts/common/io/arn/arn_hw.c

1204

REG_WRITE(ah, AR_IMR_S2, REG_READ(ah, AR_IMR_S2) | AR_IMR_S2_GTT);

usr/src/uts/common/io/arn/arn_hw.c

1206

if (!AR_SREV_9100(ah)) {

usr/src/uts/common/io/arn/arn_hw.c

1207

REG_WRITE(ah, AR_INTR_SYNC_CAUSE, 0xFFFFFFFF);

usr/src/uts/common/io/arn/arn_hw.c

1208

REG_WRITE(ah, AR_INTR_SYNC_ENABLE, AR_INTR_SYNC_DEFAULT);

usr/src/uts/common/io/arn/arn_hw.c

1209

REG_WRITE(ah, AR_INTR_SYNC_MASK, 0);

usr/src/uts/common/io/arn/arn_hw.c

1214

ath9k_hw_set_ack_timeout(struct ath_hal *ah, uint32_t us)

usr/src/uts/common/io/arn/arn_hw.c

1216

struct ath_hal_5416 *ahp = AH5416(ah);

usr/src/uts/common/io/arn/arn_hw.c

1218

if (us > ath9k_hw_mac_to_usec(ah, MS(0xffffffff, AR_TIME_OUT_ACK))) {

usr/src/uts/common/io/arn/arn_hw.c

1225

REG_RMW_FIELD(ah, AR_TIME_OUT,

usr/src/uts/common/io/arn/arn_hw.c

1226

AR_TIME_OUT_ACK, ath9k_hw_mac_to_clks(ah, us));

usr/src/uts/common/io/arn/arn_hw.c

1233

ath9k_hw_set_cts_timeout(struct ath_hal *ah, uint32_t us)

usr/src/uts/common/io/arn/arn_hw.c

1235

struct ath_hal_5416 *ahp = AH5416(ah);

usr/src/uts/common/io/arn/arn_hw.c

1237

if (us > ath9k_hw_mac_to_usec(ah, MS(0xffffffff, AR_TIME_OUT_CTS))) {

usr/src/uts/common/io/arn/arn_hw.c

1244

REG_RMW_FIELD(ah, AR_TIME_OUT,

usr/src/uts/common/io/arn/arn_hw.c

1245

AR_TIME_OUT_CTS, ath9k_hw_mac_to_clks(ah, us));

usr/src/uts/common/io/arn/arn_hw.c

1252

ath9k_hw_set_global_txtimeout(struct ath_hal *ah, uint32_t tu)

usr/src/uts/common/io/arn/arn_hw.c

1254

struct ath_hal_5416 *ahp = AH5416(ah);

usr/src/uts/common/io/arn/arn_hw.c

1264

REG_RMW_FIELD(ah, AR_GTXTO, AR_GTXTO_TIMEOUT_LIMIT, tu);

usr/src/uts/common/io/arn/arn_hw.c

127

reg, REG_READ(ah, reg), mask, val));

usr/src/uts/common/io/arn/arn_hw.c

1271

ath9k_hw_init_user_settings(struct ath_hal *ah)

usr/src/uts/common/io/arn/arn_hw.c

1273

struct ath_hal_5416 *ahp = AH5416(ah);

usr/src/uts/common/io/arn/arn_hw.c

1279

REG_WRITE(ah, AR_PCU_MISC,

usr/src/uts/common/io/arn/arn_hw.c

1280

REG_READ(ah, AR_PCU_MISC) | ahp->ah_miscMode);

usr/src/uts/common/io/arn/arn_hw.c

1282

(void) ath9k_hw_setslottime(ah, ahp->ah_slottime);

usr/src/uts/common/io/arn/arn_hw.c

1284

(void) ath9k_hw_set_ack_timeout(ah, ahp->ah_acktimeout);

usr/src/uts/common/io/arn/arn_hw.c

1286

(void) ath9k_hw_set_cts_timeout(ah, ahp->ah_ctstimeout);

usr/src/uts/common/io/arn/arn_hw.c

1289

(ah, ahp->ah_globaltxtimeout);

usr/src/uts/common/io/arn/arn_hw.c

1300

ath9k_hw_detach(struct ath_hal *ah)

usr/src/uts/common/io/arn/arn_hw.c

1302

if (!AR_SREV_9100(ah))

usr/src/uts/common/io/arn/arn_hw.c

1303

ath9k_hw_ani_detach(ah);

usr/src/uts/common/io/arn/arn_hw.c

1305

ath9k_hw_rfdetach(ah);

usr/src/uts/common/io/arn/arn_hw.c

1306

(void) ath9k_hw_setpower(ah, ATH9K_PM_FULL_SLEEP);

usr/src/uts/common/io/arn/arn_hw.c

1307

kmem_free(ah, sizeof (struct ath_hal_5416)); /* ???? */

usr/src/uts/common/io/arn/arn_hw.c

1314

struct ath_hal *ah = NULL;

usr/src/uts/common/io/arn/arn_hw.c

1323

ah = ath9k_hw_do_attach(device_id, sc, mem, error);

usr/src/uts/common/io/arn/arn_hw.c

1330

return (ah);

usr/src/uts/common/io/arn/arn_hw.c

1337

ath9k_hw_override_ini(struct ath_hal *ah, struct ath9k_channel *chan)

usr/src/uts/common/io/arn/arn_hw.c

1344

REG_SET_BIT(ah, AR_DIAG_SW, (AR_DIAG_RX_DIS | AR_DIAG_RX_ABORT));

usr/src/uts/common/io/arn/arn_hw.c

1346

if (!AR_SREV_5416_V20_OR_LATER(ah) ||

usr/src/uts/common/io/arn/arn_hw.c

1347

AR_SREV_9280_10_OR_LATER(ah))

usr/src/uts/common/io/arn/arn_hw.c

1350

REG_WRITE(ah, 0x9800 + (651 << 2), 0x11);

usr/src/uts/common/io/arn/arn_hw.c

1354

ath9k_hw_def_ini_fixup(struct ath_hal *ah,

usr/src/uts/common/io/arn/arn_hw.c

1360

switch (ah->ah_devid) {

usr/src/uts/common/io/arn/arn_hw.c

1395

ath9k_hw_ini_fixup(struct ath_hal *ah, struct ar5416_eeprom_def *pEepData,

usr/src/uts/common/io/arn/arn_hw.c

1398

struct ath_hal_5416 *ahp = AH5416(ah);

usr/src/uts/common/io/arn/arn_hw.c

1403

return (ath9k_hw_def_ini_fixup(ah, pEepData, reg, value));

usr/src/uts/common/io/arn/arn_hw.c

1407

ath9k_hw_process_ini(struct ath_hal *ah,

usr/src/uts/common/io/arn/arn_hw.c

1412

struct ath_hal_5416 *ahp = AH5416(ah);

usr/src/uts/common/io/arn/arn_hw.c

1445

REG_WRITE(ah, AR_PHY(0), 0x00000007);

usr/src/uts/common/io/arn/arn_hw.c

1447

REG_WRITE(ah, AR_PHY_ADC_SERIAL_CTL, AR_PHY_SEL_EXTERNAL_RADIO);

usr/src/uts/common/io/arn/arn_hw.c

1449

ath9k_hw_set_addac(ah, chan);

usr/src/uts/common/io/arn/arn_hw.c

1451

if (AR_SREV_5416_V22_OR_LATER(ah)) {

usr/src/uts/common/io/arn/arn_hw.c

146

ath9k_get_channel_edges(struct ath_hal *ah,

usr/src/uts/common/io/arn/arn_hw.c

1473

REG_WRITE(ah, AR_PHY_ADC_SERIAL_CTL, AR_PHY_SEL_INTERNAL_ADDAC);

usr/src/uts/common/io/arn/arn_hw.c

1479

REG_WRITE(ah, reg, val);

usr/src/uts/common/io/arn/arn_hw.c

1482

ah->ah_config.analog_shiftreg) {

usr/src/uts/common/io/arn/arn_hw.c

149

struct ath9k_hw_capabilities *pCap = &ah->ah_caps;

usr/src/uts/common/io/arn/arn_hw.c

1490

if (AR_SREV_9280(ah)) {

usr/src/uts/common/io/arn/arn_hw.c

1496

if (AR_SREV_9280(ah)) {

usr/src/uts/common/io/arn/arn_hw.c

1506

REG_WRITE(ah, reg, val);

usr/src/uts/common/io/arn/arn_hw.c

1509

ah->ah_config.analog_shiftreg) {

usr/src/uts/common/io/arn/arn_hw.c

1517

ath9k_hw_write_regs(ah, modesIndex, freqIndex, regWrites);

usr/src/uts/common/io/arn/arn_hw.c

1519

if (AR_SREV_9280_20(ah) && IS_CHAN_A_5MHZ_SPACED(chan)) {

usr/src/uts/common/io/arn/arn_hw.c

1525

ath9k_hw_override_ini(ah, chan);

usr/src/uts/common/io/arn/arn_hw.c

1526

ath9k_hw_set_regs(ah, chan, macmode);

usr/src/uts/common/io/arn/arn_hw.c

1527

ath9k_hw_init_chain_masks(ah);

usr/src/uts/common/io/arn/arn_hw.c

1529

status = ath9k_hw_set_txpower(ah, chan,

usr/src/uts/common/io/arn/arn_hw.c

1530

ath9k_regd_get_ctl(ah, chan),

usr/src/uts/common/io/arn/arn_hw.c

1531

ath9k_regd_get_antenna_allowed(ah, chan),

usr/src/uts/common/io/arn/arn_hw.c

1534

(uint32_t)ah->ah_powerLimit));

usr/src/uts/common/io/arn/arn_hw.c

1542

if (!ath9k_hw_set_rf_regs(ah, chan, freqIndex)) {

usr/src/uts/common/io/arn/arn_hw.c

1555

ath9k_hw_set_rfmode(struct ath_hal *ah, struct ath9k_channel *chan)

usr/src/uts/common/io/arn/arn_hw.c

1565

if (!AR_SREV_9280_10_OR_LATER(ah))

usr/src/uts/common/io/arn/arn_hw.c

1569

if (AR_SREV_9280_20(ah) && IS_CHAN_A_5MHZ_SPACED(chan))

usr/src/uts/common/io/arn/arn_hw.c

1573

REG_WRITE(ah, AR_PHY_MODE, rfMode);

usr/src/uts/common/io/arn/arn_hw.c

1577

ath9k_hw_mark_phy_inactive(struct ath_hal *ah)

usr/src/uts/common/io/arn/arn_hw.c

1579

REG_WRITE(ah, AR_PHY_ACTIVE, AR_PHY_ACTIVE_DIS);

usr/src/uts/common/io/arn/arn_hw.c

1583

ath9k_hw_set_dma(struct ath_hal *ah)

usr/src/uts/common/io/arn/arn_hw.c

1587

regval = REG_READ(ah, AR_AHB_MODE);

usr/src/uts/common/io/arn/arn_hw.c

1588

REG_WRITE(ah, AR_AHB_MODE, regval | AR_AHB_PREFETCH_RD_EN);

usr/src/uts/common/io/arn/arn_hw.c

1590

regval = REG_READ(ah, AR_TXCFG) & ~AR_TXCFG_DMASZ_MASK;

usr/src/uts/common/io/arn/arn_hw.c

1591

REG_WRITE(ah, AR_TXCFG, regval | AR_TXCFG_DMASZ_128B);

usr/src/uts/common/io/arn/arn_hw.c

1593

REG_RMW_FIELD(ah, AR_TXCFG, AR_FTRIG, ah->ah_txTrigLevel);

usr/src/uts/common/io/arn/arn_hw.c

1595

regval = REG_READ(ah, AR_RXCFG) & ~AR_RXCFG_DMASZ_MASK;

usr/src/uts/common/io/arn/arn_hw.c

1596

REG_WRITE(ah, AR_RXCFG, regval | AR_RXCFG_DMASZ_128B);

usr/src/uts/common/io/arn/arn_hw.c

1598

REG_WRITE(ah, AR_RXFIFO_CFG, 0x200);

usr/src/uts/common/io/arn/arn_hw.c

1600

if (AR_SREV_9285(ah)) {

usr/src/uts/common/io/arn/arn_hw.c

1601

REG_WRITE(ah, AR_PCU_TXBUF_CTRL,

usr/src/uts/common/io/arn/arn_hw.c

1604

REG_WRITE(ah, AR_PCU_TXBUF_CTRL,

usr/src/uts/common/io/arn/arn_hw.c

1610

ath9k_hw_set_operating_mode(struct ath_hal *ah, int opmode)

usr/src/uts/common/io/arn/arn_hw.c

1614

val = REG_READ(ah, AR_STA_ID1);

usr/src/uts/common/io/arn/arn_hw.c

1618

REG_WRITE(ah, AR_STA_ID1, val | AR_STA_ID1_STA_AP |

usr/src/uts/common/io/arn/arn_hw.c

1620

REG_CLR_BIT(ah, AR_CFG, AR_CFG_AP_ADHOC_INDICATION);

usr/src/uts/common/io/arn/arn_hw.c

1623

REG_WRITE(ah, AR_STA_ID1, val | AR_STA_ID1_ADHOC |

usr/src/uts/common/io/arn/arn_hw.c

1625

REG_SET_BIT(ah, AR_CFG, AR_CFG_AP_ADHOC_INDICATION);

usr/src/uts/common/io/arn/arn_hw.c

1629

REG_WRITE(ah, AR_STA_ID1, val | AR_STA_ID1_KSRCH_MODE);

usr/src/uts/common/io/arn/arn_hw.c

1636

ath9k_hw_get_delta_slope_vals(struct ath_hal *ah,

usr/src/uts/common/io/arn/arn_hw.c

165

ath9k_hw_computetxtime(struct ath_hal *ah,

usr/src/uts/common/io/arn/arn_hw.c

1656

ath9k_hw_set_delta_slope(struct ath_hal *ah,

usr/src/uts/common/io/arn/arn_hw.c

1668

ath9k_hw_get_channel_centers(ah, chan, &centers);

usr/src/uts/common/io/arn/arn_hw.c

1671

ath9k_hw_get_delta_slope_vals(ah, coef_scaled, &ds_coef_man,

usr/src/uts/common/io/arn/arn_hw.c

1674

REG_RMW_FIELD(ah, AR_PHY_TIMING3,

usr/src/uts/common/io/arn/arn_hw.c

1676

REG_RMW_FIELD(ah, AR_PHY_TIMING3,

usr/src/uts/common/io/arn/arn_hw.c

1681

ath9k_hw_get_delta_slope_vals(ah, coef_scaled, &ds_coef_man,

usr/src/uts/common/io/arn/arn_hw.c

1684

REG_RMW_FIELD(ah, AR_PHY_HALFGI,

usr/src/uts/common/io/arn/arn_hw.c

1686

REG_RMW_FIELD(ah, AR_PHY_HALFGI,

usr/src/uts/common/io/arn/arn_hw.c

1691

ath9k_hw_set_reset(struct ath_hal *ah, int type)

usr/src/uts/common/io/arn/arn_hw.c

1696

REG_WRITE(ah, AR_RTC_FORCE_WAKE, AR_RTC_FORCE_WAKE_EN |

usr/src/uts/common/io/arn/arn_hw.c

1699

if (AR_SREV_9100(ah)) {

usr/src/uts/common/io/arn/arn_hw.c

1703

tmpReg = REG_READ(ah, AR_INTR_SYNC_CAUSE);

usr/src/uts/common/io/arn/arn_hw.c

1707

REG_WRITE(ah, AR_INTR_SYNC_ENABLE, 0);

usr/src/uts/common/io/arn/arn_hw.c

1708

REG_WRITE(ah, AR_RC, AR_RC_AHB | AR_RC_HOSTIF);

usr/src/uts/common/io/arn/arn_hw.c

1710

REG_WRITE(ah, AR_RC, AR_RC_AHB);

usr/src/uts/common/io/arn/arn_hw.c

1718

REG_WRITE(ah, (uint16_t)(AR_RTC_RC), rst_flags);

usr/src/uts/common/io/arn/arn_hw.c

1721

REG_WRITE(ah, (uint16_t)(AR_RTC_RC), 0);

usr/src/uts/common/io/arn/arn_hw.c

1722

if (!ath9k_hw_wait(ah, (uint16_t)(AR_RTC_RC), AR_RTC_RC_M, 0)) {

usr/src/uts/common/io/arn/arn_hw.c

1729

if (!AR_SREV_9100(ah))

usr/src/uts/common/io/arn/arn_hw.c

1730

REG_WRITE(ah, AR_RC, 0);

usr/src/uts/common/io/arn/arn_hw.c

1732

ath9k_hw_init_pll(ah, NULL);

usr/src/uts/common/io/arn/arn_hw.c

1734

if (AR_SREV_9100(ah))

usr/src/uts/common/io/arn/arn_hw.c

1741

ath9k_hw_set_reset_power_on(struct ath_hal *ah)

usr/src/uts/common/io/arn/arn_hw.c

1743

REG_WRITE(ah, AR_RTC_FORCE_WAKE, AR_RTC_FORCE_WAKE_EN |

usr/src/uts/common/io/arn/arn_hw.c

1746

REG_WRITE(ah, (uint16_t)(AR_RTC_RESET), 0);

usr/src/uts/common/io/arn/arn_hw.c

1747

REG_WRITE(ah, (uint16_t)(AR_RTC_RESET), 1);

usr/src/uts/common/io/arn/arn_hw.c

1749

if (!ath9k_hw_wait(ah,

usr/src/uts/common/io/arn/arn_hw.c

1760

ath9k_hw_read_revisions(ah);

usr/src/uts/common/io/arn/arn_hw.c

1762

return (ath9k_hw_set_reset(ah, ATH9K_RESET_WARM));

usr/src/uts/common/io/arn/arn_hw.c

1766

ath9k_hw_set_reset_reg(struct ath_hal *ah, uint32_t type)

usr/src/uts/common/io/arn/arn_hw.c

1768

REG_WRITE(ah, AR_RTC_FORCE_WAKE,

usr/src/uts/common/io/arn/arn_hw.c

1773

return (ath9k_hw_set_reset_power_on(ah));

usr/src/uts/common/io/arn/arn_hw.c

1776

return (ath9k_hw_set_reset(ah, type));

usr/src/uts/common/io/arn/arn_hw.c

1783

ath9k_hw_set_regs(struct ath_hal *ah, struct ath9k_channel *chan,

usr/src/uts/common/io/arn/arn_hw.c

1788

struct ath_hal_5416 *ahp = AH5416(ah);

usr/src/uts/common/io/arn/arn_hw.c

1790

if (AR_SREV_9285_10_OR_LATER(ah))

usr/src/uts/common/io/arn/arn_hw.c

1791

enableDacFifo = (REG_READ(ah, AR_PHY_TURBO) &

usr/src/uts/common/io/arn/arn_hw.c

1807

REG_WRITE(ah, AR_PHY_TURBO, phymode);

usr/src/uts/common/io/arn/arn_hw.c

1809

ath9k_hw_set11nmac2040(ah, macmode);

usr/src/uts/common/io/arn/arn_hw.c

1811

REG_WRITE(ah, AR_GTXTO, 25 << AR_GTXTO_TIMEOUT_LIMIT_S);

usr/src/uts/common/io/arn/arn_hw.c

1812

REG_WRITE(ah, AR_CST, 0xF << AR_CST_TIMEOUT_LIMIT_S);

usr/src/uts/common/io/arn/arn_hw.c

1816

ath9k_hw_chip_reset(struct ath_hal *ah,

usr/src/uts/common/io/arn/arn_hw.c

1819

struct ath_hal_5416 *ahp = AH5416(ah);

usr/src/uts/common/io/arn/arn_hw.c

1821

if (!ath9k_hw_set_reset_reg(ah, ATH9K_RESET_WARM))

usr/src/uts/common/io/arn/arn_hw.c

1824

if (!ath9k_hw_setpower(ah, ATH9K_PM_AWAKE))

usr/src/uts/common/io/arn/arn_hw.c

1829

ath9k_hw_init_pll(ah, chan);

usr/src/uts/common/io/arn/arn_hw.c

1831

ath9k_hw_set_rfmode(ah, chan);

usr/src/uts/common/io/arn/arn_hw.c

1837

ath9k_hw_check_chan(struct ath_hal *ah, struct ath9k_channel *chan)

usr/src/uts/common/io/arn/arn_hw.c

1858

return (ath9k_regd_check_channel(ah, chan));

usr/src/uts/common/io/arn/arn_hw.c

1862

ath9k_hw_channel_change(struct ath_hal *ah,

usr/src/uts/common/io/arn/arn_hw.c

1869

if (ath9k_hw_numtxpending(ah, qnum)) {

usr/src/uts/common/io/arn/arn_hw.c

187

if (ah->ah_curchan && IS_CHAN_QUARTER_RATE(ah->ah_curchan)) {

usr/src/uts/common/io/arn/arn_hw.c

1878

REG_WRITE(ah, AR_PHY_RFBUS_REQ, AR_PHY_RFBUS_REQ_EN);

usr/src/uts/common/io/arn/arn_hw.c

1879

if (!ath9k_hw_wait(ah, AR_PHY_RFBUS_GRANT, AR_PHY_RFBUS_GRANT_EN,

usr/src/uts/common/io/arn/arn_hw.c

1887

ath9k_hw_set_regs(ah, chan, macmode);

usr/src/uts/common/io/arn/arn_hw.c

1889

if (AR_SREV_9280_10_OR_LATER(ah)) {

usr/src/uts/common/io/arn/arn_hw.c

1890

if (!(ath9k_hw_ar9280_set_channel(ah, chan))) {

usr/src/uts/common/io/arn/arn_hw.c

1896

if (!(ath9k_hw_set_channel(ah, chan))) {

usr/src/uts/common/io/arn/arn_hw.c

1904

if (ath9k_hw_set_txpower(ah, chan,

usr/src/uts/common/io/arn/arn_hw.c

1905

ath9k_regd_get_ctl(ah, chan),

usr/src/uts/common/io/arn/arn_hw.c

1906

ath9k_regd_get_antenna_allowed(ah, chan),

usr/src/uts/common/io/arn/arn_hw.c

1909

(uint32_t)ah->ah_powerLimit)) != 0) {

usr/src/uts/common/io/arn/arn_hw.c

1916

synthDelay = REG_READ(ah, AR_PHY_RX_DELAY) & AR_PHY_RX_DELAY_DELAY;

usr/src/uts/common/io/arn/arn_hw.c

1924

REG_WRITE(ah, AR_PHY_RFBUS_REQ, 0);

usr/src/uts/common/io/arn/arn_hw.c

1927

ath9k_hw_set_delta_slope(ah, chan);

usr/src/uts/common/io/arn/arn_hw.c

1929

if (AR_SREV_9280_10_OR_LATER(ah))

usr/src/uts/common/io/arn/arn_hw.c

1930

ath9k_hw_9280_spur_mitigate(ah, chan);

usr/src/uts/common/io/arn/arn_hw.c

1932

ath9k_hw_spur_mitigate(ah, chan);

usr/src/uts/common/io/arn/arn_hw.c

1941

ath9k_hw_9280_spur_mitigate(struct ath_hal *ah, struct ath9k_channel *chan)

usr/src/uts/common/io/arn/arn_hw.c

195

} else if (ah->ah_curchan &&

usr/src/uts/common/io/arn/arn_hw.c

196

IS_CHAN_HALF_RATE(ah->ah_curchan)) {

usr/src/uts/common/io/arn/arn_hw.c

1972

ath9k_hw_get_channel_centers(ah, chan, &centers);

usr/src/uts/common/io/arn/arn_hw.c

1975

ah->ah_config.spurmode = SPUR_ENABLE_EEPROM;

usr/src/uts/common/io/arn/arn_hw.c

1977

cur_bb_spur = ath9k_hw_eeprom_get_spur_chan(ah, i, is2GHz);

usr/src/uts/common/io/arn/arn_hw.c

2002

REG_CLR_BIT(ah, AR_PHY_FORCE_CLKEN_CCK,

usr/src/uts/common/io/arn/arn_hw.c

2006

REG_CLR_BIT(ah, AR_PHY_FORCE_CLKEN_CCK,

usr/src/uts/common/io/arn/arn_hw.c

2012

tmp = REG_READ(ah, AR_PHY_TIMING_CTRL4(0));

usr/src/uts/common/io/arn/arn_hw.c

2018

REG_WRITE(ah, AR_PHY_TIMING_CTRL4(0), newVal);

usr/src/uts/common/io/arn/arn_hw.c

2025

REG_WRITE(ah, AR_PHY_SPUR_REG, newVal);

usr/src/uts/common/io/arn/arn_hw.c

2055

REG_WRITE(ah, AR_PHY_TIMING11, newVal);

usr/src/uts/common/io/arn/arn_hw.c

2058

REG_WRITE(ah, AR_PHY_SFCORR_EXT, newVal);

usr/src/uts/common/io/arn/arn_hw.c

2076

REG_WRITE(ah, pilot_mask_reg[i], pilot_mask);

usr/src/uts/common/io/arn/arn_hw.c

2077

REG_WRITE(ah, chan_mask_reg[i], chan_mask);

usr/src/uts/common/io/arn/arn_hw.c

2110

REG_WRITE(ah, AR_PHY_BIN_MASK_1, tmp_mask);

usr/src/uts/common/io/arn/arn_hw.c

2111

REG_WRITE(ah, AR_PHY_VIT_MASK2_M_46_61, tmp_mask);

usr/src/uts/common/io/arn/arn_hw.c

2121

REG_WRITE(ah, AR_PHY_BIN_MASK_2, tmp_mask);

usr/src/uts/common/io/arn/arn_hw.c

2122

REG_WRITE(ah, AR_PHY_MASK2_M_31_45, tmp_mask);

usr/src/uts/common/io/arn/arn_hw.c

2132

REG_WRITE(ah, AR_PHY_BIN_MASK_3, tmp_mask);

usr/src/uts/common/io/arn/arn_hw.c

2133

REG_WRITE(ah, AR_PHY_MASK2_M_16_30, tmp_mask);

usr/src/uts/common/io/arn/arn_hw.c

2143

REG_WRITE(ah, AR_PHY_MASK_CTL, tmp_mask);

usr/src/uts/common/io/arn/arn_hw.c

2144

REG_WRITE(ah, AR_PHY_MASK2_M_00_15, tmp_mask);

usr/src/uts/common/io/arn/arn_hw.c

2154

REG_WRITE(ah, AR_PHY_BIN_MASK2_1, tmp_mask);

usr/src/uts/common/io/arn/arn_hw.c

2155

REG_WRITE(ah, AR_PHY_MASK2_P_15_01, tmp_mask);

usr/src/uts/common/io/arn/arn_hw.c

2165

REG_WRITE(ah, AR_PHY_BIN_MASK2_2, tmp_mask);

usr/src/uts/common/io/arn/arn_hw.c

2166

REG_WRITE(ah, AR_PHY_MASK2_P_30_16, tmp_mask);

usr/src/uts/common/io/arn/arn_hw.c

2176

REG_WRITE(ah, AR_PHY_BIN_MASK2_3, tmp_mask);

usr/src/uts/common/io/arn/arn_hw.c

2177

REG_WRITE(ah, AR_PHY_MASK2_P_45_31, tmp_mask);

usr/src/uts/common/io/arn/arn_hw.c

2187

REG_WRITE(ah, AR_PHY_BIN_MASK2_4, tmp_mask);

usr/src/uts/common/io/arn/arn_hw.c

2188

REG_WRITE(ah, AR_PHY_MASK2_P_61_45, tmp_mask);

usr/src/uts/common/io/arn/arn_hw.c

2192

ath9k_hw_spur_mitigate(struct ath_hal *ah, struct ath9k_channel *chan)

usr/src/uts/common/io/arn/arn_hw.c

2221

cur_bb_spur = ath9k_hw_eeprom_get_spur_chan(ah, i, is2GHz);

usr/src/uts/common/io/arn/arn_hw.c

223

ath9k_hw_mhz2ieee(struct ath_hal *ah, uint32_t freq, uint32_t flags)

usr/src/uts/common/io/arn/arn_hw.c

2236

tmp = REG_READ(ah, AR_PHY_TIMING_CTRL4(0));

usr/src/uts/common/io/arn/arn_hw.c

2242

REG_WRITE(ah, AR_PHY_TIMING_CTRL4(0), new);

usr/src/uts/common/io/arn/arn_hw.c

2249

REG_WRITE(ah, AR_PHY_SPUR_REG, new);

usr/src/uts/common/io/arn/arn_hw.c

2260

REG_WRITE(ah, AR_PHY_TIMING11, new);

usr/src/uts/common/io/arn/arn_hw.c

2278

REG_WRITE(ah, pilot_mask_reg[i], pilot_mask);

usr/src/uts/common/io/arn/arn_hw.c

2279

REG_WRITE(ah, chan_mask_reg[i], chan_mask);

usr/src/uts/common/io/arn/arn_hw.c

2312

REG_WRITE(ah, AR_PHY_BIN_MASK_1, tmp_mask);

usr/src/uts/common/io/arn/arn_hw.c

2313

REG_WRITE(ah, AR_PHY_VIT_MASK2_M_46_61, tmp_mask);

usr/src/uts/common/io/arn/arn_hw.c

2323

REG_WRITE(ah, AR_PHY_BIN_MASK_2, tmp_mask);

usr/src/uts/common/io/arn/arn_hw.c

2324

REG_WRITE(ah, AR_PHY_MASK2_M_31_45, tmp_mask);

usr/src/uts/common/io/arn/arn_hw.c

233

if (ath9k_regd_is_public_safety_sku(ah) &&

usr/src/uts/common/io/arn/arn_hw.c

2334

REG_WRITE(ah, AR_PHY_BIN_MASK_3, tmp_mask);

usr/src/uts/common/io/arn/arn_hw.c

2335

REG_WRITE(ah, AR_PHY_MASK2_M_16_30, tmp_mask);

usr/src/uts/common/io/arn/arn_hw.c

2345

REG_WRITE(ah, AR_PHY_MASK_CTL, tmp_mask);

usr/src/uts/common/io/arn/arn_hw.c

2346

REG_WRITE(ah, AR_PHY_MASK2_M_00_15, tmp_mask);

usr/src/uts/common/io/arn/arn_hw.c

2356

REG_WRITE(ah, AR_PHY_BIN_MASK2_1, tmp_mask);

usr/src/uts/common/io/arn/arn_hw.c

2357

REG_WRITE(ah, AR_PHY_MASK2_P_15_01, tmp_mask);

usr/src/uts/common/io/arn/arn_hw.c

2367

REG_WRITE(ah, AR_PHY_BIN_MASK2_2, tmp_mask);

usr/src/uts/common/io/arn/arn_hw.c

2368

REG_WRITE(ah, AR_PHY_MASK2_P_30_16, tmp_mask);

usr/src/uts/common/io/arn/arn_hw.c

2378

REG_WRITE(ah, AR_PHY_BIN_MASK2_3, tmp_mask);

usr/src/uts/common/io/arn/arn_hw.c

2379

REG_WRITE(ah, AR_PHY_MASK2_P_45_31, tmp_mask);

usr/src/uts/common/io/arn/arn_hw.c

2389

REG_WRITE(ah, AR_PHY_BIN_MASK2_4, tmp_mask);

usr/src/uts/common/io/arn/arn_hw.c

2390

REG_WRITE(ah, AR_PHY_MASK2_P_61_45, tmp_mask);

usr/src/uts/common/io/arn/arn_hw.c

2394

ath9k_hw_reset(struct ath_hal *ah, struct ath9k_channel *chan,

usr/src/uts/common/io/arn/arn_hw.c

2401

struct ath_hal_5416 *ahp = AH5416(ah);

usr/src/uts/common/io/arn/arn_hw.c

2402

struct ath9k_channel *curchan = ah->ah_curchan;

usr/src/uts/common/io/arn/arn_hw.c

2412

if (AR_SREV_9280(ah)) {

usr/src/uts/common/io/arn/arn_hw.c

2417

if (ath9k_hw_check_chan(ah, chan) == NULL) {

usr/src/uts/common/io/arn/arn_hw.c

2425

if (!ath9k_hw_setpower(ah, ATH9K_PM_AWAKE)) {

usr/src/uts/common/io/arn/arn_hw.c

2433

(void) ath9k_hw_getnf(ah, curchan);

usr/src/uts/common/io/arn/arn_hw.c

2437

(ah->ah_curchan != NULL) &&

usr/src/uts/common/io/arn/arn_hw.c

2438

(chan->channel != ah->ah_curchan->channel) &&

usr/src/uts/common/io/arn/arn_hw.c

2440

(ah->ah_curchan->channelFlags & CHANNEL_ALL)) &&

usr/src/uts/common/io/arn/arn_hw.c

2441

(!AR_SREV_9280(ah) || (!IS_CHAN_A_5MHZ_SPACED(chan) &&

usr/src/uts/common/io/arn/arn_hw.c

2442

!IS_CHAN_A_5MHZ_SPACED(ah->ah_curchan)))) {

usr/src/uts/common/io/arn/arn_hw.c

2444

if (ath9k_hw_channel_change(ah, chan, macmode)) {

usr/src/uts/common/io/arn/arn_hw.c

2445

ath9k_hw_loadnf(ah, ah->ah_curchan);

usr/src/uts/common/io/arn/arn_hw.c

2446

ath9k_hw_start_nfcal(ah);

usr/src/uts/common/io/arn/arn_hw.c

2451

saveDefAntenna = REG_READ(ah, AR_DEF_ANTENNA);

usr/src/uts/common/io/arn/arn_hw.c

2455

macStaId1 = REG_READ(ah, AR_STA_ID1) & AR_STA_ID1_BASE_RATE_11B;

usr/src/uts/common/io/arn/arn_hw.c

2457

saveLedState = REG_READ(ah, AR_CFG_LED) &

usr/src/uts/common/io/arn/arn_hw.c

2461

ath9k_hw_mark_phy_inactive(ah);

usr/src/uts/common/io/arn/arn_hw.c

2463

if (!ath9k_hw_chip_reset(ah, chan)) {

usr/src/uts/common/io/arn/arn_hw.c

2470

if (AR_SREV_9280(ah)) {

usr/src/uts/common/io/arn/arn_hw.c

2471

REG_SET_BIT(ah, AR_GPIO_INPUT_EN_VAL,

usr/src/uts/common/io/arn/arn_hw.c

2473

if (is_set(ATH9K_MODE_11A, ah->ah_caps.wireless_modes)) {

usr/src/uts/common/io/arn/arn_hw.c

2475

ath9k_hw_set_gpio(ah, 9, 0);

usr/src/uts/common/io/arn/arn_hw.c

2477

ath9k_hw_set_gpio(ah, 9, 1);

usr/src/uts/common/io/arn/arn_hw.c

2479

ath9k_hw_cfg_output(ah, 9, AR_GPIO_OUTPUT_MUX_AS_OUTPUT);

usr/src/uts/common/io/arn/arn_hw.c

248

if (ath9k_regd_is_public_safety_sku(ah) &&

usr/src/uts/common/io/arn/arn_hw.c

2482

ecode = ath9k_hw_process_ini(ah, chan, macmode);

usr/src/uts/common/io/arn/arn_hw.c

2489

ath9k_hw_set_delta_slope(ah, chan);

usr/src/uts/common/io/arn/arn_hw.c

2491

if (AR_SREV_9280_10_OR_LATER(ah))

usr/src/uts/common/io/arn/arn_hw.c

2492

ath9k_hw_9280_spur_mitigate(ah, chan);

usr/src/uts/common/io/arn/arn_hw.c

2494

ath9k_hw_spur_mitigate(ah, chan);

usr/src/uts/common/io/arn/arn_hw.c

2496

if (!ath9k_hw_eeprom_set_board_values(ah, chan)) {

usr/src/uts/common/io/arn/arn_hw.c

2503

ath9k_hw_decrease_chain_power(ah, chan);

usr/src/uts/common/io/arn/arn_hw.c

2505

REG_WRITE(ah, AR_STA_ID0, ARN_LE_READ_32(ahp->ah_macaddr));

usr/src/uts/common/io/arn/arn_hw.c

2506

REG_WRITE(ah, AR_STA_ID1, ARN_LE_READ_16(ahp->ah_macaddr + 4) |

usr/src/uts/common/io/arn/arn_hw.c

2509

(ah->ah_config.ack_6mb ? AR_STA_ID1_ACKCTS_6MB : 0) |

usr/src/uts/common/io/arn/arn_hw.c

2511

ath9k_hw_set_operating_mode(ah, ah->ah_opmode);

usr/src/uts/common/io/arn/arn_hw.c

2513

REG_WRITE(ah, AR_BSSMSKL, ARN_LE_READ_32(ahp->ah_bssidmask));

usr/src/uts/common/io/arn/arn_hw.c

2514

REG_WRITE(ah, AR_BSSMSKU, ARN_LE_READ_16(ahp->ah_bssidmask + 4));

usr/src/uts/common/io/arn/arn_hw.c

2516

REG_WRITE(ah, AR_DEF_ANTENNA, saveDefAntenna);

usr/src/uts/common/io/arn/arn_hw.c

2518

REG_WRITE(ah, AR_BSS_ID0, ARN_LE_READ_32(ahp->ah_bssid));

usr/src/uts/common/io/arn/arn_hw.c

2519

REG_WRITE(ah, AR_BSS_ID1, ARN_LE_READ_16(ahp->ah_bssid + 4) |

usr/src/uts/common/io/arn/arn_hw.c

2522

REG_WRITE(ah, AR_ISR, ~0);

usr/src/uts/common/io/arn/arn_hw.c

2524

REG_WRITE(ah, AR_RSSI_THR, INIT_RSSI_THR);

usr/src/uts/common/io/arn/arn_hw.c

2526

if (AR_SREV_9280_10_OR_LATER(ah)) {

usr/src/uts/common/io/arn/arn_hw.c

2527

if (!(ath9k_hw_ar9280_set_channel(ah, chan))) {

usr/src/uts/common/io/arn/arn_hw.c

2535

if (!(ath9k_hw_set_channel(ah, chan))) {

usr/src/uts/common/io/arn/arn_hw.c

2544

REG_WRITE(ah, AR_DQCUMASK(i), 1 << i);

usr/src/uts/common/io/arn/arn_hw.c

2547

for (i = 0; i < ah->ah_caps.total_queues; i++)

usr/src/uts/common/io/arn/arn_hw.c

2548

(void) ath9k_hw_resettxqueue(ah, i);

usr/src/uts/common/io/arn/arn_hw.c

2550

ath9k_hw_init_interrupt_masks(ah, ah->ah_opmode);

usr/src/uts/common/io/arn/arn_hw.c

2551

ath9k_hw_init_qos(ah);

usr/src/uts/common/io/arn/arn_hw.c

2554

if (ah->ah_caps.hw_caps & ATH9K_HW_CAP_RFSILENT)

usr/src/uts/common/io/arn/arn_hw.c

2555

ath9k_enable_rfkill(ah);

usr/src/uts/common/io/arn/arn_hw.c

2557

ath9k_hw_init_user_settings(ah);

usr/src/uts/common/io/arn/arn_hw.c

2559

REG_WRITE(ah, AR_STA_ID1,

usr/src/uts/common/io/arn/arn_hw.c

2560

REG_READ(ah, AR_STA_ID1) | AR_STA_ID1_PRESERVE_SEQNUM);

usr/src/uts/common/io/arn/arn_hw.c

2562

ath9k_hw_set_dma(ah);

usr/src/uts/common/io/arn/arn_hw.c

2564

REG_WRITE(ah, AR_OBS, 8);

usr/src/uts/common/io/arn/arn_hw.c

2568

REG_RMW_FIELD(ah, AR_RIMT, AR_RIMT_LAST, 500);

usr/src/uts/common/io/arn/arn_hw.c

2569

REG_RMW_FIELD(ah, AR_RIMT, AR_RIMT_FIRST, 2000);

usr/src/uts/common/io/arn/arn_hw.c

2572

ath9k_hw_init_bb(ah, chan);

usr/src/uts/common/io/arn/arn_hw.c

2574

if (!ath9k_hw_init_cal(ah, chan)) {

usr/src/uts/common/io/arn/arn_hw.c

2581

REG_WRITE(ah, AR_PHY_RX_CHAINMASK, rx_chainmask);

usr/src/uts/common/io/arn/arn_hw.c

2582

REG_WRITE(ah, AR_PHY_CAL_CHAINMASK, rx_chainmask);

usr/src/uts/common/io/arn/arn_hw.c

2585

REG_WRITE(ah, AR_CFG_LED, saveLedState | AR_CFG_SCLK_32KHZ);

usr/src/uts/common/io/arn/arn_hw.c

2587

if (AR_SREV_9100(ah)) {

usr/src/uts/common/io/arn/arn_hw.c

2589

mask = REG_READ(ah, AR_CFG);

usr/src/uts/common/io/arn/arn_hw.c

2597

REG_WRITE(ah, AR_CFG, mask);

usr/src/uts/common/io/arn/arn_hw.c

2600

__func__, REG_READ(ah, AR_CFG)));

usr/src/uts/common/io/arn/arn_hw.c

2606

REG_WRITE(ah, AR_CFG, AR_CFG_SWTD | AR_CFG_SWRD);

usr/src/uts/common/io/arn/arn_hw.c

2620

ath9k_hw_keyreset(struct ath_hal *ah, uint16_t entry)

usr/src/uts/common/io/arn/arn_hw.c

2624

if (entry >= ah->ah_caps.keycache_size) {

usr/src/uts/common/io/arn/arn_hw.c

2631

keyType = REG_READ(ah, AR_KEYTABLE_TYPE(entry));

usr/src/uts/common/io/arn/arn_hw.c

2633

REG_WRITE(ah, AR_KEYTABLE_KEY0(entry), 0);

usr/src/uts/common/io/arn/arn_hw.c

2634

REG_WRITE(ah, AR_KEYTABLE_KEY1(entry), 0);

usr/src/uts/common/io/arn/arn_hw.c

2635

REG_WRITE(ah, AR_KEYTABLE_KEY2(entry), 0);

usr/src/uts/common/io/arn/arn_hw.c

2636

REG_WRITE(ah, AR_KEYTABLE_KEY3(entry), 0);

usr/src/uts/common/io/arn/arn_hw.c

2637

REG_WRITE(ah, AR_KEYTABLE_KEY4(entry), 0);

usr/src/uts/common/io/arn/arn_hw.c

2638

REG_WRITE(ah, AR_KEYTABLE_TYPE(entry), AR_KEYTABLE_TYPE_CLR);

usr/src/uts/common/io/arn/arn_hw.c

2639

REG_WRITE(ah, AR_KEYTABLE_MAC0(entry), 0);

usr/src/uts/common/io/arn/arn_hw.c

264

ath9k_hw_get_channel_centers(struct ath_hal *ah,

usr/src/uts/common/io/arn/arn_hw.c

2640

REG_WRITE(ah, AR_KEYTABLE_MAC1(entry), 0);

usr/src/uts/common/io/arn/arn_hw.c

2643

ATH9K_IS_MIC_ENABLED(ah)) {

usr/src/uts/common/io/arn/arn_hw.c

2646

REG_WRITE(ah, AR_KEYTABLE_KEY0(micentry), 0);

usr/src/uts/common/io/arn/arn_hw.c

2647

REG_WRITE(ah, AR_KEYTABLE_KEY1(micentry), 0);

usr/src/uts/common/io/arn/arn_hw.c

2648

REG_WRITE(ah, AR_KEYTABLE_KEY2(micentry), 0);

usr/src/uts/common/io/arn/arn_hw.c

2649

REG_WRITE(ah, AR_KEYTABLE_KEY3(micentry), 0);

usr/src/uts/common/io/arn/arn_hw.c

2653

if (ah->ah_curchan == NULL)

usr/src/uts/common/io/arn/arn_hw.c

2660

ath9k_hw_keysetmac(struct ath_hal *ah, uint16_t entry, const uint8_t *mac)

usr/src/uts/common/io/arn/arn_hw.c

2664

if (entry >= ah->ah_caps.keycache_size) {

usr/src/uts/common/io/arn/arn_hw.c

2682

REG_WRITE(ah, AR_KEYTABLE_MAC0(entry), macLo);

usr/src/uts/common/io/arn/arn_hw.c

2683

REG_WRITE(ah, AR_KEYTABLE_MAC1(entry), macHi | AR_KEYTABLE_VALID);

usr/src/uts/common/io/arn/arn_hw.c

2689

ath9k_hw_set_keycache_entry(struct ath_hal *ah, uint16_t entry,

usr/src/uts/common/io/arn/arn_hw.c

269

struct ath_hal_5416 *ahp = AH5416(ah);

usr/src/uts/common/io/arn/arn_hw.c

2692

const struct ath9k_hw_capabilities *pCap = &ah->ah_caps;

usr/src/uts/common/io/arn/arn_hw.c

2698

struct ath_hal_5416 *ahp = AH5416(ah);

usr/src/uts/common/io/arn/arn_hw.c

2715

ah->ah_macRev));

usr/src/uts/common/io/arn/arn_hw.c

2722

if (ATH9K_IS_MIC_ENABLED(ah) &&

usr/src/uts/common/io/arn/arn_hw.c

2763

if (keyType == AR_KEYTABLE_TYPE_TKIP && ATH9K_IS_MIC_ENABLED(ah)) {

usr/src/uts/common/io/arn/arn_hw.c

2766

REG_WRITE(ah, AR_KEYTABLE_KEY0(entry), ~key0);

usr/src/uts/common/io/arn/arn_hw.c

2767

REG_WRITE(ah, AR_KEYTABLE_KEY1(entry), ~key1);

usr/src/uts/common/io/arn/arn_hw.c

2768

REG_WRITE(ah, AR_KEYTABLE_KEY2(entry), key2);

usr/src/uts/common/io/arn/arn_hw.c

2769

REG_WRITE(ah, AR_KEYTABLE_KEY3(entry), key3);

usr/src/uts/common/io/arn/arn_hw.c

2770

REG_WRITE(ah, AR_KEYTABLE_KEY4(entry), key4);

usr/src/uts/common/io/arn/arn_hw.c

2771

REG_WRITE(ah, AR_KEYTABLE_TYPE(entry), keyType);

usr/src/uts/common/io/arn/arn_hw.c

2772

(void) ath9k_hw_keysetmac(ah, entry, mac);

usr/src/uts/common/io/arn/arn_hw.c

2781

REG_WRITE(ah, AR_KEYTABLE_KEY0(micentry), mic0);

usr/src/uts/common/io/arn/arn_hw.c

2782

REG_WRITE(ah, AR_KEYTABLE_KEY1(micentry), mic1);

usr/src/uts/common/io/arn/arn_hw.c

2783

REG_WRITE(ah, AR_KEYTABLE_KEY2(micentry), mic2);

usr/src/uts/common/io/arn/arn_hw.c

2784

REG_WRITE(ah, AR_KEYTABLE_KEY3(micentry), mic3);

usr/src/uts/common/io/arn/arn_hw.c

2785

REG_WRITE(ah, AR_KEYTABLE_KEY4(micentry), mic4);

usr/src/uts/common/io/arn/arn_hw.c

2786

REG_WRITE(ah, AR_KEYTABLE_TYPE(micentry),

usr/src/uts/common/io/arn/arn_hw.c

2793

REG_WRITE(ah, AR_KEYTABLE_KEY0(micentry), mic0);

usr/src/uts/common/io/arn/arn_hw.c

2794

REG_WRITE(ah, AR_KEYTABLE_KEY1(micentry), 0);

usr/src/uts/common/io/arn/arn_hw.c

2795

REG_WRITE(ah, AR_KEYTABLE_KEY2(micentry), mic2);

usr/src/uts/common/io/arn/arn_hw.c

2796

REG_WRITE(ah, AR_KEYTABLE_KEY3(micentry), 0);

usr/src/uts/common/io/arn/arn_hw.c

2797

REG_WRITE(ah, AR_KEYTABLE_KEY4(micentry), 0);

usr/src/uts/common/io/arn/arn_hw.c

2798

REG_WRITE(ah, AR_KEYTABLE_TYPE(micentry),

usr/src/uts/common/io/arn/arn_hw.c

2801

REG_WRITE(ah, AR_KEYTABLE_MAC0(micentry), 0);

usr/src/uts/common/io/arn/arn_hw.c

2802

REG_WRITE(ah, AR_KEYTABLE_MAC1(micentry), 0);

usr/src/uts/common/io/arn/arn_hw.c

2803

REG_WRITE(ah, AR_KEYTABLE_KEY0(entry), key0);

usr/src/uts/common/io/arn/arn_hw.c

2804

REG_WRITE(ah, AR_KEYTABLE_KEY1(entry), key1);

usr/src/uts/common/io/arn/arn_hw.c

2806

REG_WRITE(ah, AR_KEYTABLE_KEY0(entry), key0);

usr/src/uts/common/io/arn/arn_hw.c

2807

REG_WRITE(ah, AR_KEYTABLE_KEY1(entry), key1);

usr/src/uts/common/io/arn/arn_hw.c

2808

REG_WRITE(ah, AR_KEYTABLE_KEY2(entry), key2);

usr/src/uts/common/io/arn/arn_hw.c

2809

REG_WRITE(ah, AR_KEYTABLE_KEY3(entry), key3);

usr/src/uts/common/io/arn/arn_hw.c

2810

REG_WRITE(ah, AR_KEYTABLE_KEY4(entry), key4);

usr/src/uts/common/io/arn/arn_hw.c

2811

REG_WRITE(ah, AR_KEYTABLE_TYPE(entry), keyType);

usr/src/uts/common/io/arn/arn_hw.c

2813

(void) ath9k_hw_keysetmac(ah, entry, mac);

usr/src/uts/common/io/arn/arn_hw.c

2816

if (ah->ah_curchan == NULL)

usr/src/uts/common/io/arn/arn_hw.c

2823

ath9k_hw_keyisvalid(struct ath_hal *ah, uint16_t entry)

usr/src/uts/common/io/arn/arn_hw.c

2825

if (entry < ah->ah_caps.keycache_size) {

usr/src/uts/common/io/arn/arn_hw.c

2826

uint32_t val = REG_READ(ah, AR_KEYTABLE_MAC1(entry));

usr/src/uts/common/io/arn/arn_hw.c

2836

ath9k_set_power_sleep(struct ath_hal *ah, int setChip)

usr/src/uts/common/io/arn/arn_hw.c

2838

REG_SET_BIT(ah, AR_STA_ID1, AR_STA_ID1_PWR_SAV);

usr/src/uts/common/io/arn/arn_hw.c

2840

REG_CLR_BIT(ah, AR_RTC_FORCE_WAKE,

usr/src/uts/common/io/arn/arn_hw.c

2842

if (!AR_SREV_9100(ah))

usr/src/uts/common/io/arn/arn_hw.c

2843

REG_WRITE(ah, AR_RC, AR_RC_AHB | AR_RC_HOSTIF);

usr/src/uts/common/io/arn/arn_hw.c

2845

REG_CLR_BIT(ah, (uint16_t)(AR_RTC_RESET),

usr/src/uts/common/io/arn/arn_hw.c

2851

ath9k_set_power_network_sleep(struct ath_hal *ah, int setChip)

usr/src/uts/common/io/arn/arn_hw.c

2853

REG_SET_BIT(ah, AR_STA_ID1, AR_STA_ID1_PWR_SAV);

usr/src/uts/common/io/arn/arn_hw.c

2855

struct ath9k_hw_capabilities *pCap = &ah->ah_caps;

usr/src/uts/common/io/arn/arn_hw.c

2858

REG_WRITE(ah, AR_RTC_FORCE_WAKE,

usr/src/uts/common/io/arn/arn_hw.c

2861

REG_CLR_BIT(ah, AR_RTC_FORCE_WAKE,

usr/src/uts/common/io/arn/arn_hw.c

2868

ath9k_hw_set_power_awake(struct ath_hal *ah, int setChip)

usr/src/uts/common/io/arn/arn_hw.c

2874

if ((REG_READ(ah, AR_RTC_STATUS) &

usr/src/uts/common/io/arn/arn_hw.c

2876

if (ath9k_hw_set_reset_reg(ah,

usr/src/uts/common/io/arn/arn_hw.c

2881

if (AR_SREV_9100(ah))

usr/src/uts/common/io/arn/arn_hw.c

2882

REG_SET_BIT(ah, AR_RTC_RESET,

usr/src/uts/common/io/arn/arn_hw.c

2885

REG_SET_BIT(ah, AR_RTC_FORCE_WAKE,

usr/src/uts/common/io/arn/arn_hw.c

2890

val = REG_READ(ah, AR_RTC_STATUS) & AR_RTC_STATUS_M;

usr/src/uts/common/io/arn/arn_hw.c

2894

REG_SET_BIT(ah, AR_RTC_FORCE_WAKE,

usr/src/uts/common/io/arn/arn_hw.c

2907

REG_CLR_BIT(ah, AR_STA_ID1, AR_STA_ID1_PWR_SAV);

usr/src/uts/common/io/arn/arn_hw.c

2913

ath9k_hw_setpower(struct ath_hal *ah, enum ath9k_power_mode mode)

usr/src/uts/common/io/arn/arn_hw.c

2915

struct ath_hal_5416 *ahp = AH5416(ah);

usr/src/uts/common/io/arn/arn_hw.c

2931

status = ath9k_hw_set_power_awake(ah, setChip);

usr/src/uts/common/io/arn/arn_hw.c

2934

ath9k_set_power_sleep(ah, setChip);

usr/src/uts/common/io/arn/arn_hw.c

2938

ath9k_set_power_network_sleep(ah, setChip);

usr/src/uts/common/io/arn/arn_hw.c

2951

ath9k_hw_configpcipowersave(struct ath_hal *ah, int restore)

usr/src/uts/common/io/arn/arn_hw.c

2953

struct ath_hal_5416 *ahp = AH5416(ah);

usr/src/uts/common/io/arn/arn_hw.c

2956

if (ah->ah_isPciExpress != B_TRUE)

usr/src/uts/common/io/arn/arn_hw.c

2959

if (ah->ah_config.pcie_powersave_enable == 2)

usr/src/uts/common/io/arn/arn_hw.c

2965

if (AR_SREV_9280_20_OR_LATER(ah)) {

usr/src/uts/common/io/arn/arn_hw.c

2967

REG_WRITE(ah, INI_RA(&ahp->ah_iniPcieSerdes, i, 0),

usr/src/uts/common/io/arn/arn_hw.c

2971

} else if (AR_SREV_9280(ah) &&

usr/src/uts/common/io/arn/arn_hw.c

2972

(ah->ah_macRev == AR_SREV_REVISION_9280_10)) {

usr/src/uts/common/io/arn/arn_hw.c

2973

REG_WRITE(ah, AR_PCIE_SERDES, 0x9248fd00);

usr/src/uts/common/io/arn/arn_hw.c

2974

REG_WRITE(ah, AR_PCIE_SERDES, 0x24924924);

usr/src/uts/common/io/arn/arn_hw.c

2976

REG_WRITE(ah, AR_PCIE_SERDES, 0xa8000019);

usr/src/uts/common/io/arn/arn_hw.c

2977

REG_WRITE(ah, AR_PCIE_SERDES, 0x13160820);

usr/src/uts/common/io/arn/arn_hw.c

2978

REG_WRITE(ah, AR_PCIE_SERDES, 0xe5980560);

usr/src/uts/common/io/arn/arn_hw.c

2980

if (ah->ah_config.pcie_clock_req)

usr/src/uts/common/io/arn/arn_hw.c

2981

REG_WRITE(ah, AR_PCIE_SERDES, 0x401deffc);

usr/src/uts/common/io/arn/arn_hw.c

2983

REG_WRITE(ah, AR_PCIE_SERDES, 0x401deffd);

usr/src/uts/common/io/arn/arn_hw.c

2985

REG_WRITE(ah, AR_PCIE_SERDES, 0x1aaabe40);

usr/src/uts/common/io/arn/arn_hw.c

2986

REG_WRITE(ah, AR_PCIE_SERDES, 0xbe105554);

usr/src/uts/common/io/arn/arn_hw.c

2987

REG_WRITE(ah, AR_PCIE_SERDES, 0x00043007);

usr/src/uts/common/io/arn/arn_hw.c

2989

REG_WRITE(ah, AR_PCIE_SERDES2, 0x00000000);

usr/src/uts/common/io/arn/arn_hw.c

2993

REG_WRITE(ah, AR_PCIE_SERDES, 0x9248fc00);

usr/src/uts/common/io/arn/arn_hw.c

2994

REG_WRITE(ah, AR_PCIE_SERDES, 0x24924924);

usr/src/uts/common/io/arn/arn_hw.c

2995

REG_WRITE(ah, AR_PCIE_SERDES, 0x28000039);

usr/src/uts/common/io/arn/arn_hw.c

2996

REG_WRITE(ah, AR_PCIE_SERDES, 0x53160824);

usr/src/uts/common/io/arn/arn_hw.c

2997

REG_WRITE(ah, AR_PCIE_SERDES, 0xe5980579);

usr/src/uts/common/io/arn/arn_hw.c

2998

REG_WRITE(ah, AR_PCIE_SERDES, 0x001defff);

usr/src/uts/common/io/arn/arn_hw.c

2999

REG_WRITE(ah, AR_PCIE_SERDES, 0x1aaabe40);

usr/src/uts/common/io/arn/arn_hw.c

300

ath9k_hw_read_revisions(struct ath_hal *ah)

usr/src/uts/common/io/arn/arn_hw.c

3000

REG_WRITE(ah, AR_PCIE_SERDES, 0xbe105554);

usr/src/uts/common/io/arn/arn_hw.c

3001

REG_WRITE(ah, AR_PCIE_SERDES, 0x000e3007);

usr/src/uts/common/io/arn/arn_hw.c

3002

REG_WRITE(ah, AR_PCIE_SERDES2, 0x00000000);

usr/src/uts/common/io/arn/arn_hw.c

3005

REG_SET_BIT(ah, AR_PCIE_PM_CTRL, AR_PCIE_PM_CTRL_ENA);

usr/src/uts/common/io/arn/arn_hw.c

3007

if (ah->ah_config.pcie_waen) {

usr/src/uts/common/io/arn/arn_hw.c

3008

REG_WRITE(ah, AR_WA, ah->ah_config.pcie_waen);

usr/src/uts/common/io/arn/arn_hw.c

3010

if (AR_SREV_9285(ah))

usr/src/uts/common/io/arn/arn_hw.c

3011

REG_WRITE(ah, AR_WA, AR9285_WA_DEFAULT);

usr/src/uts/common/io/arn/arn_hw.c

3012

else if (AR_SREV_9280(ah))

usr/src/uts/common/io/arn/arn_hw.c

3013

REG_WRITE(ah, AR_WA, AR9280_WA_DEFAULT);

usr/src/uts/common/io/arn/arn_hw.c

3015

REG_WRITE(ah, AR_WA, AR_WA_DEFAULT);

usr/src/uts/common/io/arn/arn_hw.c

3022

ath9k_hw_intrpend(struct ath_hal *ah)

usr/src/uts/common/io/arn/arn_hw.c

3026

if (AR_SREV_9100(ah))

usr/src/uts/common/io/arn/arn_hw.c

3029

host_isr = REG_READ(ah, AR_INTR_ASYNC_CAUSE);

usr/src/uts/common/io/arn/arn_hw.c

3033

host_isr = REG_READ(ah, AR_INTR_SYNC_CAUSE);

usr/src/uts/common/io/arn/arn_hw.c

304

val = REG_READ(ah, AR_SREV) & AR_SREV_ID;

usr/src/uts/common/io/arn/arn_hw.c

3043

ath9k_hw_getisr(struct ath_hal *ah, enum ath9k_int *masked)

usr/src/uts/common/io/arn/arn_hw.c

3047

struct ath9k_hw_capabilities *pCap = &ah->ah_caps;

usr/src/uts/common/io/arn/arn_hw.c

3050

struct ath_hal_5416 *ahp = AH5416(ah);

usr/src/uts/common/io/arn/arn_hw.c

3052

if (!AR_SREV_9100(ah)) {

usr/src/uts/common/io/arn/arn_hw.c

3053

if (REG_READ(ah, AR_INTR_ASYNC_CAUSE) & AR_INTR_MAC_IRQ) {

usr/src/uts/common/io/arn/arn_hw.c

3054

if ((REG_READ(ah, AR_RTC_STATUS) & AR_RTC_STATUS_M)

usr/src/uts/common/io/arn/arn_hw.c

3056

isr = REG_READ(ah, AR_ISR);

usr/src/uts/common/io/arn/arn_hw.c

3060

sync_cause = REG_READ(ah, AR_INTR_SYNC_CAUSE) &

usr/src/uts/common/io/arn/arn_hw.c

3069

isr = REG_READ(ah, AR_ISR);

usr/src/uts/common/io/arn/arn_hw.c

307

val = REG_READ(ah, AR_SREV);

usr/src/uts/common/io/arn/arn_hw.c

3075

isr2 = REG_READ(ah, AR_ISR_S2);

usr/src/uts/common/io/arn/arn_hw.c

308

ah->ah_macVersion = (val & AR_SREV_VERSION2) >> AR_SREV_TYPE2_S;

usr/src/uts/common/io/arn/arn_hw.c

309

ah->ah_macRev = MS(val, AR_SREV_REVISION2);

usr/src/uts/common/io/arn/arn_hw.c

3090

isr = REG_READ(ah, AR_ISR_RAC);

usr/src/uts/common/io/arn/arn_hw.c

310

ah->ah_isPciExpress = (val & AR_SREV_TYPE2_HOST_MODE) ? 0 : 1;

usr/src/uts/common/io/arn/arn_hw.c

3112

s0_s = REG_READ(ah, AR_ISR_S0_S);

usr/src/uts/common/io/arn/arn_hw.c

3116

s1_s = REG_READ(ah, AR_ISR_S1_S);

usr/src/uts/common/io/arn/arn_hw.c

312

if (!AR_SREV_9100(ah))

usr/src/uts/common/io/arn/arn_hw.c

3126

if (!AR_SREV_9100(ah)) {

usr/src/uts/common/io/arn/arn_hw.c

3128

uint32_t isr5 = REG_READ(ah, AR_ISR_S5_S);

usr/src/uts/common/io/arn/arn_hw.c

313

ah->ah_macVersion = MS(val, AR_SREV_VERSION);

usr/src/uts/common/io/arn/arn_hw.c

3137

if (AR_SREV_9100(ah))

usr/src/uts/common/io/arn/arn_hw.c

315

ah->ah_macRev = val & AR_SREV_REVISION;

usr/src/uts/common/io/arn/arn_hw.c

3162

REG_WRITE(ah, AR_RC, AR_RC_HOSTIF);

usr/src/uts/common/io/arn/arn_hw.c

3163

REG_WRITE(ah, AR_RC, 0);

usr/src/uts/common/io/arn/arn_hw.c

317

if (ah->ah_macVersion == AR_SREV_VERSION_5416_PCIE)

usr/src/uts/common/io/arn/arn_hw.c

3172

REG_WRITE(ah, AR_INTR_SYNC_CAUSE_CLR, sync_cause);

usr/src/uts/common/io/arn/arn_hw.c

3173

(void) REG_READ(ah, AR_INTR_SYNC_CAUSE_CLR);

usr/src/uts/common/io/arn/arn_hw.c

318

ah->ah_isPciExpress = B_TRUE;

usr/src/uts/common/io/arn/arn_hw.c

3180

ath9k_hw_intrget(struct ath_hal *ah)

usr/src/uts/common/io/arn/arn_hw.c

3182

return (AH5416(ah)->ah_maskReg);

usr/src/uts/common/io/arn/arn_hw.c

3186

ath9k_hw_set_interrupts(struct ath_hal *ah, enum ath9k_int ints)

usr/src/uts/common/io/arn/arn_hw.c

3188

struct ath_hal_5416 *ahp = AH5416(ah);

usr/src/uts/common/io/arn/arn_hw.c

3191

struct ath9k_hw_capabilities *pCap = &ah->ah_caps;

usr/src/uts/common/io/arn/arn_hw.c

3202

REG_WRITE(ah, AR_IER, AR_IER_DISABLE);

usr/src/uts/common/io/arn/arn_hw.c

3203

(void) REG_READ(ah, AR_IER);

usr/src/uts/common/io/arn/arn_hw.c

3204

if (!AR_SREV_9100(ah)) {

usr/src/uts/common/io/arn/arn_hw.c

3205

REG_WRITE(ah, AR_INTR_ASYNC_ENABLE, 0);

usr/src/uts/common/io/arn/arn_hw.c

3206

(void) REG_READ(ah, AR_INTR_ASYNC_ENABLE);

usr/src/uts/common/io/arn/arn_hw.c

3208

REG_WRITE(ah, AR_INTR_SYNC_ENABLE, 0);

usr/src/uts/common/io/arn/arn_hw.c

3209

(void) REG_READ(ah, AR_INTR_SYNC_ENABLE);

usr/src/uts/common/io/arn/arn_hw.c

323

ath9k_hw_get_radiorev(struct ath_hal *ah)

usr/src/uts/common/io/arn/arn_hw.c

3256

REG_WRITE(ah, AR_IMR, mask);

usr/src/uts/common/io/arn/arn_hw.c

3257

mask = REG_READ(ah, AR_IMR_S2) &

usr/src/uts/common/io/arn/arn_hw.c

3266

REG_WRITE(ah, AR_IMR_S2, mask | mask2);

usr/src/uts/common/io/arn/arn_hw.c

3271

REG_SET_BIT(ah, AR_IMR_S5, AR_IMR_S5_TIM_TIMER);

usr/src/uts/common/io/arn/arn_hw.c

3273

REG_CLR_BIT(ah, AR_IMR_S5, AR_IMR_S5_TIM_TIMER);

usr/src/uts/common/io/arn/arn_hw.c

3277

REG_WRITE(ah, AR_IER, AR_IER_ENABLE);

usr/src/uts/common/io/arn/arn_hw.c

3278

if (!AR_SREV_9100(ah)) {

usr/src/uts/common/io/arn/arn_hw.c

3279

REG_WRITE(ah, AR_INTR_ASYNC_ENABLE,

usr/src/uts/common/io/arn/arn_hw.c

328

REG_WRITE(ah, AR_PHY(0x36), 0x00007058);

usr/src/uts/common/io/arn/arn_hw.c

3281

REG_WRITE(ah, AR_INTR_ASYNC_MASK, AR_INTR_MAC_IRQ);

usr/src/uts/common/io/arn/arn_hw.c

3284

REG_WRITE(ah, AR_INTR_SYNC_ENABLE,

usr/src/uts/common/io/arn/arn_hw.c

3286

REG_WRITE(ah, AR_INTR_SYNC_MASK,

usr/src/uts/common/io/arn/arn_hw.c

3298

ath9k_hw_beaconinit(struct ath_hal *ah, uint32_t next_beacon,

usr/src/uts/common/io/arn/arn_hw.c

3301

struct ath_hal_5416 *ahp = AH5416(ah);

usr/src/uts/common/io/arn/arn_hw.c

3306

switch (ah->ah_opmode) {

usr/src/uts/common/io/arn/arn_hw.c

3309

REG_WRITE(ah, AR_NEXT_TBTT_TIMER, TU_TO_USEC(next_beacon));

usr/src/uts/common/io/arn/arn_hw.c

331

REG_WRITE(ah, AR_PHY(0x20), 0x00010000);

usr/src/uts/common/io/arn/arn_hw.c

3310

REG_WRITE(ah, AR_NEXT_DMA_BEACON_ALERT, 0xffff);

usr/src/uts/common/io/arn/arn_hw.c

3311

REG_WRITE(ah, AR_NEXT_SWBA, 0x7ffff);

usr/src/uts/common/io/arn/arn_hw.c

3315

REG_SET_BIT(ah, AR_TXCFG,

usr/src/uts/common/io/arn/arn_hw.c

3317

REG_WRITE(ah, AR_NEXT_NDP_TIMER,

usr/src/uts/common/io/arn/arn_hw.c

332

val = (REG_READ(ah, AR_PHY(256)) >> 24) & 0xff;

usr/src/uts/common/io/arn/arn_hw.c

3324

REG_WRITE(ah, AR_NEXT_TBTT_TIMER, TU_TO_USEC(next_beacon));

usr/src/uts/common/io/arn/arn_hw.c

3325

REG_WRITE(ah, AR_NEXT_DMA_BEACON_ALERT,

usr/src/uts/common/io/arn/arn_hw.c

3327

ah->ah_config.

usr/src/uts/common/io/arn/arn_hw.c

3329

REG_WRITE(ah, AR_NEXT_SWBA,

usr/src/uts/common/io/arn/arn_hw.c

3331

ah->ah_config.

usr/src/uts/common/io/arn/arn_hw.c

3339

__func__, ah->ah_opmode));

usr/src/uts/common/io/arn/arn_hw.c

3343

REG_WRITE(ah, AR_BEACON_PERIOD, TU_TO_USEC(beacon_period));

usr/src/uts/common/io/arn/arn_hw.c

3344

REG_WRITE(ah, AR_DMA_BEACON_PERIOD, TU_TO_USEC(beacon_period));

usr/src/uts/common/io/arn/arn_hw.c

3345

REG_WRITE(ah, AR_SWBA_PERIOD, TU_TO_USEC(beacon_period));

usr/src/uts/common/io/arn/arn_hw.c

3346

REG_WRITE(ah, AR_NDP_PERIOD, TU_TO_USEC(beacon_period));

usr/src/uts/common/io/arn/arn_hw.c

3351

ath9k_hw_reset_tsf(ah);

usr/src/uts/common/io/arn/arn_hw.c

3354

REG_SET_BIT(ah, AR_TIMER_MODE, flags);

usr/src/uts/common/io/arn/arn_hw.c

3358

ath9k_hw_set_sta_beacon_timers(struct ath_hal *ah,

usr/src/uts/common/io/arn/arn_hw.c

3362

struct ath9k_hw_capabilities *pCap = &ah->ah_caps;

usr/src/uts/common/io/arn/arn_hw.c

3364

REG_WRITE(ah, AR_NEXT_TBTT_TIMER, TU_TO_USEC(bs->bs_nexttbtt));

usr/src/uts/common/io/arn/arn_hw.c

3366

REG_WRITE(ah, AR_BEACON_PERIOD,

usr/src/uts/common/io/arn/arn_hw.c

3368

REG_WRITE(ah, AR_DMA_BEACON_PERIOD,

usr/src/uts/common/io/arn/arn_hw.c

3371

REG_RMW_FIELD(ah, AR_RSSI_THR,

usr/src/uts/common/io/arn/arn_hw.c

3397

REG_WRITE(ah, AR_NEXT_DTIM,

usr/src/uts/common/io/arn/arn_hw.c

3399

REG_WRITE(ah, AR_NEXT_TIM, TU_TO_USEC(nextTbtt - SLEEP_SLOP));

usr/src/uts/common/io/arn/arn_hw.c

3401

REG_WRITE(ah, AR_SLEEP1,

usr/src/uts/common/io/arn/arn_hw.c

341

ath9k_hw_disablepcie(struct ath_hal *ah)

usr/src/uts/common/io/arn/arn_hw.c

3410

REG_WRITE(ah, AR_SLEEP2,

usr/src/uts/common/io/arn/arn_hw.c

3413

REG_WRITE(ah, AR_TIM_PERIOD, TU_TO_USEC(beaconintval));

usr/src/uts/common/io/arn/arn_hw.c

3414

REG_WRITE(ah, AR_DTIM_PERIOD, TU_TO_USEC(dtimperiod));

usr/src/uts/common/io/arn/arn_hw.c

3416

REG_SET_BIT(ah, AR_TIMER_MODE,

usr/src/uts/common/io/arn/arn_hw.c

3422

REG_WRITE(ah, AR_TSFOOR_THRESHOLD, bs->bs_tsfoor_threshold);

usr/src/uts/common/io/arn/arn_hw.c

3428

ath9k_hw_fill_cap_info(struct ath_hal *ah)

usr/src/uts/common/io/arn/arn_hw.c

343

if (!AR_SREV_9100(ah))

usr/src/uts/common/io/arn/arn_hw.c

3430

struct ath_hal_5416 *ahp = AH5416(ah);

usr/src/uts/common/io/arn/arn_hw.c

3431

struct ath9k_hw_capabilities *pCap = &ah->ah_caps;

usr/src/uts/common/io/arn/arn_hw.c

3434

eeval = ath9k_hw_get_eeprom(ah, EEP_REG_0);

usr/src/uts/common/io/arn/arn_hw.c

3436

ah->ah_currentRD = eeval;

usr/src/uts/common/io/arn/arn_hw.c

3438

eeval = ath9k_hw_get_eeprom(ah, EEP_REG_1);

usr/src/uts/common/io/arn/arn_hw.c

3439

ah->ah_currentRDExt = eeval;

usr/src/uts/common/io/arn/arn_hw.c

3441

capField = ath9k_hw_get_eeprom(ah, EEP_OP_CAP);

usr/src/uts/common/io/arn/arn_hw.c

3443

if (ah->ah_opmode != ATH9K_M_HOSTAP &&

usr/src/uts/common/io/arn/arn_hw.c

3444

ah->ah_subvendorid == AR_SUBVENDOR_ID_NEW_A) {

usr/src/uts/common/io/arn/arn_hw.c

3445

if (ah->ah_currentRD == 0x64 ||

usr/src/uts/common/io/arn/arn_hw.c

3446

ah->ah_currentRD == 0x65)

usr/src/uts/common/io/arn/arn_hw.c

3447

ah->ah_currentRD += 5;

usr/src/uts/common/io/arn/arn_hw.c

3448

else if (ah->ah_currentRD == 0x41)

usr/src/uts/common/io/arn/arn_hw.c

3449

ah->ah_currentRD = 0x43;

usr/src/uts/common/io/arn/arn_hw.c

3453

ah->ah_currentRD));

usr/src/uts/common/io/arn/arn_hw.c

3456

eeval = ath9k_hw_get_eeprom(ah, EEP_OP_MODE);

usr/src/uts/common/io/arn/arn_hw.c

346

REG_WRITE(ah, AR_PCIE_SERDES, 0x9248fc00);

usr/src/uts/common/io/arn/arn_hw.c

3462

if (ah->ah_config.ht_enable) {

usr/src/uts/common/io/arn/arn_hw.c

347

REG_WRITE(ah, AR_PCIE_SERDES, 0x24924924);

usr/src/uts/common/io/arn/arn_hw.c

3478

if (ah->ah_config.ht_enable) {

usr/src/uts/common/io/arn/arn_hw.c

348

REG_WRITE(ah, AR_PCIE_SERDES, 0x28000029);

usr/src/uts/common/io/arn/arn_hw.c

349

REG_WRITE(ah, AR_PCIE_SERDES, 0x57160824);

usr/src/uts/common/io/arn/arn_hw.c

3491

pCap->tx_chainmask = ath9k_hw_get_eeprom(ah, EEP_TX_MASK);

usr/src/uts/common/io/arn/arn_hw.c

3492

if ((ah->ah_isPciExpress) ||

usr/src/uts/common/io/arn/arn_hw.c

3495

ath9k_hw_get_eeprom(ah, EEP_RX_MASK);

usr/src/uts/common/io/arn/arn_hw.c

3498

(ath9k_hw_gpio_get(ah, 0)) ? 0x5 : 0x7;

usr/src/uts/common/io/arn/arn_hw.c

350

REG_WRITE(ah, AR_PCIE_SERDES, 0x25980579);

usr/src/uts/common/io/arn/arn_hw.c

3501

if (!(AR_SREV_9280(ah) && (ah->ah_macRev == 0)))

usr/src/uts/common/io/arn/arn_hw.c

351

REG_WRITE(ah, AR_PCIE_SERDES, 0x00000000);

usr/src/uts/common/io/arn/arn_hw.c

352

REG_WRITE(ah, AR_PCIE_SERDES, 0x1aaabe40);

usr/src/uts/common/io/arn/arn_hw.c

3520

if (ah->ah_config.ht_enable)

usr/src/uts/common/io/arn/arn_hw.c

353

REG_WRITE(ah, AR_PCIE_SERDES, 0xbe105554);

usr/src/uts/common/io/arn/arn_hw.c

354

REG_WRITE(ah, AR_PCIE_SERDES, 0x000e1007);

usr/src/uts/common/io/arn/arn_hw.c

3546

if (AR_SREV_9280_10_OR_LATER(ah))

usr/src/uts/common/io/arn/arn_hw.c

3551

if (AR_SREV_9280_10_OR_LATER(ah)) {

usr/src/uts/common/io/arn/arn_hw.c

3559

if (AR_SREV_9160_10_OR_LATER(ah) || AR_SREV_9100(ah)) {

usr/src/uts/common/io/arn/arn_hw.c

356

REG_WRITE(ah, AR_PCIE_SERDES2, 0x00000000);

usr/src/uts/common/io/arn/arn_hw.c

3569

ah->ah_rfsilent = ath9k_hw_get_eeprom(ah, EEP_RF_SILENT);

usr/src/uts/common/io/arn/arn_hw.c

3570

if (ah->ah_rfsilent & EEP_RFSILENT_ENABLED) {

usr/src/uts/common/io/arn/arn_hw.c

3571

ah->ah_rfkill_gpio =

usr/src/uts/common/io/arn/arn_hw.c

3572

MS(ah->ah_rfsilent, EEP_RFSILENT_GPIO_SEL);

usr/src/uts/common/io/arn/arn_hw.c

3573

ah->ah_rfkill_polarity =

usr/src/uts/common/io/arn/arn_hw.c

3574

MS(ah->ah_rfsilent, EEP_RFSILENT_POLARITY);

usr/src/uts/common/io/arn/arn_hw.c

3580

if ((ah->ah_macVersion == AR_SREV_VERSION_5416_PCI) ||

usr/src/uts/common/io/arn/arn_hw.c

3581

(ah->ah_macVersion == AR_SREV_VERSION_5416_PCIE) ||

usr/src/uts/common/io/arn/arn_hw.c

3582

(ah->ah_macVersion == AR_SREV_VERSION_9160) ||

usr/src/uts/common/io/arn/arn_hw.c

3583

(ah->ah_macVersion == AR_SREV_VERSION_9100) ||

usr/src/uts/common/io/arn/arn_hw.c

3584

(ah->ah_macVersion == AR_SREV_VERSION_9280))

usr/src/uts/common/io/arn/arn_hw.c

3589

if (AR_SREV_9280(ah) || AR_SREV_9285(ah))

usr/src/uts/common/io/arn/arn_hw.c

3594

if (ah->ah_currentRDExt & (1 << REG_EXT_JAPAN_MIDBAND)) {

usr/src/uts/common/io/arn/arn_hw.c

360

ath9k_hw_chip_test(struct ath_hal *ah)

usr/src/uts/common/io/arn/arn_hw.c

3610

ath9k_hw_get_num_ant_config(ah, 0);

usr/src/uts/common/io/arn/arn_hw.c

3613

ath9k_hw_get_num_ant_config(ah, 1);

usr/src/uts/common/io/arn/arn_hw.c

3619

ath9k_hw_getcapability(struct ath_hal *ah,

usr/src/uts/common/io/arn/arn_hw.c

3623

struct ath_hal_5416 *ahp = AH5416(ah);

usr/src/uts/common/io/arn/arn_hw.c

3624

const struct ath9k_hw_capabilities *pCap = &ah->ah_caps;

usr/src/uts/common/io/arn/arn_hw.c

3657

return ((REG_READ(ah, AR_PHY_CCK_DETECT) &

usr/src/uts/common/io/arn/arn_hw.c

3667

if (REG_READ(ah, AR_STA_ID1) & AR_STA_ID1_ADHOC) {

usr/src/uts/common/io/arn/arn_hw.c

3694

*result = ah->ah_powerLimit;

usr/src/uts/common/io/arn/arn_hw.c

3697

*result = ah->ah_maxPowerLevel;

usr/src/uts/common/io/arn/arn_hw.c

3700

*result = ah->ah_tpScale;

usr/src/uts/common/io/arn/arn_hw.c

3711

ath9k_hw_setcapability(struct ath_hal *ah,

usr/src/uts/common/io/arn/arn_hw.c

3716

struct ath_hal_5416 *ahp = AH5416(ah);

usr/src/uts/common/io/arn/arn_hw.c

372

regHold[i] = REG_READ(ah, addr);

usr/src/uts/common/io/arn/arn_hw.c

3729

v = REG_READ(ah, AR_PHY_CCK_DETECT);

usr/src/uts/common/io/arn/arn_hw.c

3734

REG_WRITE(ah, AR_PHY_CCK_DETECT, v);

usr/src/uts/common/io/arn/arn_hw.c

375

REG_WRITE(ah, addr, wrData);

usr/src/uts/common/io/arn/arn_hw.c

3756

ath9k_hw_gpio_cfg_output_mux(struct ath_hal *ah,

usr/src/uts/common/io/arn/arn_hw.c

376

rdData = REG_READ(ah, addr);

usr/src/uts/common/io/arn/arn_hw.c

3771

if (AR_SREV_9280_20_OR_LATER(ah) ||

usr/src/uts/common/io/arn/arn_hw.c

3773

REG_RMW(ah, addr, (type << gpio_shift),

usr/src/uts/common/io/arn/arn_hw.c

3776

tmp = REG_READ(ah, addr);

usr/src/uts/common/io/arn/arn_hw.c

3780

REG_WRITE(ah, addr, tmp);

usr/src/uts/common/io/arn/arn_hw.c

3785

ath9k_hw_cfg_gpio_input(struct ath_hal *ah, uint32_t gpio)

usr/src/uts/common/io/arn/arn_hw.c

3789

ASSERT(gpio < ah->ah_caps.num_gpio_pins);

usr/src/uts/common/io/arn/arn_hw.c

3793

REG_RMW(ah,

usr/src/uts/common/io/arn/arn_hw.c

3800

ath9k_hw_gpio_get(struct ath_hal *ah, uint32_t gpio)

usr/src/uts/common/io/arn/arn_hw.c

3802

if (gpio >= ah->ah_caps.num_gpio_pins)

usr/src/uts/common/io/arn/arn_hw.c

3805

if (AR_SREV_9280_10_OR_LATER(ah)) {

usr/src/uts/common/io/arn/arn_hw.c

3806

return ((MS(REG_READ(ah, AR_GPIO_IN_OUT),

usr/src/uts/common/io/arn/arn_hw.c

3809

return ((MS(REG_READ(ah,

usr/src/uts/common/io/arn/arn_hw.c

3816

ath9k_hw_cfg_output(struct ath_hal *ah, uint32_t gpio,

usr/src/uts/common/io/arn/arn_hw.c

3821

ath9k_hw_gpio_cfg_output_mux(ah, gpio, ah_signal_type);

usr/src/uts/common/io/arn/arn_hw.c

3825

REG_RMW(ah,

usr/src/uts/common/io/arn/arn_hw.c

3832

ath9k_hw_set_gpio(struct ath_hal *ah, uint32_t gpio, uint32_t val)

usr/src/uts/common/io/arn/arn_hw.c

3834

REG_RMW(ah, AR_GPIO_IN_OUT, ((val & 1) << gpio),

usr/src/uts/common/io/arn/arn_hw.c

3840

ath9k_enable_rfkill(struct ath_hal *ah)

usr/src/uts/common/io/arn/arn_hw.c

3842

REG_SET_BIT(ah, AR_GPIO_INPUT_EN_VAL,

usr/src/uts/common/io/arn/arn_hw.c

3845

REG_CLR_BIT(ah, AR_GPIO_INPUT_MUX2,

usr/src/uts/common/io/arn/arn_hw.c

3848

ath9k_hw_cfg_gpio_input(ah, ah->ah_rfkill_gpio);

usr/src/uts/common/io/arn/arn_hw.c

3849

REG_SET_BIT(ah, AR_PHY_TEST, RFSILENT_BB);

usr/src/uts/common/io/arn/arn_hw.c

3854

ath9k_hw_select_antconfig(struct ath_hal *ah, uint32_t cfg)

usr/src/uts/common/io/arn/arn_hw.c

3856

struct ath9k_channel *chan = ah->ah_curchan;

usr/src/uts/common/io/arn/arn_hw.c

3857

const struct ath9k_hw_capabilities *pCap = &ah->ah_caps;

usr/src/uts/common/io/arn/arn_hw.c

3865

if (!ath9k_hw_get_eeprom_antenna_cfg(ah, chan,

usr/src/uts/common/io/arn/arn_hw.c

3867

REG_WRITE(ah, AR_PHY_SWITCH_COM, ant_config);

usr/src/uts/common/io/arn/arn_hw.c

3876

ath9k_hw_getdefantenna(struct ath_hal *ah)

usr/src/uts/common/io/arn/arn_hw.c

3878

return (REG_READ(ah, AR_DEF_ANTENNA) & 0x7);

usr/src/uts/common/io/arn/arn_hw.c

3882

ath9k_hw_setantenna(struct ath_hal *ah, uint32_t antenna)

usr/src/uts/common/io/arn/arn_hw.c

3884

REG_WRITE(ah, AR_DEF_ANTENNA, (antenna & 0x7));

usr/src/uts/common/io/arn/arn_hw.c

3889

ath9k_hw_setantennaswitch(struct ath_hal *ah,

usr/src/uts/common/io/arn/arn_hw.c

389

REG_WRITE(ah, addr, wrData);

usr/src/uts/common/io/arn/arn_hw.c

3896

struct ath_hal_5416 *ahp = AH5416(ah);

usr/src/uts/common/io/arn/arn_hw.c

3899

if (AR_SREV_9280(ah)) {

usr/src/uts/common/io/arn/arn_hw.c

390

rdData = REG_READ(ah, addr);

usr/src/uts/common/io/arn/arn_hw.c

3913

if (ah->ah_caps.tx_chainmask >

usr/src/uts/common/io/arn/arn_hw.c

3938

ath9k_hw_getrxfilter(struct ath_hal *ah)

usr/src/uts/common/io/arn/arn_hw.c

3940

uint32_t bits = REG_READ(ah, AR_RX_FILTER);

usr/src/uts/common/io/arn/arn_hw.c

3941

uint32_t phybits = REG_READ(ah, AR_PHY_ERR);

usr/src/uts/common/io/arn/arn_hw.c

3952

ath9k_hw_setrxfilter(struct ath_hal *ah, uint32_t bits)

usr/src/uts/common/io/arn/arn_hw.c

3956

REG_WRITE(ah, AR_RX_FILTER, (bits & 0xffff) | AR_RX_COMPR_BAR);

usr/src/uts/common/io/arn/arn_hw.c

3963

REG_WRITE(ah, AR_PHY_ERR, phybits);

usr/src/uts/common/io/arn/arn_hw.c

3966

REG_WRITE(ah, AR_RXCFG,

usr/src/uts/common/io/arn/arn_hw.c

3967

REG_READ(ah, AR_RXCFG) | AR_RXCFG_ZLFDMA);

usr/src/uts/common/io/arn/arn_hw.c

3969

REG_WRITE(ah, AR_RXCFG,

usr/src/uts/common/io/arn/arn_hw.c

3970

REG_READ(ah, AR_RXCFG) & ~AR_RXCFG_ZLFDMA);

usr/src/uts/common/io/arn/arn_hw.c

3974

ath9k_hw_phy_disable(struct ath_hal *ah)

usr/src/uts/common/io/arn/arn_hw.c

3976

return (ath9k_hw_set_reset_reg(ah, ATH9K_RESET_WARM));

usr/src/uts/common/io/arn/arn_hw.c

3980

ath9k_hw_disable(struct ath_hal *ah)

usr/src/uts/common/io/arn/arn_hw.c

3982

if (!ath9k_hw_setpower(ah, ATH9K_PM_AWAKE))

usr/src/uts/common/io/arn/arn_hw.c

3985

return (ath9k_hw_set_reset_reg(ah, ATH9K_RESET_COLD));

usr/src/uts/common/io/arn/arn_hw.c

3989

ath9k_hw_set_txpowerlimit(struct ath_hal *ah, uint32_t limit)

usr/src/uts/common/io/arn/arn_hw.c

3991

struct ath9k_channel *chan = ah->ah_curchan;

usr/src/uts/common/io/arn/arn_hw.c

3994

ah->ah_powerLimit = (uint16_t)min(limit, (uint32_t)MAX_RATE_POWER);

usr/src/uts/common/io/arn/arn_hw.c

3996

if (ath9k_hw_set_txpower(ah, chan,

usr/src/uts/common/io/arn/arn_hw.c

3997

ath9k_regd_get_ctl(ah, chan),

usr/src/uts/common/io/arn/arn_hw.c

3998

ath9k_regd_get_antenna_allowed(ah, chan),

usr/src/uts/common/io/arn/arn_hw.c

4001

(uint32_t)ah->ah_powerLimit)) != 0)

usr/src/uts/common/io/arn/arn_hw.c

4008

ath9k_hw_getmac(struct ath_hal *ah, uint8_t *mac)

usr/src/uts/common/io/arn/arn_hw.c

401

REG_WRITE(ah, regAddr[i], regHold[i]);

usr/src/uts/common/io/arn/arn_hw.c

4010

struct ath_hal_5416 *ahp = AH5416(ah);

usr/src/uts/common/io/arn/arn_hw.c

4016

ath9k_hw_setmac(struct ath_hal *ah, const uint8_t *mac)

usr/src/uts/common/io/arn/arn_hw.c

4018

struct ath_hal_5416 *ahp = AH5416(ah);

usr/src/uts/common/io/arn/arn_hw.c

4026

ath9k_hw_setopmode(struct ath_hal *ah)

usr/src/uts/common/io/arn/arn_hw.c

4028

ath9k_hw_set_operating_mode(ah, ah->ah_opmode);

usr/src/uts/common/io/arn/arn_hw.c

4032

ath9k_hw_setmcastfilter(struct ath_hal *ah, uint32_t filter0, uint32_t filter1)

usr/src/uts/common/io/arn/arn_hw.c

4034

REG_WRITE(ah, AR_MCAST_FIL0, filter0);

usr/src/uts/common/io/arn/arn_hw.c

4035

REG_WRITE(ah, AR_MCAST_FIL1, filter1);

usr/src/uts/common/io/arn/arn_hw.c

4039

ath9k_hw_getbssidmask(struct ath_hal *ah, uint8_t *mask)

usr/src/uts/common/io/arn/arn_hw.c

4041

struct ath_hal_5416 *ahp = AH5416(ah);

usr/src/uts/common/io/arn/arn_hw.c

4047

ath9k_hw_setbssidmask(struct ath_hal *ah, const uint8_t *mask)

usr/src/uts/common/io/arn/arn_hw.c

4049

struct ath_hal_5416 *ahp = AH5416(ah);

usr/src/uts/common/io/arn/arn_hw.c

4053

REG_WRITE(ah, AR_BSSMSKL, ARN_LE_READ_32(ahp->ah_bssidmask));

usr/src/uts/common/io/arn/arn_hw.c

4054

REG_WRITE(ah, AR_BSSMSKU, ARN_LE_READ_16(ahp->ah_bssidmask + 4));

usr/src/uts/common/io/arn/arn_hw.c

4060

ath9k_hw_write_associd(struct ath_hal *ah,

usr/src/uts/common/io/arn/arn_hw.c

4063

struct ath_hal_5416 *ahp = AH5416(ah);

usr/src/uts/common/io/arn/arn_hw.c

4068

REG_WRITE(ah, AR_BSS_ID0, ARN_LE_READ_32(ahp->ah_bssid));

usr/src/uts/common/io/arn/arn_hw.c

4069

REG_WRITE(ah, AR_BSS_ID1, ARN_LE_READ_16(ahp->ah_bssid + 4) |

usr/src/uts/common/io/arn/arn_hw.c

4074

ath9k_hw_gettsf64(struct ath_hal *ah)

usr/src/uts/common/io/arn/arn_hw.c

4078

tsf = REG_READ(ah, AR_TSF_U32);

usr/src/uts/common/io/arn/arn_hw.c

4079

tsf = (tsf << 32) | REG_READ(ah, AR_TSF_L32);

usr/src/uts/common/io/arn/arn_hw.c

4085

ath9k_hw_reset_tsf(struct ath_hal *ah)

usr/src/uts/common/io/arn/arn_hw.c

4090

while (REG_READ(ah, AR_SLP32_MODE) & AR_SLP32_TSF_WRITE_STATUS) {

usr/src/uts/common/io/arn/arn_hw.c

4101

REG_WRITE(ah, AR_RESET_TSF, AR_RESET_TSF_ONCE);

usr/src/uts/common/io/arn/arn_hw.c

4105

ath9k_hw_set_tsfadjust(struct ath_hal *ah, uint32_t setting)

usr/src/uts/common/io/arn/arn_hw.c

4107

struct ath_hal_5416 *ahp = AH5416(ah);

usr/src/uts/common/io/arn/arn_hw.c

4118

ath9k_hw_setslottime(struct ath_hal *ah, uint32_t us)

usr/src/uts/common/io/arn/arn_hw.c

4120

struct ath_hal_5416 *ahp = AH5416(ah);

usr/src/uts/common/io/arn/arn_hw.c

4122

if (us < ATH9K_SLOT_TIME_9 || us > ath9k_hw_mac_to_usec(ah, 0xffff)) {

usr/src/uts/common/io/arn/arn_hw.c

4129

REG_WRITE(ah, AR_D_GBL_IFS_SLOT, ath9k_hw_mac_to_clks(ah, us));

usr/src/uts/common/io/arn/arn_hw.c

4136

ath9k_hw_set11nmac2040(struct ath_hal *ah, enum ath9k_ht_macmode mode)

usr/src/uts/common/io/arn/arn_hw.c

4141

!ah->ah_config.cwm_ignore_extcca)

usr/src/uts/common/io/arn/arn_hw.c

4146

REG_WRITE(ah, AR_2040_MODE, macmode);

usr/src/uts/common/io/arn/arn_hw.c

429

ath9k_hw_set_defaults(struct ath_hal *ah)

usr/src/uts/common/io/arn/arn_hw.c

433

ah->ah_config.dma_beacon_response_time = 2;

usr/src/uts/common/io/arn/arn_hw.c

434

ah->ah_config.sw_beacon_response_time = 10;

usr/src/uts/common/io/arn/arn_hw.c

435

ah->ah_config.additional_swba_backoff = 0;

usr/src/uts/common/io/arn/arn_hw.c

436

ah->ah_config.ack_6mb = 0x0;

usr/src/uts/common/io/arn/arn_hw.c

437

ah->ah_config.cwm_ignore_extcca = 0;

usr/src/uts/common/io/arn/arn_hw.c

438

ah->ah_config.pcie_powersave_enable = 0;

usr/src/uts/common/io/arn/arn_hw.c

439

ah->ah_config.pcie_l1skp_enable = 0;

usr/src/uts/common/io/arn/arn_hw.c

440

ah->ah_config.pcie_clock_req = 0;

usr/src/uts/common/io/arn/arn_hw.c

441

ah->ah_config.pcie_power_reset = 0x100;

usr/src/uts/common/io/arn/arn_hw.c

442

ah->ah_config.pcie_restore = 0;

usr/src/uts/common/io/arn/arn_hw.c

443

ah->ah_config.pcie_waen = 0;

usr/src/uts/common/io/arn/arn_hw.c

444

ah->ah_config.analog_shiftreg = 1;

usr/src/uts/common/io/arn/arn_hw.c

445

ah->ah_config.ht_enable = 1;

usr/src/uts/common/io/arn/arn_hw.c

446

ah->ah_config.ofdm_trig_low = 200;

usr/src/uts/common/io/arn/arn_hw.c

447

ah->ah_config.ofdm_trig_high = 500;

usr/src/uts/common/io/arn/arn_hw.c

448

ah->ah_config.cck_trig_high = 200;

usr/src/uts/common/io/arn/arn_hw.c

449

ah->ah_config.cck_trig_low = 100;

usr/src/uts/common/io/arn/arn_hw.c

450

ah->ah_config.enable_ani = 1;

usr/src/uts/common/io/arn/arn_hw.c

451

ah->ah_config.noise_immunity_level = 4;

usr/src/uts/common/io/arn/arn_hw.c

452

ah->ah_config.ofdm_weaksignal_det = 1;

usr/src/uts/common/io/arn/arn_hw.c

453

ah->ah_config.cck_weaksignal_thr = 0;

usr/src/uts/common/io/arn/arn_hw.c

454

ah->ah_config.spur_immunity_level = 2;

usr/src/uts/common/io/arn/arn_hw.c

455

ah->ah_config.firstep_level = 0;

usr/src/uts/common/io/arn/arn_hw.c

456

ah->ah_config.rssi_thr_high = 40;

usr/src/uts/common/io/arn/arn_hw.c

457

ah->ah_config.rssi_thr_low = 7;

usr/src/uts/common/io/arn/arn_hw.c

458

ah->ah_config.diversity_control = 0;

usr/src/uts/common/io/arn/arn_hw.c

459

ah->ah_config.antenna_switch_swap = 0;

usr/src/uts/common/io/arn/arn_hw.c

462

ah->ah_config.spurchans[i][0] = AR_NO_SPUR;

usr/src/uts/common/io/arn/arn_hw.c

463

ah->ah_config.spurchans[i][1] = AR_NO_SPUR;

usr/src/uts/common/io/arn/arn_hw.c

466

ah->ah_config.intr_mitigation = 1;

usr/src/uts/common/io/arn/arn_hw.c

47

static boolean_t ath9k_hw_set_reset_reg(struct ath_hal *ah, uint32_t type);

usr/src/uts/common/io/arn/arn_hw.c

48

static void ath9k_hw_set_regs(struct ath_hal *ah, struct ath9k_channel *chan,

usr/src/uts/common/io/arn/arn_hw.c

495

struct ath_hal *ah;

usr/src/uts/common/io/arn/arn_hw.c

50

static uint32_t ath9k_hw_ini_fixup(struct ath_hal *ah,

usr/src/uts/common/io/arn/arn_hw.c

506

ah = &ahp->ah;

usr/src/uts/common/io/arn/arn_hw.c

507

ah->ah_sc = sc;

usr/src/uts/common/io/arn/arn_hw.c

508

ah->ah_sh = mem;

usr/src/uts/common/io/arn/arn_hw.c

509

ah->ah_magic = AR5416_MAGIC;

usr/src/uts/common/io/arn/arn_hw.c

510

ah->ah_countryCode = CTRY_DEFAULT;

usr/src/uts/common/io/arn/arn_hw.c

511

ah->ah_devid = device_id;

usr/src/uts/common/io/arn/arn_hw.c

512

ah->ah_subvendorid = 0;

usr/src/uts/common/io/arn/arn_hw.c

514

ah->ah_flags = 0;

usr/src/uts/common/io/arn/arn_hw.c

516

ah->ah_macVersion = AR_SREV_VERSION_9100;

usr/src/uts/common/io/arn/arn_hw.c

517

if (!AR_SREV_9100(ah))

usr/src/uts/common/io/arn/arn_hw.c

518

ah->ah_flags = AH_USE_EEPROM;

usr/src/uts/common/io/arn/arn_hw.c

520

ah->ah_powerLimit = MAX_RATE_POWER;

usr/src/uts/common/io/arn/arn_hw.c

521

ah->ah_tpScale = ATH9K_TP_SCALE_MAX;

usr/src/uts/common/io/arn/arn_hw.c

523

ahp->ah_diversityControl = ah->ah_config.diversity_control;

usr/src/uts/common/io/arn/arn_hw.c

525

ah->ah_config.antenna_switch_swap;

usr/src/uts/common/io/arn/arn_hw.c

53

static void ath9k_hw_9280_spur_mitigate(struct ath_hal *ah,

usr/src/uts/common/io/arn/arn_hw.c

541

ath9k_hw_rfattach(struct ath_hal *ah)

usr/src/uts/common/io/arn/arn_hw.c

546

rfStatus = ath9k_hw_init_rf(ah, &ecode);

usr/src/uts/common/io/arn/arn_hw.c

55

static void ath9k_hw_spur_mitigate(struct ath_hal *ah,

usr/src/uts/common/io/arn/arn_hw.c

558

ath9k_hw_rf_claim(struct ath_hal *ah)

usr/src/uts/common/io/arn/arn_hw.c

562

REG_WRITE(ah, AR_PHY(0), 0x00000007);

usr/src/uts/common/io/arn/arn_hw.c

564

val = ath9k_hw_get_radiorev(ah);

usr/src/uts/common/io/arn/arn_hw.c

579

ah->ah_analog5GhzRev));

usr/src/uts/common/io/arn/arn_hw.c

584

ah->ah_analog5GhzRev = (uint16_t)val;

usr/src/uts/common/io/arn/arn_hw.c

590

ath9k_hw_init_macaddr(struct ath_hal *ah)

usr/src/uts/common/io/arn/arn_hw.c

595

struct ath_hal_5416 *ahp = AH5416(ah);

usr/src/uts/common/io/arn/arn_hw.c

599

eeval = ath9k_hw_get_eeprom(ah, AR_EEPROM_MAC(i));

usr/src/uts/common/io/arn/arn_hw.c

61

ath9k_hw_mac_usec(struct ath_hal *ah, uint32_t clks)

usr/src/uts/common/io/arn/arn_hw.c

616

ath9k_hw_init_rxgain_ini(struct ath_hal *ah)

usr/src/uts/common/io/arn/arn_hw.c

619

struct ath_hal_5416 *ahp = AH5416(ah);

usr/src/uts/common/io/arn/arn_hw.c

621

if (ath9k_hw_get_eeprom(ah, EEP_MINOR_REV) >= AR5416_EEP_MINOR_VER_17) {

usr/src/uts/common/io/arn/arn_hw.c

622

rxgain_type = ath9k_hw_get_eeprom(ah, EEP_RXGAIN_TYPE);

usr/src/uts/common/io/arn/arn_hw.c

63

if (ah->ah_curchan != NULL)

usr/src/uts/common/io/arn/arn_hw.c

646

ath9k_hw_init_txgain_ini(struct ath_hal *ah)

usr/src/uts/common/io/arn/arn_hw.c

649

struct ath_hal_5416 *ahp = AH5416(ah);

usr/src/uts/common/io/arn/arn_hw.c

65

CLOCK_RATE[ath9k_hw_chan2wmode(ah, ah->ah_curchan)]);

usr/src/uts/common/io/arn/arn_hw.c

651

if (ath9k_hw_get_eeprom(ah, EEP_MINOR_REV) >= AR5416_EEP_MINOR_VER_19) {

usr/src/uts/common/io/arn/arn_hw.c

652

txgain_type = ath9k_hw_get_eeprom(ah, EEP_TXGAIN_TYPE);

usr/src/uts/common/io/arn/arn_hw.c

672

ath9k_hw_post_attach(struct ath_hal *ah)

usr/src/uts/common/io/arn/arn_hw.c

676

if (!ath9k_hw_chip_test(ah)) {

usr/src/uts/common/io/arn/arn_hw.c

682

ecode = ath9k_hw_rf_claim(ah);

usr/src/uts/common/io/arn/arn_hw.c

686

ecode = ath9k_hw_eeprom_attach(ah);

usr/src/uts/common/io/arn/arn_hw.c

689

ecode = ath9k_hw_rfattach(ah);

usr/src/uts/common/io/arn/arn_hw.c

693

if (!AR_SREV_9100(ah)) {

usr/src/uts/common/io/arn/arn_hw.c

694

ath9k_hw_ani_setup(ah);

usr/src/uts/common/io/arn/arn_hw.c

695

ath9k_hw_ani_attach(ah);

usr/src/uts/common/io/arn/arn_hw.c

706

struct ath_hal *ah;

usr/src/uts/common/io/arn/arn_hw.c

71

ath9k_hw_mac_to_usec(struct ath_hal *ah, uint32_t clks)

usr/src/uts/common/io/arn/arn_hw.c

715

ah = &ahp->ah;

usr/src/uts/common/io/arn/arn_hw.c

717

ath9k_hw_set_defaults(ah);

usr/src/uts/common/io/arn/arn_hw.c

719

if (ah->ah_config.intr_mitigation != 0)

usr/src/uts/common/io/arn/arn_hw.c

722

if (!ath9k_hw_set_reset_reg(ah, ATH9K_RESET_POWER_ON)) {

usr/src/uts/common/io/arn/arn_hw.c

729

if (!ath9k_hw_setpower(ah, ATH9K_PM_AWAKE)) {

usr/src/uts/common/io/arn/arn_hw.c

73

struct ath9k_channel *chan = ah->ah_curchan;

usr/src/uts/common/io/arn/arn_hw.c

736

if (ah->ah_config.serialize_regmode == SER_REG_MODE_AUTO) {

usr/src/uts/common/io/arn/arn_hw.c

737

if (ah->ah_macVersion == AR_SREV_VERSION_5416_PCI ||

usr/src/uts/common/io/arn/arn_hw.c

738

(AR_SREV_9280(ah) && !ah->ah_isPciExpress)) {

usr/src/uts/common/io/arn/arn_hw.c

739

ah->ah_config.serialize_regmode =

usr/src/uts/common/io/arn/arn_hw.c

742

ah->ah_config.serialize_regmode =

usr/src/uts/common/io/arn/arn_hw.c

748

ah->ah_config.serialize_regmode));

usr/src/uts/common/io/arn/arn_hw.c

750

if ((ah->ah_macVersion != AR_SREV_VERSION_5416_PCI) &&

usr/src/uts/common/io/arn/arn_hw.c

751

(ah->ah_macVersion != AR_SREV_VERSION_5416_PCIE) &&

usr/src/uts/common/io/arn/arn_hw.c

752

(ah->ah_macVersion != AR_SREV_VERSION_9160) &&

usr/src/uts/common/io/arn/arn_hw.c

753

(!AR_SREV_9100(ah)) && (!AR_SREV_9280(ah)) &&

usr/src/uts/common/io/arn/arn_hw.c

754

(!AR_SREV_9285(ah))) {

usr/src/uts/common/io/arn/arn_hw.c

757

ah->ah_macVersion, ah->ah_macRev));

usr/src/uts/common/io/arn/arn_hw.c

76

return (ath9k_hw_mac_usec(ah, clks) / 2);

usr/src/uts/common/io/arn/arn_hw.c

762

if (AR_SREV_9100(ah)) {

usr/src/uts/common/io/arn/arn_hw.c

765

ah->ah_isPciExpress = B_FALSE;

usr/src/uts/common/io/arn/arn_hw.c

767

ah->ah_phyRev = REG_READ(ah, AR_PHY_CHIP_ID);

usr/src/uts/common/io/arn/arn_hw.c

769

if (AR_SREV_9160_10_OR_LATER(ah)) {

usr/src/uts/common/io/arn/arn_hw.c

770

if (AR_SREV_9280_10_OR_LATER(ah)) {

usr/src/uts/common/io/arn/arn_hw.c

78

return (ath9k_hw_mac_usec(ah, clks));

usr/src/uts/common/io/arn/arn_hw.c

790

if (AR_SREV_9160(ah)) {

usr/src/uts/common/io/arn/arn_hw.c

791

ah->ah_config.enable_ani = 1;

usr/src/uts/common/io/arn/arn_hw.c

796

if (AR_SREV_9280_10_OR_LATER(ah)) {

usr/src/uts/common/io/arn/arn_hw.c

803

ah->ah_macVersion, ah->ah_macRev));

usr/src/uts/common/io/arn/arn_hw.c

805

if (AR_SREV_9285_12_OR_LATER(ah)) {

usr/src/uts/common/io/arn/arn_hw.c

812

if (ah->ah_config.pcie_clock_req) {

usr/src/uts/common/io/arn/arn_hw.c

82

ath9k_hw_mac_clks(struct ath_hal *ah, uint32_t usecs)

usr/src/uts/common/io/arn/arn_hw.c

823

} else if (AR_SREV_9285_10_OR_LATER(ah)) {

usr/src/uts/common/io/arn/arn_hw.c

830

if (ah->ah_config.pcie_clock_req) {

usr/src/uts/common/io/arn/arn_hw.c

84

if (ah->ah_curchan != NULL)

usr/src/uts/common/io/arn/arn_hw.c

841

} else if (AR_SREV_9280_20_OR_LATER(ah)) {

usr/src/uts/common/io/arn/arn_hw.c

848

if (ah->ah_config.pcie_clock_req) {

usr/src/uts/common/io/arn/arn_hw.c

85

return (usecs * CLOCK_RATE[ath9k_hw_chan2wmode(ah,

usr/src/uts/common/io/arn/arn_hw.c

86

ah->ah_curchan)]);

usr/src/uts/common/io/arn/arn_hw.c

862

} else if (AR_SREV_9280_10_OR_LATER(ah)) {

usr/src/uts/common/io/arn/arn_hw.c

869

} else if (AR_SREV_9160_10_OR_LATER(ah)) {

usr/src/uts/common/io/arn/arn_hw.c

899

if (AR_SREV_9160_11(ah)) {

usr/src/uts/common/io/arn/arn_hw.c

907

} else if (AR_SREV_9100_OR_LATER(ah)) {

usr/src/uts/common/io/arn/arn_hw.c

92

ath9k_hw_mac_to_clks(struct ath_hal *ah, uint32_t usecs)

usr/src/uts/common/io/arn/arn_hw.c

94

struct ath9k_channel *chan = ah->ah_curchan;

usr/src/uts/common/io/arn/arn_hw.c

97

return (ath9k_hw_mac_clks(ah, usecs) * 2);

usr/src/uts/common/io/arn/arn_hw.c

975

if (ah->ah_isPciExpress)

usr/src/uts/common/io/arn/arn_hw.c

976

ath9k_hw_configpcipowersave(ah, 0);

usr/src/uts/common/io/arn/arn_hw.c

978

ath9k_hw_disablepcie(ah);

usr/src/uts/common/io/arn/arn_hw.c

980

ecode = ath9k_hw_post_attach(ah);

usr/src/uts/common/io/arn/arn_hw.c

985

if (AR_SREV_9280_20(ah))

usr/src/uts/common/io/arn/arn_hw.c

986

ath9k_hw_init_rxgain_ini(ah);

usr/src/uts/common/io/arn/arn_hw.c

989

if (AR_SREV_9280_20(ah))

usr/src/uts/common/io/arn/arn_hw.c

99

return (ath9k_hw_mac_clks(ah, usecs));

usr/src/uts/common/io/arn/arn_hw.c

990

ath9k_hw_init_txgain_ini(ah);

usr/src/uts/common/io/arn/arn_hw.c

992

if (ah->ah_devid == AR9280_DEVID_PCI) {

usr/src/uts/common/io/arn/arn_hw.h

1004

(AR_SREV_9100(ah)) ? 0x1fff1000 : 0x503f1200

usr/src/uts/common/io/arn/arn_hw.h

1103

uint32_t ath9k_hw_get_eeprom(struct ath_hal *ah,

usr/src/uts/common/io/arn/arn_hw.h

322

#define RXSTATUS_RATE(ah, ads) (AR_SREV_5416_V20_OR_LATER(ah) ? \

usr/src/uts/common/io/arn/arn_hw.h

344

#define AR_SREV_9100(ah) ((ah->ah_macVersion) == AR_SREV_VERSION_9100)

usr/src/uts/common/io/arn/arn_hw.h

382

#define DO_ANI(ah) \

usr/src/uts/common/io/arn/arn_hw.h

383

((AH5416(ah)->ah_procPhyErr & HAL_PROCESS_ANI))

usr/src/uts/common/io/arn/arn_hw.h

833

struct ath_hal ah;

usr/src/uts/common/io/arn/arn_hw.h

967

#define ar5416RfDetach(ah) do { \

usr/src/uts/common/io/arn/arn_hw.h

968

if (AH5416(ah)->ah_rfHal.rfDetach != NULL) \

usr/src/uts/common/io/arn/arn_hw.h

969

AH5416(ah)->ah_rfHal.rfDetach(ah); \

usr/src/uts/common/io/arn/arn_hw.h

977

#define OLC_FOR_AR9280_20_LATER (AR_SREV_9280_20_OR_LATER(ah) && \

usr/src/uts/common/io/arn/arn_hw.h

978

ath9k_hw_get_eeprom(ah, EEP_OL_PWRCTRL))

usr/src/uts/common/io/arn/arn_hw.h

988

REG_WRITE(ah, INI_RA((iniarray), (r), 0), \

usr/src/uts/common/io/arn/arn_mac.c

1016

ath9k_hw_setuprxdesc(struct ath_hal *ah, struct ath_desc *ds,

usr/src/uts/common/io/arn/arn_mac.c

1020

struct ath9k_hw_capabilities *pCap = &ah->ah_caps;

usr/src/uts/common/io/arn/arn_mac.c

1034

ath9k_hw_setrxabort(struct ath_hal *ah, boolean_t set)

usr/src/uts/common/io/arn/arn_mac.c

1039

REG_SET_BIT(ah, AR_DIAG_SW,

usr/src/uts/common/io/arn/arn_mac.c

1042

if (!ath9k_hw_wait(ah, AR_OBS_BUS_1,

usr/src/uts/common/io/arn/arn_mac.c

1044

REG_CLR_BIT(ah, AR_DIAG_SW,

usr/src/uts/common/io/arn/arn_mac.c

1047

reg = REG_READ(ah, AR_OBS_BUS_1);

usr/src/uts/common/io/arn/arn_mac.c

1056

REG_CLR_BIT(ah, AR_DIAG_SW,

usr/src/uts/common/io/arn/arn_mac.c

1064

ath9k_hw_putrxbuf(struct ath_hal *ah, uint32_t rxdp)

usr/src/uts/common/io/arn/arn_mac.c

1066

REG_WRITE(ah, AR_RXDP, rxdp);

usr/src/uts/common/io/arn/arn_mac.c

1070

ath9k_hw_rxena(struct ath_hal *ah)

usr/src/uts/common/io/arn/arn_mac.c

1072

REG_WRITE(ah, AR_CR, AR_CR_RXE);

usr/src/uts/common/io/arn/arn_mac.c

1076

ath9k_hw_startpcureceive(struct ath_hal *ah)

usr/src/uts/common/io/arn/arn_mac.c

1078

ath9k_enable_mib_counters(ah);

usr/src/uts/common/io/arn/arn_mac.c

1080

ath9k_ani_reset(ah);

usr/src/uts/common/io/arn/arn_mac.c

1082

REG_CLR_BIT(ah, AR_DIAG_SW, (AR_DIAG_RX_DIS | AR_DIAG_RX_ABORT));

usr/src/uts/common/io/arn/arn_mac.c

1086

ath9k_hw_stoppcurecv(struct ath_hal *ah)

usr/src/uts/common/io/arn/arn_mac.c

1088

REG_SET_BIT(ah, AR_DIAG_SW, AR_DIAG_RX_DIS);

usr/src/uts/common/io/arn/arn_mac.c

1090

ath9k_hw_disable_mib_counters(ah);

usr/src/uts/common/io/arn/arn_mac.c

1094

ath9k_hw_stopdmarecv(struct ath_hal *ah)

usr/src/uts/common/io/arn/arn_mac.c

1096

REG_WRITE(ah, AR_CR, AR_CR_RXD);

usr/src/uts/common/io/arn/arn_mac.c

1098

if (!ath9k_hw_wait(ah, AR_CR, AR_CR_RXE, 0)) {

usr/src/uts/common/io/arn/arn_mac.c

1102

REG_READ(ah, AR_CR), REG_READ(ah, AR_DIAG_SW)));

usr/src/uts/common/io/arn/arn_mac.c

120

REG_READ(ah, AR_OBS_BUS_1)));

usr/src/uts/common/io/arn/arn_mac.c

122

"AR_CR 0x%x \n", REG_READ(ah, AR_CR)));

usr/src/uts/common/io/arn/arn_mac.c

126

ath9k_hw_gettxbuf(struct ath_hal *ah, uint32_t q)

usr/src/uts/common/io/arn/arn_mac.c

128

return (REG_READ(ah, AR_QTXDP(q)));

usr/src/uts/common/io/arn/arn_mac.c

132

ath9k_hw_puttxbuf(struct ath_hal *ah, uint32_t q, uint32_t txdp)

usr/src/uts/common/io/arn/arn_mac.c

134

REG_WRITE(ah, AR_QTXDP(q), txdp);

usr/src/uts/common/io/arn/arn_mac.c

140

ath9k_hw_txstart(struct ath_hal *ah, uint32_t q)

usr/src/uts/common/io/arn/arn_mac.c

145

REG_WRITE(ah, AR_Q_TXE, 1 << q);

usr/src/uts/common/io/arn/arn_mac.c

151

ath9k_hw_numtxpending(struct ath_hal *ah, uint32_t q)

usr/src/uts/common/io/arn/arn_mac.c

155

npend = REG_READ(ah, AR_QSTS(q)) & AR_Q_STS_PEND_FR_CNT;

usr/src/uts/common/io/arn/arn_mac.c

158

if (REG_READ(ah, AR_Q_TXE) & (1 << q))

usr/src/uts/common/io/arn/arn_mac.c

166

ath9k_hw_updatetxtriglevel(struct ath_hal *ah, boolean_t bIncTrigLevel)

usr/src/uts/common/io/arn/arn_mac.c

168

struct ath_hal_5416 *ahp = AH5416(ah);

usr/src/uts/common/io/arn/arn_mac.c

172

if (ah->ah_txTrigLevel >= MAX_TX_FIFO_THRESHOLD)

usr/src/uts/common/io/arn/arn_mac.c

175

omask = ath9k_hw_set_interrupts(ah,

usr/src/uts/common/io/arn/arn_mac.c

178

txcfg = REG_READ(ah, AR_TXCFG);

usr/src/uts/common/io/arn/arn_mac.c

187

REG_WRITE(ah, AR_TXCFG,

usr/src/uts/common/io/arn/arn_mac.c

190

(void) ath9k_hw_set_interrupts(ah, omask);

usr/src/uts/common/io/arn/arn_mac.c

192

ah->ah_txTrigLevel = (uint16_t)newLevel; /* ??? */

usr/src/uts/common/io/arn/arn_mac.c

198

ath9k_hw_stoptxdma(struct ath_hal *ah, uint32_t q)

usr/src/uts/common/io/arn/arn_mac.c

202

REG_WRITE(ah, AR_Q_TXD, 1 << q);

usr/src/uts/common/io/arn/arn_mac.c

205

if (ath9k_hw_numtxpending(ah, q) == 0)

usr/src/uts/common/io/arn/arn_mac.c

210

if (ath9k_hw_numtxpending(ah, q)) {

usr/src/uts/common/io/arn/arn_mac.c

213

__func__, ath9k_hw_numtxpending(ah, q), q));

usr/src/uts/common/io/arn/arn_mac.c

216

tsfLow = REG_READ(ah, AR_TSF_L32);

usr/src/uts/common/io/arn/arn_mac.c

217

REG_WRITE(ah, AR_QUIET2, SM(10, AR_QUIET2_QUIET_DUR));

usr/src/uts/common/io/arn/arn_mac.c

218

REG_WRITE(ah, AR_QUIET_PERIOD, 100);

usr/src/uts/common/io/arn/arn_mac.c

219

REG_WRITE(ah, AR_NEXT_QUIET_TIMER, tsfLow >> 10);

usr/src/uts/common/io/arn/arn_mac.c

220

REG_SET_BIT(ah, AR_TIMER_MODE, AR_QUIET_TIMER_EN);

usr/src/uts/common/io/arn/arn_mac.c

222

if ((REG_READ(ah, AR_TSF_L32) >> 10) == (tsfLow >> 10))

usr/src/uts/common/io/arn/arn_mac.c

230

REG_SET_BIT(ah, AR_DIAG_SW, AR_DIAG_FORCE_CH_IDLE_HIGH);

usr/src/uts/common/io/arn/arn_mac.c

233

REG_CLR_BIT(ah, AR_TIMER_MODE, AR_QUIET_TIMER_EN);

usr/src/uts/common/io/arn/arn_mac.c

237

while (ath9k_hw_numtxpending(ah, q)) {

usr/src/uts/common/io/arn/arn_mac.c

248

REG_CLR_BIT(ah, AR_DIAG_SW, AR_DIAG_FORCE_CH_IDLE_HIGH);

usr/src/uts/common/io/arn/arn_mac.c

251

REG_WRITE(ah, AR_Q_TXD, 0);

usr/src/uts/common/io/arn/arn_mac.c

258

ath9k_hw_filltxdesc(struct ath_hal *ah, struct ath_desc *ds,

usr/src/uts/common/io/arn/arn_mac.c

288

ath9k_hw_cleartxdesc(struct ath_hal *ah, struct ath_desc *ds)

usr/src/uts/common/io/arn/arn_mac.c

300

ath9k_hw_txprocdesc(struct ath_hal *ah, struct ath_desc *ds)

usr/src/uts/common/io/arn/arn_mac.c

31

ath9k_hw_set_txq_interrupts(struct ath_hal *ah,

usr/src/uts/common/io/arn/arn_mac.c

323

(void) ath9k_hw_updatetxtriglevel(ah, B_TRUE);

usr/src/uts/common/io/arn/arn_mac.c

34

struct ath_hal_5416 *ahp = AH5416(ah);

usr/src/uts/common/io/arn/arn_mac.c

341

(void) ath9k_hw_updatetxtriglevel(ah, B_TRUE);

usr/src/uts/common/io/arn/arn_mac.c

345

(void) ath9k_hw_updatetxtriglevel(ah, B_TRUE);

usr/src/uts/common/io/arn/arn_mac.c

388

ath9k_hw_set11n_txdesc(struct ath_hal *ah, struct ath_desc *ds,

usr/src/uts/common/io/arn/arn_mac.c

393

struct ath_hal_5416 *ahp = AH5416(ah);

usr/src/uts/common/io/arn/arn_mac.c

416

if (AR_SREV_9285(ah)) {

usr/src/uts/common/io/arn/arn_mac.c

42

REG_WRITE(ah, AR_IMR_S0,

usr/src/uts/common/io/arn/arn_mac.c

427

ath9k_hw_set11n_ratescenario(struct ath_hal *ah, struct ath_desc *ds,

usr/src/uts/common/io/arn/arn_mac.c

45

REG_WRITE(ah, AR_IMR_S1,

usr/src/uts/common/io/arn/arn_mac.c

48

REG_RMW_FIELD(ah, AR_IMR_S2,

usr/src/uts/common/io/arn/arn_mac.c

487

ath9k_hw_set11n_aggr_first(struct ath_hal *ah, struct ath_desc *ds,

usr/src/uts/common/io/arn/arn_mac.c

499

ath9k_hw_set11n_aggr_middle(struct ath_hal *ah, struct ath_desc *ds,

usr/src/uts/common/io/arn/arn_mac.c

515

ath9k_hw_set11n_aggr_last(struct ath_hal *ah, struct ath_desc *ds)

usr/src/uts/common/io/arn/arn_mac.c

526

ath9k_hw_clr11n_aggr(struct ath_hal *ah, struct ath_desc *ds)

usr/src/uts/common/io/arn/arn_mac.c

53

ath9k_hw_dmaRegDump(struct ath_hal *ah)

usr/src/uts/common/io/arn/arn_mac.c

535

ath9k_hw_set11n_burstduration(struct ath_hal *ah, struct ath_desc *ds,

usr/src/uts/common/io/arn/arn_mac.c

546

ath9k_hw_set11n_virtualmorefrag(struct ath_hal *ah, struct ath_desc *ds,

usr/src/uts/common/io/arn/arn_mac.c

558

ath9k_hw_gettxintrtxqs(struct ath_hal *ah, uint32_t *txqs)

usr/src/uts/common/io/arn/arn_mac.c

560

struct ath_hal_5416 *ahp = AH5416(ah);

usr/src/uts/common/io/arn/arn_mac.c

567

ath9k_hw_set_txq_props(struct ath_hal *ah, int q,

usr/src/uts/common/io/arn/arn_mac.c

571

struct ath_hal_5416 *ahp = AH5416(ah);

usr/src/uts/common/io/arn/arn_mac.c

572

struct ath9k_hw_capabilities *pCap = &ah->ah_caps;

usr/src/uts/common/io/arn/arn_mac.c

60

REG_WRITE(ah, AR_MACMISC,

usr/src/uts/common/io/arn/arn_mac.c

639

ath9k_hw_get_txq_props(struct ath_hal *ah, int q,

usr/src/uts/common/io/arn/arn_mac.c

642

struct ath_hal_5416 *ahp = AH5416(ah);

usr/src/uts/common/io/arn/arn_mac.c

643

struct ath9k_hw_capabilities *pCap = &ah->ah_caps;

usr/src/uts/common/io/arn/arn_mac.c

678

ath9k_hw_setuptxqueue(struct ath_hal *ah, enum ath9k_tx_queue type,

usr/src/uts/common/io/arn/arn_mac.c

681

struct ath_hal_5416 *ahp = AH5416(ah);

usr/src/uts/common/io/arn/arn_mac.c

683

struct ath9k_hw_capabilities *pCap = &ah->ah_caps;

usr/src/uts/common/io/arn/arn_mac.c

71

val[i] = REG_READ(ah, AR_DMADBG_0 + (i * sizeof (uint32_t)));

usr/src/uts/common/io/arn/arn_mac.c

744

(void) ath9k_hw_set_txq_props(ah, q, qinfo);

usr/src/uts/common/io/arn/arn_mac.c

751

ath9k_hw_releasetxqueue(struct ath_hal *ah, uint32_t q)

usr/src/uts/common/io/arn/arn_mac.c

753

struct ath_hal_5416 *ahp = AH5416(ah);

usr/src/uts/common/io/arn/arn_mac.c

754

struct ath9k_hw_capabilities *pCap = &ah->ah_caps;

usr/src/uts/common/io/arn/arn_mac.c

779

ath9k_hw_set_txq_interrupts(ah, qi);

usr/src/uts/common/io/arn/arn_mac.c

785

ath9k_hw_resettxqueue(struct ath_hal *ah, uint32_t q)

usr/src/uts/common/io/arn/arn_mac.c

787

struct ath_hal_5416 *ahp = AH5416(ah);

usr/src/uts/common/io/arn/arn_mac.c

788

struct ath9k_hw_capabilities *pCap = &ah->ah_caps;

usr/src/uts/common/io/arn/arn_mac.c

789

struct ath9k_channel *chan = ah->ah_curchan;

usr/src/uts/common/io/arn/arn_mac.c

823

REG_WRITE(ah, AR_DLCL_IFS(q),

usr/src/uts/common/io/arn/arn_mac.c

828

REG_WRITE(ah, AR_DRETRY_LIMIT(q),

usr/src/uts/common/io/arn/arn_mac.c

833

REG_WRITE(ah, AR_QMISC(q), AR_Q_MISC_DCU_EARLY_TERM_REQ);

usr/src/uts/common/io/arn/arn_mac.c

834

REG_WRITE(ah, AR_DMISC(q),

usr/src/uts/common/io/arn/arn_mac.c

838

REG_WRITE(ah, AR_QCBRCFG(q),

usr/src/uts/common/io/arn/arn_mac.c

841

REG_WRITE(ah, AR_QMISC(q),

usr/src/uts/common/io/arn/arn_mac.c

842

REG_READ(ah, AR_QMISC(q)) | AR_Q_MISC_FSP_CBR |

usr/src/uts/common/io/arn/arn_mac.c

847

REG_WRITE(ah, AR_QRDYTIMECFG(q),

usr/src/uts/common/io/arn/arn_mac.c

852

REG_WRITE(ah, AR_DCHNTIME(q),

usr/src/uts/common/io/arn/arn_mac.c

858

REG_WRITE(ah, AR_QMISC(q),

usr/src/uts/common/io/arn/arn_mac.c

859

REG_READ(ah, AR_QMISC(q)) |

usr/src/uts/common/io/arn/arn_mac.c

865

REG_WRITE(ah, AR_DMISC(q),

usr/src/uts/common/io/arn/arn_mac.c

866

REG_READ(ah, AR_DMISC(q)) |

usr/src/uts/common/io/arn/arn_mac.c

870

REG_WRITE(ah, AR_DMISC(q),

usr/src/uts/common/io/arn/arn_mac.c

871

REG_READ(ah, AR_DMISC(q)) |

usr/src/uts/common/io/arn/arn_mac.c

876

REG_WRITE(ah, AR_QMISC(q), REG_READ(ah, AR_QMISC(q)) |

usr/src/uts/common/io/arn/arn_mac.c

881

REG_WRITE(ah, AR_DMISC(q), REG_READ(ah, AR_DMISC(q)) |

usr/src/uts/common/io/arn/arn_mac.c

888

REG_WRITE(ah, AR_QMISC(q), REG_READ(ah, AR_QMISC(q)) |

usr/src/uts/common/io/arn/arn_mac.c

893

(ah->ah_config.sw_beacon_response_time -

usr/src/uts/common/io/arn/arn_mac.c

894

ah->ah_config.dma_beacon_response_time) -

usr/src/uts/common/io/arn/arn_mac.c

895

ah->ah_config.additional_swba_backoff) * 1024;

usr/src/uts/common/io/arn/arn_mac.c

896

REG_WRITE(ah, AR_QRDYTIMECFG(q),

usr/src/uts/common/io/arn/arn_mac.c

898

REG_WRITE(ah, AR_DMISC(q), REG_READ(ah, AR_DMISC(q)) |

usr/src/uts/common/io/arn/arn_mac.c

903

REG_WRITE(ah, AR_QMISC(q),

usr/src/uts/common/io/arn/arn_mac.c

904

REG_READ(ah, AR_QMISC(q)) | AR_Q_MISC_CBR_INCR_DIS1);

usr/src/uts/common/io/arn/arn_mac.c

907

REG_WRITE(ah, AR_DMISC(q), REG_READ(ah, AR_DMISC(q)) |

usr/src/uts/common/io/arn/arn_mac.c

915

REG_WRITE(ah, AR_DMISC(q), REG_READ(ah, AR_DMISC(q)) |

usr/src/uts/common/io/arn/arn_mac.c

941

ath9k_hw_set_txq_interrupts(ah, qi);

usr/src/uts/common/io/arn/arn_mac.c

948

ath9k_hw_rxprocdesc(struct ath_hal *ah, struct ath_desc *ds,

usr/src/uts/common/io/arn/arn_mac.c

980

ds->ds_rxstat.rs_rate = RXSTATUS_RATE(ah, (&ads));

usr/src/uts/common/io/arn/arn_main.c

1001

ath9k_hw_getchan_noise(ah,

usr/src/uts/common/io/arn/arn_main.c

1002

ah->ah_curchan);

usr/src/uts/common/io/arn/arn_main.c

1007

ah->ah_curchan->channel,

usr/src/uts/common/io/arn/arn_main.c

1008

ah->ah_curchan->channelFlags,

usr/src/uts/common/io/arn/arn_main.c

1014

ah->ah_curchan->channel,

usr/src/uts/common/io/arn/arn_main.c

1015

ah->ah_curchan->channelFlags));

usr/src/uts/common/io/arn/arn_main.c

1058

struct ath_hal *ah = sc->sc_ah;

usr/src/uts/common/io/arn/arn_main.c

1073

if (!ath9k_hw_intrpend(ah)) { /* shared irq, not for us */

usr/src/uts/common/io/arn/arn_main.c

1084

(void) ath9k_hw_getisr(ah, &status); /* NB: clears ISR too */

usr/src/uts/common/io/arn/arn_main.c

1124

(void) ath9k_hw_updatetxtriglevel(ah, B_TRUE);

usr/src/uts/common/io/arn/arn_main.c

1150

(void) ath9k_hw_set_interrupts(ah, 0);

usr/src/uts/common/io/arn/arn_main.c

1156

ath9k_hw_procmibevent(ah, &sc->sc_halstats);

usr/src/uts/common/io/arn/arn_main.c

1157

(void) ath9k_hw_set_interrupts(ah, sc->sc_imask);

usr/src/uts/common/io/arn/arn_main.c

1167

if (!(ah->ah_caps.hw_caps &

usr/src/uts/common/io/arn/arn_main.c

1173

ath9k_hw_setrxabort(ah, 0);

usr/src/uts/common/io/arn/arn_main.c

1240

struct ath_hal *ah = sc->sc_ah;

usr/src/uts/common/io/arn/arn_main.c

1244

(void) ath9k_hw_set_interrupts(ah, 0);

usr/src/uts/common/io/arn/arn_main.c

1248

if (!ath9k_hw_reset(ah, sc->sc_ah->ah_curchan, sc->tx_chan_width,

usr/src/uts/common/io/arn/arn_main.c

1272

(void) ath9k_hw_set_interrupts(ah, sc->sc_imask);

usr/src/uts/common/io/arn/arn_main.c

1392

struct ath_hal *ah = sc->sc_ah;

usr/src/uts/common/io/arn/arn_main.c

1425

(ah, sc->sc_imask &~ ATH9K_INT_GLOBAL);

usr/src/uts/common/io/arn/arn_main.c

1429

(void) ath9k_hw_stoptxdma(ah, sc->sc_beaconq);

usr/src/uts/common/io/arn/arn_main.c

1483

ath9k_hw_setrxfilter(ah, rfilt);

usr/src/uts/common/io/arn/arn_main.c

1486

ath9k_hw_write_associd(ah, bssid, in->in_associd);

usr/src/uts/common/io/arn/arn_main.c

1488

ath9k_hw_write_associd(ah, bssid, 0);

usr/src/uts/common/io/arn/arn_main.c

1493

if (ath9k_hw_keyisvalid(ah, (uint16_t)i))

usr/src/uts/common/io/arn/arn_main.c

1494

(void) ath9k_hw_keysetmac(ah, (uint16_t)i,

usr/src/uts/common/io/arn/arn_main.c

1507

(void) ath9k_hw_stoptxdma(ah, sc->sc_beaconq);

usr/src/uts/common/io/arn/arn_main.c

1559

(void) ath9k_hw_set_interrupts(ah, sc->sc_imask);

usr/src/uts/common/io/arn/arn_main.c

1881

struct ath_hal *ah = sc->sc_ah;

usr/src/uts/common/io/arn/arn_main.c

1888

(void) ath9k_hw_keyreset(ah, keyix);

usr/src/uts/common/io/arn/arn_main.c

1894

(void) ath9k_hw_keyreset(ah, keyix+32); /* RX key */

usr/src/uts/common/io/arn/arn_main.c

1932

struct ath_hal *ah = sc->sc_ah;

usr/src/uts/common/io/arn/arn_main.c

1940

return (ath9k_hw_set_keycache_entry(ah, k->wk_keyix, hk,

usr/src/uts/common/io/arn/arn_main.c

1950

return (ath9k_hw_set_keycache_entry(ah, k->wk_keyix, hk,

usr/src/uts/common/io/arn/arn_main.c

1958

if (!(ath9k_hw_set_keycache_entry(ah, k->wk_keyix, hk, NULL,

usr/src/uts/common/io/arn/arn_main.c

1969

return (ath9k_hw_set_keycache_entry(ah, k->wk_keyix, hk, mac, B_FALSE));

usr/src/uts/common/io/arn/arn_main.c

2022

struct ath_hal *ah = ((struct arn_softc *)ic)->sc_ah;

usr/src/uts/common/io/arn/arn_main.c

2025

(void) ath9k_hw_setslottime(ah, ATH9K_SLOT_TIME_9);

usr/src/uts/common/io/arn/arn_main.c

2027

(void) ath9k_hw_setslottime(ah, ATH9K_SLOT_TIME_20);

usr/src/uts/common/io/arn/arn_main.c

2159

struct ath_hal *ah = sc->sc_ah;

usr/src/uts/common/io/arn/arn_main.c

2180

(void) ath9k_hw_set_interrupts(ah, 0);

usr/src/uts/common/io/arn/arn_main.c

2185

(void) ath9k_hw_phy_disable(ah);

usr/src/uts/common/io/arn/arn_main.c

2314

struct ath_hal *ah = sc->sc_ah;

usr/src/uts/common/io/arn/arn_main.c

2319

rfilt = ath9k_hw_getrxfilter(ah);

usr/src/uts/common/io/arn/arn_main.c

2325

ath9k_hw_setrxfilter(ah, rfilt);

usr/src/uts/common/io/arn/arn_main.c

2336

struct ath_hal *ah = sc->sc_ah;

usr/src/uts/common/io/arn/arn_main.c

2359

ath9k_hw_setmcastfilter(ah, mfilt[0], mfilt[1]);

usr/src/uts/common/io/arn/arn_main.c

2369

struct ath_hal *ah = sc->sc_ah;

usr/src/uts/common/io/arn/arn_main.c

2379

(void) ath9k_hw_setmac(ah, sc->sc_isc.ic_macaddr);

usr/src/uts/common/io/arn/arn_main.c

250

arn_iowrite32(struct ath_hal *ah, uint32_t reg_offset, uint32_t val)

usr/src/uts/common/io/arn/arn_main.c

252

struct arn_softc *sc = ah->ah_sc;

usr/src/uts/common/io/arn/arn_main.c

253

if (ah->ah_config.serialize_regmode == SER_REG_MODE_ON) {

usr/src/uts/common/io/arn/arn_main.c

2556

struct ath_hal *ah;

usr/src/uts/common/io/arn/arn_main.c

2559

ah = sc->sc_ah;

usr/src/uts/common/io/arn/arn_main.c

2561

if (ath9k_hw_getcapability(ah, ATH9K_CAP_CIPHER,

usr/src/uts/common/io/arn/arn_main.c

2564

if (ath9k_hw_getcapability(ah, ATH9K_CAP_CIPHER,

usr/src/uts/common/io/arn/arn_main.c

2567

if (ath9k_hw_getcapability(ah, ATH9K_CAP_CIPHER,

usr/src/uts/common/io/arn/arn_main.c

2570

if (ath9k_hw_getcapability(ah, ATH9K_CAP_CIPHER,

usr/src/uts/common/io/arn/arn_main.c

2573

if (ath9k_hw_getcapability(ah, ATH9K_CAP_CIPHER,

usr/src/uts/common/io/arn/arn_main.c

265

arn_ioread32(struct ath_hal *ah, uint32_t reg_offset)

usr/src/uts/common/io/arn/arn_main.c

2655

struct ath_hal *ah = sc->sc_ah;

usr/src/uts/common/io/arn/arn_main.c

2659

(void) ath9k_hw_get_txq_props(ah, txq->axq_qnum, &qi);

usr/src/uts/common/io/arn/arn_main.c

268

struct arn_softc *sc = ah->ah_sc;

usr/src/uts/common/io/arn/arn_main.c

269

if (ah->ah_config.serialize_regmode == SER_REG_MODE_ON) {

usr/src/uts/common/io/arn/arn_main.c

2703

if (!ath9k_hw_set_txq_props(ah, txq->axq_qnum, &qi)) {

usr/src/uts/common/io/arn/arn_main.c

2710

(void) ath9k_hw_resettxqueue(ah, txq->axq_qnum);

usr/src/uts/common/io/arn/arn_main.c

2801

struct ath_hal *ah;

usr/src/uts/common/io/arn/arn_main.c

2871

ah = ath9k_hw_attach(device_id, sc, sc->mem, &status);

usr/src/uts/common/io/arn/arn_main.c

2872

if (ah == NULL) {

usr/src/uts/common/io/arn/arn_main.c

2878

sc->sc_ah = ah;

usr/src/uts/common/io/arn/arn_main.c

2880

ath9k_hw_getmac(ah, ic->ic_macaddr);

usr/src/uts/common/io/arn/arn_main.c

2883

sc->sc_keymax = ah->ah_caps.keycache_size;

usr/src/uts/common/io/arn/arn_main.c

2896

(void) ath9k_hw_keyreset(ah, (uint16_t)i);

usr/src/uts/common/io/arn/arn_main.c

2961

sc->sc_beaconq = arn_beaconq_setup(ah);

usr/src/uts/common/io/arn/arn_main.c

3014

if (ath9k_hw_getcapability(ah, ATH9K_CAP_CIPHER,

usr/src/uts/common/io/arn/arn_main.c

3035

if (ath9k_hw_getcapability(ah, ATH9K_CAP_CIPHER,

usr/src/uts/common/io/arn/arn_main.c

3037

ath9k_hw_getcapability(ah, ATH9K_CAP_CIPHER,

usr/src/uts/common/io/arn/arn_main.c

3039

ath9k_hw_getcapability(ah, ATH9K_CAP_TKIP_SPLIT,

usr/src/uts/common/io/arn/arn_main.c

3044

if (!ath9k_hw_getcapability(ah, ATH9K_CAP_MCAST_KEYSRCH, 0, NULL))

usr/src/uts/common/io/arn/arn_main.c

3045

(void) ath9k_hw_setcapability(ah, ATH9K_CAP_MCAST_KEYSRCH, 1,

usr/src/uts/common/io/arn/arn_main.c

3052

if (ah->ah_caps.hw_caps & ATH9K_HW_CAP_HT) {

usr/src/uts/common/io/arn/arn_main.c

3067

(void) ath9k_hw_setcapability(ah, ATH9K_CAP_DIVERSITY, 1, B_TRUE, NULL);

usr/src/uts/common/io/arn/arn_main.c

3068

sc->sc_defant = ath9k_hw_getdefantenna(ah);

usr/src/uts/common/io/arn/arn_main.c

3070

ath9k_hw_getmac(ah, sc->sc_myaddr);

usr/src/uts/common/io/arn/arn_main.c

3071

if (ah->ah_caps.hw_caps & ATH9K_HW_CAP_BSSIDMASK) {

usr/src/uts/common/io/arn/arn_main.c

3072

ath9k_hw_getbssidmask(ah, sc->sc_bssidmask);

usr/src/uts/common/io/arn/arn_main.c

3074

(void) ath9k_hw_setbssidmask(ah, sc->sc_bssidmask);

usr/src/uts/common/io/arn/arn_main.c

3079

(void) ath9k_hw_setslottime(ah, ATH9K_SLOT_TIME_9);

usr/src/uts/common/io/arn/arn_main.c

3245

arn_mac_bb_name(ah->ah_macVersion),

usr/src/uts/common/io/arn/arn_main.c

3246

ah->ah_macRev,

usr/src/uts/common/io/arn/arn_main.c

3247

arn_rf_name((ah->ah_analog5GhzRev & AR_RADIO_SREV_MAJOR)),

usr/src/uts/common/io/arn/arn_main.c

3248

ah->ah_phyRev,

usr/src/uts/common/io/arn/arn_main.c

3268

ath9k_hw_detach(ah);

usr/src/uts/common/io/arn/arn_main.c

3413

struct ath_hal *ah;

usr/src/uts/common/io/arn/arn_main.c

3417

if (sc == NULL || (ah = sc->sc_ah) == NULL)

usr/src/uts/common/io/arn/arn_main.c

3423

(void) ath9k_hw_set_interrupts(ah, 0);

usr/src/uts/common/io/arn/arn_main.c

3430

(void) ath9k_hw_stoptxdma(ah, sc->sc_txq[i].axq_qnum);

usr/src/uts/common/io/arn/arn_main.c

3436

ath9k_hw_stoppcurecv(ah);

usr/src/uts/common/io/arn/arn_main.c

3437

ath9k_hw_setrxfilter(ah, 0);

usr/src/uts/common/io/arn/arn_main.c

3438

(void) ath9k_hw_stopdmarecv(ah);

usr/src/uts/common/io/arn/arn_main.c

3444

(void) ath9k_hw_phy_disable(ah);

usr/src/uts/common/io/arn/arn_main.c

560

struct ath_hal *ah = sc->sc_ah;

usr/src/uts/common/io/arn/arn_main.c

564

(void) ath9k_hw_set_txpowerlimit(ah, sc->sc_config.txpowlimit);

usr/src/uts/common/io/arn/arn_main.c

566

(void) ath9k_hw_getcapability(ah, ATH9K_CAP_TXPOW, 1, &txpow);

usr/src/uts/common/io/arn/arn_main.c

678

struct ath_hal *ah = sc->sc_ah;

usr/src/uts/common/io/arn/arn_main.c

686

if (!ath9k_regd_init_channels(ah, ATH_CHAN_MAX, (uint32_t *)&nchan,

usr/src/uts/common/io/arn/arn_main.c

689

uint32_t rd = ah->ah_currentRD;

usr/src/uts/common/io/arn/arn_main.c

701

c = &ah->ah_channels[i];

usr/src/uts/common/io/arn/arn_main.c

703

index = ath9k_hw_mhz2ieee(ah, c->channel, c->channelFlags);

usr/src/uts/common/io/arn/arn_main.c

838

struct ath_hal *ah = sc->sc_ah;

usr/src/uts/common/io/arn/arn_main.c

863

(void) ath9k_hw_set_interrupts(ah, 0); /* disable interrupts */

usr/src/uts/common/io/arn/arn_main.c

881

if (!ath9k_hw_reset(ah, hchan, sc->tx_chan_width,

usr/src/uts/common/io/arn/arn_main.c

887

ath9k_hw_mhz2ieee(ah, hchan->channel,

usr/src/uts/common/io/arn/arn_main.c

918

(void) ath9k_hw_set_interrupts(ah, sc->sc_imask);

usr/src/uts/common/io/arn/arn_main.c

936

struct ath_hal *ah = sc->sc_ah;

usr/src/uts/common/io/arn/arn_main.c

972

ath9k_hw_reset_calvalid(ah, ah->ah_curchan,

usr/src/uts/common/io/arn/arn_main.c

990

ath9k_hw_ani_monitor(ah, &sc->sc_halstats,

usr/src/uts/common/io/arn/arn_main.c

991

ah->ah_curchan);

usr/src/uts/common/io/arn/arn_main.c

997

if (ath9k_hw_calibrate(ah, ah->ah_curchan,

usr/src/uts/common/io/arn/arn_phy.c

102

REG_WRITE(ah, AR_PHY(0x37), reg32);

usr/src/uts/common/io/arn/arn_phy.c

104

ah->ah_curchan = chan;

usr/src/uts/common/io/arn/arn_phy.c

106

AH5416(ah)->ah_curchanRadIndex = -1;

usr/src/uts/common/io/arn/arn_phy.c

112

ath9k_hw_ar9280_set_channel(struct ath_hal *ah,

usr/src/uts/common/io/arn/arn_phy.c

120

ath9k_hw_get_channel_centers(ah, chan, &centers);

usr/src/uts/common/io/arn/arn_phy.c

123

reg32 = REG_READ(ah, AR_PHY_SYNTH_CONTROL);

usr/src/uts/common/io/arn/arn_phy.c

134

txctl = REG_READ(ah, AR_PHY_CCK_TX_CTRL);

usr/src/uts/common/io/arn/arn_phy.c

137

REG_WRITE(ah, AR_PHY_CCK_TX_CTRL,

usr/src/uts/common/io/arn/arn_phy.c

140

REG_WRITE(ah, AR_PHY_CCK_TX_CTRL,

usr/src/uts/common/io/arn/arn_phy.c

158

REG_RMW_FIELD(ah, AR_AN_SYNTH9,

usr/src/uts/common/io/arn/arn_phy.c

173

REG_WRITE(ah, AR_PHY_SYNTH_CONTROL, reg32);

usr/src/uts/common/io/arn/arn_phy.c

175

ah->ah_curchan = chan;

usr/src/uts/common/io/arn/arn_phy.c

177

AH5416(ah)->ah_curchanRadIndex = -1;

usr/src/uts/common/io/arn/arn_phy.c

209

ath9k_hw_set_rf_regs(struct ath_hal *ah, struct ath9k_channel *chan,

usr/src/uts/common/io/arn/arn_phy.c

212

struct ath_hal_5416 *ahp = AH5416(ah);

usr/src/uts/common/io/arn/arn_phy.c

220

if (AR_SREV_9280_10_OR_LATER(ah))

usr/src/uts/common/io/arn/arn_phy.c

223

eepMinorRev = ath9k_hw_get_eeprom(ah, EEP_MINOR_REV);

usr/src/uts/common/io/arn/arn_phy.c

243

ob2GHz = ath9k_hw_get_eeprom(ah, EEP_OB_2);

usr/src/uts/common/io/arn/arn_phy.c

244

db2GHz = ath9k_hw_get_eeprom(ah, EEP_DB_2);

usr/src/uts/common/io/arn/arn_phy.c

250

ob5GHz = ath9k_hw_get_eeprom(ah, EEP_OB_5);

usr/src/uts/common/io/arn/arn_phy.c

251

db5GHz = ath9k_hw_get_eeprom(ah, EEP_DB_5);

usr/src/uts/common/io/arn/arn_phy.c

283

ath9k_hw_rfdetach(struct ath_hal *ah)

usr/src/uts/common/io/arn/arn_phy.c

285

struct ath_hal_5416 *ahp = AH5416(ah);

usr/src/uts/common/io/arn/arn_phy.c

29

ath9k_hw_write_regs(struct ath_hal *ah, uint32_t modesIndex, uint32_t freqIndex,

usr/src/uts/common/io/arn/arn_phy.c

32

struct ath_hal_5416 *ahp = AH5416(ah);

usr/src/uts/common/io/arn/arn_phy.c

336

ath9k_hw_init_rf(struct ath_hal *ah, int *status)

usr/src/uts/common/io/arn/arn_phy.c

338

struct ath_hal_5416 *ahp = AH5416(ah);

usr/src/uts/common/io/arn/arn_phy.c

340

if (!AR_SREV_9280_10_OR_LATER(ah)) {

usr/src/uts/common/io/arn/arn_phy.c

39

ath9k_hw_set_channel(struct ath_hal *ah, struct ath9k_channel *chan)

usr/src/uts/common/io/arn/arn_phy.c

404

ath9k_hw_decrease_chain_power(struct ath_hal *ah, struct ath9k_channel *chan)

usr/src/uts/common/io/arn/arn_phy.c

408

struct ath_hal_5416 *ahp = AH5416(ah);

usr/src/uts/common/io/arn/arn_phy.c

431

REG_WRITE(ah, AR_PHY_BASE + 0xD8, bank6SelMask);

usr/src/uts/common/io/arn/arn_phy.c

445

REG_WRITE(ah, AR_PHY_BASE + 0xD8, 0x00000053);

usr/src/uts/common/io/arn/arn_phy.c

447

REG_WRITE(ah, PHY_SWITCH_CHAIN_0,

usr/src/uts/common/io/arn/arn_phy.c

448

(REG_READ(ah, PHY_SWITCH_CHAIN_0) & ~0x38)

usr/src/uts/common/io/arn/arn_phy.c

449

| ((REG_READ(ah, PHY_SWITCH_CHAIN_0) >> 3) & 0x38));

usr/src/uts/common/io/arn/arn_phy.c

48

ath9k_hw_get_channel_centers(ah, chan, &centers);

usr/src/uts/common/io/arn/arn_phy.c

69

txctl = REG_READ(ah, AR_PHY_CCK_TX_CTRL);

usr/src/uts/common/io/arn/arn_phy.c

72

REG_WRITE(ah, AR_PHY_CCK_TX_CTRL,

usr/src/uts/common/io/arn/arn_phy.c

75

REG_WRITE(ah, AR_PHY_CCK_TX_CTRL,

usr/src/uts/common/io/arn/arn_phy.c

86

if (AR_SREV_9100(ah) || AR_SREV_9160_10_OR_LATER(ah))

usr/src/uts/common/io/arn/arn_phy.h

29

boolean_t ath9k_hw_ar9280_set_channel(struct ath_hal *ah,

usr/src/uts/common/io/arn/arn_phy.h

31

boolean_t ath9k_hw_set_channel(struct ath_hal *ah,

usr/src/uts/common/io/arn/arn_phy.h

33

void ath9k_hw_write_regs(struct ath_hal *ah, uint32_t modesIndex,

usr/src/uts/common/io/arn/arn_phy.h

35

boolean_t ath9k_hw_set_rf_regs(struct ath_hal *ah,

usr/src/uts/common/io/arn/arn_phy.h

37

void ath9k_hw_decrease_chain_power(struct ath_hal *ah,

usr/src/uts/common/io/arn/arn_phy.h

39

boolean_t ath9k_hw_init_rf(struct ath_hal *ah, int *status);

usr/src/uts/common/io/arn/arn_phy.h

529

REG_WRITE(ah, INI_RA((iniarray), r, 0), (regData)[r]); \

usr/src/uts/common/io/arn/arn_phy.h

536

#define ATH9K_IS_MIC_ENABLED(ah) \

usr/src/uts/common/io/arn/arn_phy.h

537

(AH5416(ah)->ah_staId1Defaults & AR_STA_ID1_CRPT_MIC_ENABLE)

usr/src/uts/common/io/arn/arn_recv.c

152

struct ath_hal *ah = sc->sc_ah;

usr/src/uts/common/io/arn/arn_recv.c

159

ath9k_hw_setrxfilter(ah, rfilt);

usr/src/uts/common/io/arn/arn_recv.c

162

if (ah->ah_caps.hw_caps & ATH9K_HW_CAP_BSSIDMASK)

usr/src/uts/common/io/arn/arn_recv.c

163

(void) ath9k_hw_setbssidmask(ah, sc->sc_bssidmask);

usr/src/uts/common/io/arn/arn_recv.c

166

ath9k_hw_setopmode(ah);

usr/src/uts/common/io/arn/arn_recv.c

169

(void) ath9k_hw_setmac(ah, sc->sc_myaddr);

usr/src/uts/common/io/arn/arn_recv.c

175

ath9k_hw_setmcastfilter(ah, mfilt[0], mfilt[1]);

usr/src/uts/common/io/arn/arn_recv.c

276

struct ath_hal *ah = sc->sc_ah;

usr/src/uts/common/io/arn/arn_recv.c

300

ath9k_hw_putrxbuf(ah, bf->bf_daddr);

usr/src/uts/common/io/arn/arn_recv.c

301

ath9k_hw_rxena(ah);

usr/src/uts/common/io/arn/arn_recv.c

306

ath9k_hw_startpcureceive(ah);

usr/src/uts/common/io/arn/arn_recv.c

314

struct ath_hal *ah = sc->sc_ah;

usr/src/uts/common/io/arn/arn_recv.c

317

ath9k_hw_stoppcurecv(ah);

usr/src/uts/common/io/arn/arn_recv.c

318

ath9k_hw_setrxfilter(ah, 0);

usr/src/uts/common/io/arn/arn_recv.c

319

stopped = ath9k_hw_stopdmarecv(ah);

usr/src/uts/common/io/arn/arn_recv.c

424

struct ath_hal *ah = sc->sc_ah;

usr/src/uts/common/io/arn/arn_recv.c

464

status = ath9k_hw_rxprocdesc(ah, ds,

usr/src/uts/common/io/arn/arn_recv.c

493

status = ath9k_hw_rxprocdesc(ah, tds, tbf->bf_daddr,

usr/src/uts/common/io/arn/arn_recv.c

679

sc->sc_lastrx = ath9k_hw_gettsf64(ah);

usr/src/uts/common/io/arn/arn_reg.h

1002

((AR_SREV_9100(ah)) ? (AR_RTC_BASE + 0x0054) : 0x7054)

usr/src/uts/common/io/arn/arn_reg.h

1005

((AR_SREV_9100(ah)) ? (AR_RTC_BASE + 0x0058) : 0x7058)

usr/src/uts/common/io/arn/arn_reg.h

721

((AR_SREV_9100(ah)) ? 0x0600 : 0x4020)

usr/src/uts/common/io/arn/arn_reg.h

724

((AR_SREV_9100(ah)) ? 0x00000FFF : 0x000000FF)

usr/src/uts/common/io/arn/arn_reg.h

786

(AR_SREV_9280(ah) && ((_ah)->ah_macRev == AR_SREV_REVISION_9285_11))

usr/src/uts/common/io/arn/arn_reg.h

789

(AR_SREV_9285(ah) && ((_ah)->ah_macRev >= AR_SREV_REVISION_9285_11)))

usr/src/uts/common/io/arn/arn_reg.h

791

(AR_SREV_9280(ah) && ((_ah)->ah_macRev == AR_SREV_REVISION_9285_12))

usr/src/uts/common/io/arn/arn_reg.h

794

(AR_SREV_9285(ah) && ((_ah)->ah_macRev >= AR_SREV_REVISION_9285_12)))

usr/src/uts/common/io/arn/arn_reg.h

952

(AR_SREV_9100(ah)) ? (AR_RTC_BASE + 0x0000) : 0x7000

usr/src/uts/common/io/arn/arn_reg.h

960

(AR_SREV_9100(ah)) ? (AR_RTC_BASE + 0x0014) : 0x7014

usr/src/uts/common/io/arn/arn_reg.h

972

((AR_SREV_9100(ah)) ? (AR_RTC_BASE + 0x0040) : 0x7040)

usr/src/uts/common/io/arn/arn_reg.h

976

((AR_SREV_9100(ah)) ? (AR_RTC_BASE + 0x0044) : 0x7044)

usr/src/uts/common/io/arn/arn_reg.h

979

((AR_SREV_9100(ah)) ? 0x0000003f : 0x0000000f)

usr/src/uts/common/io/arn/arn_reg.h

989

((AR_SREV_9100(ah)) ? (AR_RTC_BASE + 0x0048) : 0x7048)

usr/src/uts/common/io/arn/arn_reg.h

993

((AR_SREV_9100(ah)) ? (AR_RTC_BASE + 0x004c) : 0x704c)

usr/src/uts/common/io/arn/arn_reg.h

999

((AR_SREV_9100(ah)) ? (AR_RTC_BASE + 0x0050) : 0x7050)

usr/src/uts/common/io/arn/arn_regd.c

100

regcap = ah->ah_caps.reg_cap;

usr/src/uts/common/io/arn/arn_regd.c

1002

if (ah->ah_countryCode == CTRY_DEFAULT && isWwrSKU(ah)) {

usr/src/uts/common/io/arn/arn_regd.c

1010

ichan = ath9k_regd_check_channel(ah, chan);

usr/src/uts/common/io/arn/arn_regd.c

1028

ath9k_regd_get_current_country(struct ath_hal *ah,

usr/src/uts/common/io/arn/arn_regd.c

1031

uint16_t rd = ath9k_regd_get_eepromRD(ah);

usr/src/uts/common/io/arn/arn_regd.c

1037

ctry->isMultidomain = isWwrSKU(ah);

usr/src/uts/common/io/arn/arn_regd.c

1039

ctry->countryCode = ah->ah_countryCode;

usr/src/uts/common/io/arn/arn_regd.c

1040

ctry->regDmnEnum = ah->ah_currentRD;

usr/src/uts/common/io/arn/arn_regd.c

1041

ctry->regDmn5G = ah->ah_currentRD5G;

usr/src/uts/common/io/arn/arn_regd.c

1042

ctry->regDmn2G = ah->ah_currentRD2G;

usr/src/uts/common/io/arn/arn_regd.c

1043

ctry->iso[0] = ah->ah_iso[0];

usr/src/uts/common/io/arn/arn_regd.c

1044

ctry->iso[1] = ah->ah_iso[1];

usr/src/uts/common/io/arn/arn_regd.c

1045

ctry->iso[2] = ah->ah_iso[2];

usr/src/uts/common/io/arn/arn_regd.c

109

ath9k_regd_is_ccode_valid(struct ath_hal *ah, uint16_t cc)

usr/src/uts/common/io/arn/arn_regd.c

119

rd = ath9k_regd_get_eepromRD(ah);

usr/src/uts/common/io/arn/arn_regd.c

146

ath9k_regd_get_wmodes_nreg(struct ath_hal *ah,

usr/src/uts/common/io/arn/arn_regd.c

152

bcopy(ah->ah_caps.wireless_modes, modes_allowed,

usr/src/uts/common/io/arn/arn_regd.c

153

sizeof (ah->ah_caps.wireless_modes));

usr/src/uts/common/io/arn/arn_regd.c

155

if (is_set(ATH9K_MODE_11G, ah->ah_caps.wireless_modes) &&

usr/src/uts/common/io/arn/arn_regd.c

159

if (is_set(ATH9K_MODE_11A, ah->ah_caps.wireless_modes) &&

usr/src/uts/common/io/arn/arn_regd.c

163

if (is_set(ATH9K_MODE_11NG_HT20, ah->ah_caps.wireless_modes) &&

usr/src/uts/common/io/arn/arn_regd.c

167

if (is_set(ATH9K_MODE_11NA_HT20, ah->ah_caps.wireless_modes) &&

usr/src/uts/common/io/arn/arn_regd.c

171

if (is_set(ATH9K_MODE_11NG_HT40PLUS, ah->ah_caps.wireless_modes) &&

usr/src/uts/common/io/arn/arn_regd.c

175

if (is_set(ATH9K_MODE_11NG_HT40MINUS, ah->ah_caps.wireless_modes) &&

usr/src/uts/common/io/arn/arn_regd.c

179

if (is_set(ATH9K_MODE_11NA_HT40PLUS, ah->ah_caps.wireless_modes) &&

usr/src/uts/common/io/arn/arn_regd.c

183

if (is_set(ATH9K_MODE_11NA_HT40MINUS, ah->ah_caps.wireless_modes) &&

usr/src/uts/common/io/arn/arn_regd.c

189

ath9k_regd_is_public_safety_sku(struct ath_hal *ah)

usr/src/uts/common/io/arn/arn_regd.c

193

rd = ath9k_regd_get_eepromRD(ah);

usr/src/uts/common/io/arn/arn_regd.c

201

if (ah->ah_countryCode == CTRY_UNITED_STATES_FCC49)

usr/src/uts/common/io/arn/arn_regd.c

221

ath9k_regd_get_default_country(struct ath_hal *ah)

usr/src/uts/common/io/arn/arn_regd.c

226

rd = ath9k_regd_get_eepromRD(ah);

usr/src/uts/common/io/arn/arn_regd.c

278

ath9k_regd_get_wmode_regdomain(struct ath_hal *ah, int regDmn,

usr/src/uts/common/io/arn/arn_regd.c

289

rdnum = ath9k_regd_get_eepromRD(ah);

usr/src/uts/common/io/arn/arn_regd.c

382

ath9k_regd_get_eeprom_reg_ext_bits(struct ath_hal *ah,

usr/src/uts/common/io/arn/arn_regd.c

385

return ((ah->ah_currentRDExt & (1 << bit)) ? B_TRUE : B_FALSE);

usr/src/uts/common/io/arn/arn_regd.c

412

ath9k_regd_is_chan_present(struct ath_hal *ah, uint16_t c)

usr/src/uts/common/io/arn/arn_regd.c

417

if (!ah->ah_channels[i].channel)

usr/src/uts/common/io/arn/arn_regd.c

419

else if (ah->ah_channels[i].channel == c)

usr/src/uts/common/io/arn/arn_regd.c

429

struct ath_hal *ah,

usr/src/uts/common/io/arn/arn_regd.c

455

!(ah->ah_caps.hw_caps & ATH9K_HW_CAP_CHAN_HALFRATE)) {

usr/src/uts/common/io/arn/arn_regd.c

463

!(ah->ah_caps.hw_caps & ATH9K_HW_CAP_CHAN_QUARTERRATE)) {

usr/src/uts/common/io/arn/arn_regd.c

483

if ((rd->flags & NO_HOSTAP) && (ah->ah_opmode == ATH9K_M_HOSTAP)) {

usr/src/uts/common/io/arn/arn_regd.c

490

!(ath9k_regd_get_eeprom_reg_ext_bits(ah, REG_EXT_FCC_DFS_HT40)) &&

usr/src/uts/common/io/arn/arn_regd.c

499

!(ath9k_regd_get_eeprom_reg_ext_bits(ah,

usr/src/uts/common/io/arn/arn_regd.c

508

!(ath9k_regd_get_eeprom_reg_ext_bits(ah, REG_EXT_JAPAN_DFS_HT40)) &&

usr/src/uts/common/io/arn/arn_regd.c

54

ath9k_regd_get_eepromRD(struct ath_hal *ah)

usr/src/uts/common/io/arn/arn_regd.c

548

uint32_t regcap = ah->ah_caps.reg_cap;

usr/src/uts/common/io/arn/arn_regd.c

56

return (ah->ah_currentRD & ~WORLDWIDE_ROAMING_FLAG);

usr/src/uts/common/io/arn/arn_regd.c

574

ret = ath9k_regd_is_chan_present(ah, c);

usr/src/uts/common/io/arn/arn_regd.c

576

chan = &ah->ah_channels[pos];

usr/src/uts/common/io/arn/arn_regd.c

586

chan = &ah->ah_channels[ret];

usr/src/uts/common/io/arn/arn_regd.c

604

ath9k_regd_japan_check(struct ath_hal *ah, int b, struct regDomain *rd5GHz)

usr/src/uts/common/io/arn/arn_regd.c

612

regcap = ah->ah_caps.reg_cap;

usr/src/uts/common/io/arn/arn_regd.c

633

struct ath_hal *ah,

usr/src/uts/common/io/arn/arn_regd.c

647

struct ath9k_channel *ichans = &ah->ah_channels[0];

usr/src/uts/common/io/arn/arn_regd.c

662

if (!ath9k_regd_is_ccode_valid(ah, cc)) {

usr/src/uts/common/io/arn/arn_regd.c

668

if (!ath9k_regd_is_eeprom_valid(ah)) {

usr/src/uts/common/io/arn/arn_regd.c

674

ah->ah_countryCode = ath9k_regd_get_default_country(ah);

usr/src/uts/common/io/arn/arn_regd.c

676

if (ah->ah_countryCode == CTRY_DEFAULT) {

usr/src/uts/common/io/arn/arn_regd.c

677

ah->ah_countryCode = cc & COUNTRY_CODE_MASK;

usr/src/uts/common/io/arn/arn_regd.c

678

if ((ah->ah_countryCode == CTRY_DEFAULT) &&

usr/src/uts/common/io/arn/arn_regd.c

679

(ath9k_regd_get_eepromRD(ah) == CTRY_DEFAULT)) {

usr/src/uts/common/io/arn/arn_regd.c

680

ah->ah_countryCode = CTRY_UNITED_STATES;

usr/src/uts/common/io/arn/arn_regd.c

685

if (ah->ah_countryCode == CTRY_DEFAULT) {

usr/src/uts/common/io/arn/arn_regd.c

686

regdmn = ath9k_regd_get_eepromRD(ah);

usr/src/uts/common/io/arn/arn_regd.c

690

country = ath9k_regd_find_country(ah->ah_countryCode);

usr/src/uts/common/io/arn/arn_regd.c

695

ah->ah_countryCode));

usr/src/uts/common/io/arn/arn_regd.c

701

if (((ath9k_regd_get_eepromRD(ah) &

usr/src/uts/common/io/arn/arn_regd.c

704

if (!isWwrSKU_NoMidband(ah) &&

usr/src/uts/common/io/arn/arn_regd.c

705

ath9k_regd_is_fcc_midband_supported(ah))

usr/src/uts/common/io/arn/arn_regd.c

715

if (!ath9k_regd_get_wmode_regdomain(ah, regdmn,

usr/src/uts/common/io/arn/arn_regd.c

72

ath9k_regd_is_eeprom_valid(struct ath_hal *ah)

usr/src/uts/common/io/arn/arn_regd.c

720

ah->ah_countryCode));

usr/src/uts/common/io/arn/arn_regd.c

723

if (!ath9k_regd_get_wmode_regdomain(ah, regdmn,

usr/src/uts/common/io/arn/arn_regd.c

728

ah->ah_countryCode));

usr/src/uts/common/io/arn/arn_regd.c

732

if (!isWwrSKU(ah) && ((rd5GHz.regDmnEnum == FCC1) ||

usr/src/uts/common/io/arn/arn_regd.c

734

if (ath9k_regd_is_fcc_midband_supported(ah)) {

usr/src/uts/common/io/arn/arn_regd.c

735

if (!ath9k_regd_get_wmode_regdomain(ah,

usr/src/uts/common/io/arn/arn_regd.c

74

uint16_t rd = ath9k_regd_get_eepromRD(ah);

usr/src/uts/common/io/arn/arn_regd.c

741

ah->ah_countryCode));

usr/src/uts/common/io/arn/arn_regd.c

748

modes_avail = ah->ah_caps.wireless_modes;

usr/src/uts/common/io/arn/arn_regd.c

750

ath9k_regd_get_wmodes_nreg(ah, country, &rd5GHz, modes_allowed);

usr/src/uts/common/io/arn/arn_regd.c

759

if (maxchans > ARRAY_SIZE(ah->ah_channels))

usr/src/uts/common/io/arn/arn_regd.c

760

maxchans = ARRAY_SIZE(ah->ah_channels);

usr/src/uts/common/io/arn/arn_regd.c

775

if (!ath9k_get_channel_edges(ah, cm->flags, &c_lo, &c_hi)) {

usr/src/uts/common/io/arn/arn_regd.c

834

if (ath9k_regd_japan_check(ah,

usr/src/uts/common/io/arn/arn_regd.c

864

if (ath9k_regd_add_channel(ah,

usr/src/uts/common/io/arn/arn_regd.c

885

if (next > ARRAY_SIZE(ah->ah_channels)) {

usr/src/uts/common/io/arn/arn_regd.c

889

next, (int)ARRAY_SIZE(ah->ah_channels)));

usr/src/uts/common/io/arn/arn_regd.c

890

next = ARRAY_SIZE(ah->ah_channels);

usr/src/uts/common/io/arn/arn_regd.c

898

ah->ah_nchan = next;

usr/src/uts/common/io/arn/arn_regd.c

905

ah->ah_channels[i].channel,

usr/src/uts/common/io/arn/arn_regd.c

906

ah->ah_channels[i].channelFlags));

usr/src/uts/common/io/arn/arn_regd.c

911

ah->ah_countryCode = ah->ah_countryCode;

usr/src/uts/common/io/arn/arn_regd.c

913

ah->ah_currentRDInUse = (uint16_t)regdmn; /* LINT */

usr/src/uts/common/io/arn/arn_regd.c

914

ah->ah_currentRD5G = rd5GHz.regDmnEnum;

usr/src/uts/common/io/arn/arn_regd.c

915

ah->ah_currentRD2G = rd2GHz.regDmnEnum;

usr/src/uts/common/io/arn/arn_regd.c

917

ah->ah_iso[0] = 0;

usr/src/uts/common/io/arn/arn_regd.c

918

ah->ah_iso[1] = 0;

usr/src/uts/common/io/arn/arn_regd.c

920

ah->ah_iso[0] = country->isoName[0];

usr/src/uts/common/io/arn/arn_regd.c

921

ah->ah_iso[1] = country->isoName[1];

usr/src/uts/common/io/arn/arn_regd.c

928

ath9k_regd_check_channel(struct ath_hal *ah, const struct ath9k_channel *c)

usr/src/uts/common/io/arn/arn_regd.c

939

cc = ah->ah_curchan;

usr/src/uts/common/io/arn/arn_regd.c

949

base = ah->ah_channels;

usr/src/uts/common/io/arn/arn_regd.c

950

n = ah->ah_nchan;

usr/src/uts/common/io/arn/arn_regd.c

96

ath9k_regd_is_fcc_midband_supported(struct ath_hal *ah)

usr/src/uts/common/io/arn/arn_regd.c

985

ath9k_regd_get_antenna_allowed(struct ath_hal *ah, struct ath9k_channel *chan)

usr/src/uts/common/io/arn/arn_regd.c

989

ichan = ath9k_regd_check_channel(ah, chan);

usr/src/uts/common/io/arn/arn_regd.c

997

ath9k_regd_get_ctl(struct ath_hal *ah, struct ath9k_channel *chan)

usr/src/uts/common/io/arn/arn_regd.h

418

void ath9k_regd_get_current_country(struct ath_hal *ah,

usr/src/uts/common/io/arn/arn_xmit.c

1294

struct ath_hal *ah = sc->sc_ah;

usr/src/uts/common/io/arn/arn_xmit.c

1349

if ((ah->ah_caps.hw_caps & ATH9K_HW_CAP_HT) && bf_isdata(bf)) {

usr/src/uts/common/io/arn/arn_xmit.c

1364

if (bf_isaggr(bf) && (bf->bf_al > ah->ah_caps.rts_aggr_limit))

usr/src/uts/common/io/arn/arn_xmit.c

1425

ath9k_hw_set11n_ratescenario(ah, ds, lastds, !bf_ispspoll(bf),

usr/src/uts/common/io/arn/arn_xmit.c

1430

ath9k_hw_set11n_burstduration(ah, ds, 8192);

usr/src/uts/common/io/arn/arn_xmit.c

1485

struct ath_hal *ah = sc->sc_ah;

usr/src/uts/common/io/arn/arn_xmit.c

1487

(void) ath9k_hw_stoptxdma(ah, txq->axq_qnum);

usr/src/uts/common/io/arn/arn_xmit.c

1492

ath9k_hw_gettxbuf(ah, txq->axq_qnum), txq->axq_link));

usr/src/uts/common/io/arn/arn_xmit.c

1501

struct ath_hal *ah = sc->sc_ah;

usr/src/uts/common/io/arn/arn_xmit.c

1512

npend += ath9k_hw_numtxpending(ah,

usr/src/uts/common/io/arn/arn_xmit.c

1523

if (!ath9k_hw_reset(ah,

usr/src/uts/common/io/arn/arn_xmit.c

1544

struct ath_hal *ah = sc->sc_ah;

usr/src/uts/common/io/arn/arn_xmit.c

1575

qnum = ath9k_hw_setuptxqueue(ah, qtype, &qi);

usr/src/uts/common/io/arn/arn_xmit.c

1587

(void) ath9k_hw_releasetxqueue(ah, qnum);

usr/src/uts/common/io/arn/arn_xmit.c

1711

struct ath_hal *ah = sc->sc_ah;

usr/src/uts/common/io/arn/arn_xmit.c

1727

(void) ath9k_hw_get_txq_props(ah, qnum, &qi);

usr/src/uts/common/io/arn/arn_xmit.c

1734

if (!ath9k_hw_set_txq_props(ah, qnum, &qi)) {

usr/src/uts/common/io/arn/arn_xmit.c

1739

(void) ath9k_hw_resettxqueue(ah, qnum); /* push to h/w */

usr/src/uts/common/io/arn/arn_xmit.c

1861

struct ath_hal *ah = sc->sc_ah;

usr/src/uts/common/io/arn/arn_xmit.c

1997

ath9k_hw_set11n_txdesc(ah, ds,

usr/src/uts/common/io/arn/arn_xmit.c

2013

(void) ath9k_hw_filltxdesc(ah, ds,

usr/src/uts/common/io/arn/arn_xmit.c

2027

(void) ath9k_hw_puttxbuf(ah, txq->axq_qnum, bf->bf_daddr);

usr/src/uts/common/io/arn/arn_xmit.c

2036

(void) ath9k_hw_txstart(ah, txq->axq_qnum);

usr/src/uts/common/io/arn/arn_xmit.c

2054

struct ath_hal *ah = sc->sc_ah;

usr/src/uts/common/io/arn/arn_xmit.c

2110

tsf = ath9k_hw_gettsf64(ah);

usr/src/uts/common/io/arn/arn_xmit.c

2188

struct ath_hal *ah = sc->sc_ah;

usr/src/uts/common/io/arn/arn_xmit.c

2209

status = ath9k_hw_txprocdesc(ah, ds);

usr/src/uts/common/io/ath/ath_aux.c

1010

ATH_HAL_INTRSET(ah, asc->asc_imask);

usr/src/uts/common/io/ath/ath_aux.c

115

struct ath_hal *ah = asc->asc_ah;

usr/src/uts/common/io/ath/ath_aux.c

118

rfilt = (ATH_HAL_GETRXFILTER(ah) & HAL_RX_FILTER_PHYERR)

usr/src/uts/common/io/ath/ath_aux.c

136

struct ath_hal *ah = asc->asc_ah;

usr/src/uts/common/io/ath/ath_aux.c

160

qnum = ATH_HAL_SETUPTXQUEUE(ah, HAL_TX_QUEUE_DATA, &qi);

usr/src/uts/common/io/ath/ath_aux.c

250

struct ath_hal *ah = asc->asc_ah;

usr/src/uts/common/io/ath/ath_aux.c

255

ATH_HAL_SETRXFILTER(ah, rfilt);

usr/src/uts/common/io/ath/ath_aux.c

256

ATH_HAL_SETOPMODE(ah);

usr/src/uts/common/io/ath/ath_aux.c

257

ATH_HAL_SETMCASTFILTER(ah, asc->asc_mcast_hash[0],

usr/src/uts/common/io/ath/ath_aux.c

301

struct ath_hal *ah = asc->asc_ah;

usr/src/uts/common/io/ath/ath_aux.c

309

if (!ath_hal_init_channels(ah, chans, IEEE80211_CHAN_MAX, &nchan,

usr/src/uts/common/io/ath/ath_aux.c

324

ix = ath_hal_mhz2ieee(ah, c->channel, c->channelFlags);

usr/src/uts/common/io/ath/ath_aux.c

398

struct ath_hal *ah = asc->asc_ah;

usr/src/uts/common/io/ath/ath_aux.c

406

(void) ATH_HAL_STOPTXDMA(ah, txq->axq_qnum);

usr/src/uts/common/io/ath/ath_aux.c

466

struct ath_hal *ah = asc->asc_ah;

usr/src/uts/common/io/ath/ath_aux.c

479

ATH_HAL_INTRSET(ah, 0); /* disable interrupts */

usr/src/uts/common/io/ath/ath_aux.c

489

if (!ATH_HAL_RESET(ah, (HAL_OPMODE)ic->ic_opmode,

usr/src/uts/common/io/ath/ath_aux.c

519

ATH_HAL_INTRSET(ah, asc->asc_imask);

usr/src/uts/common/io/ath/ath_aux.c

543

struct ath_hal *ah = asc->asc_ah;

usr/src/uts/common/io/ath/ath_aux.c

595

ATH_HAL_INTRSET(ah, 0);

usr/src/uts/common/io/ath/ath_aux.c

601

ATH_HAL_RESETTSF(ah);

usr/src/uts/common/io/ath/ath_aux.c

602

ATH_HAL_BEACONTIMERS(ah, &bs);

usr/src/uts/common/io/ath/ath_aux.c

604

ATH_HAL_INTRSET(ah, asc->asc_imask);

usr/src/uts/common/io/ath/ath_aux.c

606

ATH_HAL_INTRSET(ah, 0);

usr/src/uts/common/io/ath/ath_aux.c

607

ATH_HAL_BEACONINIT(ah, nexttbtt, in->in_intval);

usr/src/uts/common/io/ath/ath_aux.c

609

ATH_HAL_INTRSET(ah, asc->asc_imask);

usr/src/uts/common/io/ath/ath_aux.c

769

struct ath_hal *ah = asc->asc_ah;

usr/src/uts/common/io/ath/ath_aux.c

776

ATH_HAL_KEYRESET(ah, keyix);

usr/src/uts/common/io/ath/ath_aux.c

782

ATH_HAL_KEYRESET(ah, keyix+32); /* RX key */

usr/src/uts/common/io/ath/ath_aux.c

865

struct ath_hal *ah = asc->asc_ah;

usr/src/uts/common/io/ath/ath_aux.c

878

if (!ATH_HAL_KEYSET(ah, k->wk_keyix, hk, zerobssid))

usr/src/uts/common/io/ath/ath_aux.c

885

return (ATH_HAL_KEYSET(ah, k->wk_keyix+32, hk, mac));

usr/src/uts/common/io/ath/ath_aux.c

898

return (ATH_HAL_KEYSET(ah, k->wk_keyix, hk, mac));

usr/src/uts/common/io/ath/ath_aux.c

909

return (ATH_HAL_KEYSET(ah, k->wk_keyix, hk, zerobssid));

usr/src/uts/common/io/ath/ath_aux.c

932

struct ath_hal *ah = asc->asc_ah;

usr/src/uts/common/io/ath/ath_aux.c

956

return (ATH_HAL_KEYSET(ah, k->wk_keyix, &hk, mac));

usr/src/uts/common/io/ath/ath_aux.c

966

struct ath_hal *ah = ((ath_t *)ic)->asc_ah;

usr/src/uts/common/io/ath/ath_aux.c

969

ATH_HAL_SETSLOTTIME(ah, HAL_SLOT_TIME_9);

usr/src/uts/common/io/ath/ath_aux.c

971

ATH_HAL_SETSLOTTIME(ah, HAL_SLOT_TIME_20);

usr/src/uts/common/io/ath/ath_aux.c

978

struct ath_hal *ah = asc->asc_ah;

usr/src/uts/common/io/ath/ath_aux.c

990

ATH_HAL_INTRSET(ah, 0); /* disable interrupts */

usr/src/uts/common/io/ath/ath_aux.c

995

if (!ATH_HAL_RESET(ah, (HAL_OPMODE)ic->ic_opmode,

usr/src/uts/common/io/ath/ath_hal.h

1083

extern void ath_hal_process_noisefloor(struct ath_hal *ah);

usr/src/uts/common/io/ath/ath_hal.h

1274

#define ATH_HAL_HASRFSILENT(ah) \

usr/src/uts/common/io/ath/ath_hal.h

899

HAL_BOOL (*ah_releaseTxQueue) (struct ath_hal *ah, uint32_t q);

usr/src/uts/common/io/ath/ath_hal.h

900

HAL_BOOL (*ah_resetTxQueue) (struct ath_hal *ah, uint32_t q);

usr/src/uts/common/io/ath/ath_main.c

1023

tsf = ATH_HAL_GETTSF64(ah);

usr/src/uts/common/io/ath/ath_main.c

1099

struct ath_hal *ah = asc->asc_ah;

usr/src/uts/common/io/ath/ath_main.c

1118

status = ATH_HAL_TXPROCDESC(ah, ds, ts);

usr/src/uts/common/io/ath/ath_main.c

1275

struct ath_hal *ah = asc->asc_ah;

usr/src/uts/common/io/ath/ath_main.c

1297

ATH_HAL_SETLEDSTATE(ah, leds[nstate]); /* set LED */

usr/src/uts/common/io/ath/ath_main.c

1304

ATH_HAL_INTRSET(ah, asc->asc_imask &~ HAL_INT_GLOBAL);

usr/src/uts/common/io/ath/ath_main.c

1324

ATH_HAL_SETRXFILTER(ah, rfilt);

usr/src/uts/common/io/ath/ath_main.c

1327

ATH_HAL_SETASSOCID(ah, bssid, in->in_associd);

usr/src/uts/common/io/ath/ath_main.c

1329

ATH_HAL_SETASSOCID(ah, bssid, 0);

usr/src/uts/common/io/ath/ath_main.c

1332

if (ATH_HAL_KEYISVALID(ah, i))

usr/src/uts/common/io/ath/ath_main.c

1333

ATH_HAL_KEYSETMAC(ah, i, bssid);

usr/src/uts/common/io/ath/ath_main.c

1343

ATH_HAL_INTRSET(ah, asc->asc_imask);

usr/src/uts/common/io/ath/ath_main.c

1378

struct ath_hal *ah = asc->asc_ah;

usr/src/uts/common/io/ath/ath_main.c

1383

if (ATH_HAL_GETRFGAIN(ah) == HAL_RFGAIN_NEED_CHANGE) {

usr/src/uts/common/io/ath/ath_main.c

1393

if (!ATH_HAL_CALIBRATE(ah, &asc->asc_curchan, &iqcaldone)) {

usr/src/uts/common/io/ath/ath_main.c

1454

struct ath_hal *ah = asc->asc_ah;

usr/src/uts/common/io/ath/ath_main.c

1469

if (!ATH_HAL_INTRPEND(ah)) { /* shared irq, not for us */

usr/src/uts/common/io/ath/ath_main.c

1474

ATH_HAL_GETISR(ah, &status);

usr/src/uts/common/io/ath/ath_main.c

1489

ATH_HAL_UPDATETXTRIGLEVEL(ah, AH_TRUE);

usr/src/uts/common/io/ath/ath_main.c

1562

struct ath_hal *ah = asc->asc_ah;

usr/src/uts/common/io/ath/ath_main.c

1587

ATH_HAL_INTRSET(ah, 0);

usr/src/uts/common/io/ath/ath_main.c

1591

ATH_HAL_PHYDISABLE(ah);

usr/src/uts/common/io/ath/ath_main.c

1602

struct ath_hal *ah = asc->asc_ah;

usr/src/uts/common/io/ath/ath_main.c

1606

ATH_HAL_SETPOWER(ah, HAL_PM_AWAKE);

usr/src/uts/common/io/ath/ath_main.c

1615

struct ath_hal *ah = asc->asc_ah;

usr/src/uts/common/io/ath/ath_main.c

1629

if (!ATH_HAL_RESET(ah, (HAL_OPMODE)ic->ic_opmode,

usr/src/uts/common/io/ath/ath_main.c

1645

ATH_HAL_INTRSET(ah, asc->asc_imask);

usr/src/uts/common/io/ath/ath_main.c

1688

struct ath_hal *ah = asc->asc_ah;

usr/src/uts/common/io/ath/ath_main.c

1697

ATH_HAL_SETMAC(ah, asc->asc_isc.ic_macaddr);

usr/src/uts/common/io/ath/ath_main.c

1708

struct ath_hal *ah = asc->asc_ah;

usr/src/uts/common/io/ath/ath_main.c

1712

rfilt = ATH_HAL_GETRXFILTER(ah);

usr/src/uts/common/io/ath/ath_main.c

1718

ATH_HAL_SETRXFILTER(ah, rfilt);

usr/src/uts/common/io/ath/ath_main.c

1728

struct ath_hal *ah = asc->asc_ah;

usr/src/uts/common/io/ath/ath_main.c

1751

ATH_HAL_SETMCASTFILTER(ah, mfilt[0], mfilt[1]);

usr/src/uts/common/io/ath/ath_main.c

1962

struct ath_hal *ah;

usr/src/uts/common/io/ath/ath_main.c

2053

ah = ath_hal_attach(device_id, asc, 0, regs, &status);

usr/src/uts/common/io/ath/ath_main.c

2054

if (ah == NULL) {

usr/src/uts/common/io/ath/ath_main.c

2061

ah->ah_macVersion, ah->ah_macRev,

usr/src/uts/common/io/ath/ath_main.c

2062

ah->ah_phyRev >> 4, ah->ah_phyRev & 0xf));

usr/src/uts/common/io/ath/ath_main.c

2063

ATH_HAL_INTRSET(ah, 0);

usr/src/uts/common/io/ath/ath_main.c

2064

asc->asc_ah = ah;

usr/src/uts/common/io/ath/ath_main.c

2066

if (ah->ah_abi != HAL_ABI_VERSION) {

usr/src/uts/common/io/ath/ath_main.c

2069

ah->ah_abi, HAL_ABI_VERSION));

usr/src/uts/common/io/ath/ath_main.c

2074

"HAL ABI version 0x%x\n", ah->ah_abi));

usr/src/uts/common/io/ath/ath_main.c

2077

ah->ah_macVersion, ah->ah_macRev,

usr/src/uts/common/io/ath/ath_main.c

2078

ah->ah_phyRev >> 4, ah->ah_phyRev & 0xf));

usr/src/uts/common/io/ath/ath_main.c

2079

if (ah->ah_analog5GhzRev)

usr/src/uts/common/io/ath/ath_main.c

2082

ah->ah_analog5GhzRev >> 4,

usr/src/uts/common/io/ath/ath_main.c

2083

ah->ah_analog5GhzRev & 0xf));

usr/src/uts/common/io/ath/ath_main.c

2084

if (ah->ah_analog2GhzRev)

usr/src/uts/common/io/ath/ath_main.c

2087

ah->ah_analog2GhzRev >> 4,

usr/src/uts/common/io/ath/ath_main.c

2088

ah->ah_analog2GhzRev & 0xf));

usr/src/uts/common/io/ath/ath_main.c

2097

asc->asc_mrretry = ATH_HAL_SETUPXTXDESC(ah, NULL, 0, 0, 0, 0, 0, 0);

usr/src/uts/common/io/ath/ath_main.c

2105

asc->asc_keymax = ATH_HAL_KEYCACHESIZE(ah);

usr/src/uts/common/io/ath/ath_main.c

2117

ATH_HAL_KEYRESET(ah, i);

usr/src/uts/common/io/ath/ath_main.c

2119

ATH_HAL_GETREGDOMAIN(ah, (uint32_t *)&ath_regdomain);

usr/src/uts/common/io/ath/ath_main.c

2120

ATH_HAL_GETCOUNTRYCODE(ah, &ath_countrycode);

usr/src/uts/common/io/ath/ath_main.c

2160

ATH_HAL_GETMAC(ah, ic->ic_macaddr);

usr/src/uts/common/io/ath/ath_main.c

2173

if (ATH_HAL_CIPHERSUPPORTED(ah, HAL_CIPHER_WEP))

usr/src/uts/common/io/ath/ath_main.c

2175

if (ATH_HAL_CIPHERSUPPORTED(ah, HAL_CIPHER_AES_OCB))

usr/src/uts/common/io/ath/ath_main.c

2177

if (ATH_HAL_CIPHERSUPPORTED(ah, HAL_CIPHER_AES_CCM)) {

usr/src/uts/common/io/ath/ath_main.c

2181

if (ATH_HAL_CIPHERSUPPORTED(ah, HAL_CIPHER_CKIP))

usr/src/uts/common/io/ath/ath_main.c

2183

if (ATH_HAL_CIPHERSUPPORTED(ah, HAL_CIPHER_TKIP)) {

usr/src/uts/common/io/ath/ath_main.c

2191

if (ATH_HAL_CIPHERSUPPORTED(ah, HAL_CIPHER_MIC)) {

usr/src/uts/common/io/ath/ath_main.c

2200

if (ATH_HAL_HASTKIPSPLIT(ah) ||

usr/src/uts/common/io/ath/ath_main.c

2201

!ATH_HAL_SETTKIPSPLIT(ah, AH_FALSE)) {

usr/src/uts/common/io/ath/ath_main.c

2207

asc->asc_hasclrkey = ATH_HAL_CIPHERSUPPORTED(ah, HAL_CIPHER_CLR);

usr/src/uts/common/io/ath/ath_main.c

2252

ATH_HAL_INTRSET(ah, 0);

usr/src/uts/common/io/ath/ath_main.c

2334

ah->ah_detach(asc->asc_ah);

usr/src/uts/common/io/ath/ath_main.c

2452

struct ath_hal *ah;

usr/src/uts/common/io/ath/ath_main.c

2457

if (asc == NULL || (ah = asc->asc_ah) == NULL)

usr/src/uts/common/io/ath/ath_main.c

2463

ATH_HAL_INTRSET(ah, 0);

usr/src/uts/common/io/ath/ath_main.c

2470

ATH_HAL_STOPTXDMA(ah, asc->asc_txq[i].axq_qnum);

usr/src/uts/common/io/ath/ath_main.c

2477

ATH_HAL_STOPPCURECV(ah);

usr/src/uts/common/io/ath/ath_main.c

2478

ATH_HAL_SETRXFILTER(ah, 0);

usr/src/uts/common/io/ath/ath_main.c

2479

ATH_HAL_STOPDMARECV(ah);

usr/src/uts/common/io/ath/ath_main.c

2485

ATH_HAL_PHYDISABLE(ah);

usr/src/uts/common/io/ath/ath_main.c

532

struct ath_hal *ah = asc->asc_ah;

usr/src/uts/common/io/ath/ath_main.c

564

status = ATH_HAL_RXPROCDESC(ah, ds,

usr/src/uts/common/io/ath/ath_main.c

643

ATH_HAL_RXMONITOR(ah, &hal_node_stats, &asc->asc_curchan);

usr/src/uts/common/io/ath/ath_main.c

674

struct ath_hal *ah = asc->asc_ah;

usr/src/uts/common/io/ath/ath_main.c

838

dur = ath_hal_computetxtime(ah, rt, IEEE80211_ACK_SIZE,

usr/src/uts/common/io/ath/ath_main.c

865

ctsduration += ath_hal_computetxtime(ah,

usr/src/uts/common/io/ath/ath_main.c

869

ctsduration += ath_hal_computetxtime(ah,

usr/src/uts/common/io/ath/ath_main.c

872

ctsduration += ath_hal_computetxtime(ah,

usr/src/uts/common/io/ath/ath_main.c

886

ATH_HAL_SETUPTXDESC(ah, ds,

usr/src/uts/common/io/ath/ath_main.c

915

ATH_HAL_SETUPXTXDESC(ah, ds,

usr/src/uts/common/io/ath/ath_main.c

922

ATH_HAL_FILLTXDESC(ah, ds,

usr/src/uts/common/io/ath/ath_main.c

933

ATH_HAL_PUTTXBUF(ah, txq->axq_qnum, bf->bf_daddr);

usr/src/uts/common/io/ath/ath_main.c

940

ATH_HAL_TXSTART(ah, txq->axq_qnum);

usr/src/uts/common/io/ath/ath_main.c

958

struct ath_hal *ah = asc->asc_ah;

usr/src/uts/common/io/ath/ath_osdep.c

64

ath_hal_printf(struct ath_hal *ah, const char *fmt, ...)

usr/src/uts/common/io/ath/ath_osdep.c

68

_NOTE(ARGUNUSED(ah))

usr/src/uts/common/io/ath/ath_rate.c

304

struct ath_hal *ah = asc->asc_ah;

usr/src/uts/common/io/ath/ath_rate.c

310

asc->asc_rates[mode] = ATH_HAL_GETRATETABLE(ah, HAL_MODE_11A);

usr/src/uts/common/io/ath/ath_rate.c

313

asc->asc_rates[mode] = ATH_HAL_GETRATETABLE(ah, HAL_MODE_11B);

usr/src/uts/common/io/ath/ath_rate.c

316

asc->asc_rates[mode] = ATH_HAL_GETRATETABLE(ah, HAL_MODE_11G);

usr/src/uts/common/io/ath/ath_rate.c

319

asc->asc_rates[mode] = ATH_HAL_GETRATETABLE(ah, HAL_MODE_TURBO);

usr/src/uts/common/io/ath/ath_rate.c

322

asc->asc_rates[mode] = ATH_HAL_GETRATETABLE(ah, HAL_MODE_108G);

usr/src/uts/common/io/chxge/ch.c

1005

*(ddi_acc_handle_t *)ah = ch_ah;

usr/src/uts/common/io/chxge/ch.c

1021

ch_free_dma_mem(ulong_t dh, ulong_t ah)

usr/src/uts/common/io/chxge/ch.c

1024

ddi_acc_handle_t ch_ah = (ddi_acc_handle_t)ah;

usr/src/uts/common/io/chxge/ch.c

883

ulong_t *dh, ulong_t *ah)

usr/src/uts/common/io/chxge/glue.c

367

ulong_t *dh, ulong_t *ah, uint32_t flg)

usr/src/uts/common/io/chxge/glue.c

375

mem = ch_alloc_dma_mem(chp, 1, DMA_4KALN|flg, len, &pa, dh, ah);

usr/src/uts/common/io/chxge/glue.c

391

ulong_t dh, ulong_t ah)

usr/src/uts/common/io/chxge/glue.c

393

ch_free_dma_mem(dh, ah);

usr/src/uts/common/io/hxge/hxge_impl.h

100

#define HPI_PCI_ACC_HANDLE_SET(hxgep, ah) (hxgep->hpi_pci_handle.regh = ah)

usr/src/uts/common/io/hxge/hxge_impl.h

103

#define HPI_ACC_HANDLE_SET(hxgep, ah) (hxgep->hpi_handle.regh = ah)

usr/src/uts/common/io/hxge/hxge_impl.h

111

#define HPI_REG_ACC_HANDLE_SET(hxgep, ah) (hxgep->hpi_reg_handle.regh = ah)

usr/src/uts/common/io/hxge/hxge_impl.h

119

#define HPI_MSI_ACC_HANDLE_SET(hxgep, ah) (hxgep->hpi_msi_handle.regh = ah)

usr/src/uts/common/io/hxge/hxge_impl.h

127

#define HPI_DMA_ACC_HANDLE_SET(dmap, ah) (dmap->hpi_handle.regh = ah)

usr/src/uts/common/io/ib/adapters/hermon/hermon_ci.c

570

hermon_ci_free_ah(ibc_hca_hdl_t hca, ibc_ah_hdl_t ah)

usr/src/uts/common/io/ib/adapters/hermon/hermon_ci.c

578

ahhdl = (hermon_ahhdl_t)ah;

usr/src/uts/common/io/ib/adapters/hermon/hermon_ci.c

593

hermon_ci_query_ah(ibc_hca_hdl_t hca, ibc_ah_hdl_t ah, ibc_pd_hdl_t *pd_p,

usr/src/uts/common/io/ib/adapters/hermon/hermon_ci.c

603

ahhdl = (hermon_ahhdl_t)ah;

usr/src/uts/common/io/ib/adapters/hermon/hermon_ci.c

624

hermon_ci_modify_ah(ibc_hca_hdl_t hca, ibc_ah_hdl_t ah, ibt_adds_vect_t *attr_p)

usr/src/uts/common/io/ib/adapters/hermon/hermon_ci.c

632

ahhdl = (hermon_ahhdl_t)ah;

usr/src/uts/common/io/ib/adapters/hermon/hermon_misc.c

492

hermon_ahhdl_t ah;

usr/src/uts/common/io/ib/adapters/hermon/hermon_misc.c

514

ah = (hermon_ahhdl_t)rsrc->hr_addr;

usr/src/uts/common/io/ib/adapters/hermon/hermon_misc.c

515

_NOTE(NOW_INVISIBLE_TO_OTHER_THREADS(*ah))

usr/src/uts/common/io/ib/adapters/hermon/hermon_misc.c

548

ah->ah_rsrcp = rsrc;

usr/src/uts/common/io/ib/adapters/hermon/hermon_misc.c

549

ah->ah_pdhdl = pd;

usr/src/uts/common/io/ib/adapters/hermon/hermon_misc.c

550

ah->ah_udav = udav;

usr/src/uts/common/io/ib/adapters/hermon/hermon_misc.c

551

ah->ah_save_guid = attr_p->av_dgid.gid_guid;

usr/src/uts/common/io/ib/adapters/hermon/hermon_misc.c

552

*ahhdl = ah;

usr/src/uts/common/io/ib/adapters/hermon/hermon_misc.c

568

hermon_ahhdl_t ah;

usr/src/uts/common/io/ib/adapters/hermon/hermon_misc.c

575

ah = *ahhdl;

usr/src/uts/common/io/ib/adapters/hermon/hermon_misc.c

576

mutex_enter(&ah->ah_lock);

usr/src/uts/common/io/ib/adapters/hermon/hermon_misc.c

577

rsrc = ah->ah_rsrcp;

usr/src/uts/common/io/ib/adapters/hermon/hermon_misc.c

578

pd = ah->ah_pdhdl;

usr/src/uts/common/io/ib/adapters/hermon/hermon_misc.c

579

mutex_exit(&ah->ah_lock);

usr/src/uts/common/io/ib/adapters/hermon/hermon_misc.c

580

_NOTE(NOW_INVISIBLE_TO_OTHER_THREADS(*ah))

usr/src/uts/common/io/ib/adapters/hermon/hermon_misc.c

583

kmem_free(ah->ah_udav, sizeof (hermon_hw_udav_t));

usr/src/uts/common/io/ib/adapters/hermon/hermon_misc.c

604

hermon_ah_query(hermon_state_t *state, hermon_ahhdl_t ah, hermon_pdhdl_t *pd,

usr/src/uts/common/io/ib/adapters/hermon/hermon_misc.c

607

mutex_enter(&ah->ah_lock);

usr/src/uts/common/io/ib/adapters/hermon/hermon_misc.c

613

*pd = ah->ah_pdhdl;

usr/src/uts/common/io/ib/adapters/hermon/hermon_misc.c

623

hermon_get_addr_path(state, (hermon_hw_addr_path_t *)ah->ah_udav,

usr/src/uts/common/io/ib/adapters/hermon/hermon_misc.c

626

attr_p->av_dgid.gid_guid = ah->ah_save_guid;

usr/src/uts/common/io/ib/adapters/hermon/hermon_misc.c

628

mutex_exit(&ah->ah_lock);

usr/src/uts/common/io/ib/adapters/hermon/hermon_misc.c

639

hermon_ah_modify(hermon_state_t *state, hermon_ahhdl_t ah,

usr/src/uts/common/io/ib/adapters/hermon/hermon_misc.c

651

mutex_enter(&ah->ah_lock);

usr/src/uts/common/io/ib/adapters/hermon/hermon_misc.c

654

bcopy(ah->ah_udav, &old_udav, sizeof (hermon_hw_udav_t));

usr/src/uts/common/io/ib/adapters/hermon/hermon_misc.c

669

(hermon_hw_addr_path_t *)ah->ah_udav, HERMON_ADDRPATH_UDAV);

usr/src/uts/common/io/ib/adapters/hermon/hermon_misc.c

671

mutex_exit(&ah->ah_lock);

usr/src/uts/common/io/ib/adapters/hermon/hermon_misc.c

674

ah->ah_save_guid = attr_p->av_dgid.gid_guid;

usr/src/uts/common/io/ib/adapters/hermon/hermon_misc.c

675

_NOTE(NOW_INVISIBLE_TO_OTHER_THREADS(*(ah->ah_udav)))

usr/src/uts/common/io/ib/adapters/hermon/hermon_misc.c

676

ah->ah_udav->sl = attr_p->av_srvl;

usr/src/uts/common/io/ib/adapters/hermon/hermon_misc.c

701

((uint64_t *)ah->ah_udav)[i] |= data_old;

usr/src/uts/common/io/ib/adapters/hermon/hermon_misc.c

708

ah->ah_udav->pd = old_udav.pd;

usr/src/uts/common/io/ib/adapters/hermon/hermon_misc.c

711

mutex_exit(&ah->ah_lock);

usr/src/uts/common/io/ib/adapters/hermon/hermon_rsrc.c

158

static int hermon_rsrc_ahhdl_constructor(void *ah, void *priv, int flags);

usr/src/uts/common/io/ib/adapters/hermon/hermon_rsrc.c

159

static void hermon_rsrc_ahhdl_destructor(void *ah, void *state);

usr/src/uts/common/io/ib/adapters/hermon/hermon_rsrc.c

2589

hermon_rsrc_ahhdl_constructor(void *ah, void *priv, int flags)

usr/src/uts/common/io/ib/adapters/hermon/hermon_rsrc.c

2594

ahhdl = (hermon_ahhdl_t)ah;

usr/src/uts/common/io/ib/adapters/hermon/hermon_rsrc.c

2609

hermon_rsrc_ahhdl_destructor(void *ah, void *priv)

usr/src/uts/common/io/ib/adapters/hermon/hermon_rsrc.c

2613

ahhdl = (hermon_ahhdl_t)ah;

usr/src/uts/common/io/ib/adapters/hermon/hermon_wr.c

1009

ah = (hermon_ahhdl_t)

usr/src/uts/common/io/ib/adapters/hermon/hermon_wr.c

1011

mutex_enter(&ah->ah_lock);

usr/src/uts/common/io/ib/adapters/hermon/hermon_wr.c

1012

maxstat = ah->ah_udav->max_stat_rate;

usr/src/uts/common/io/ib/adapters/hermon/hermon_wr.c

1014

signaled_dbd, maxstat, ah->ah_udav->rlid,

usr/src/uts/common/io/ib/adapters/hermon/hermon_wr.c

1015

qp, ah->ah_udav->sl);

usr/src/uts/common/io/ib/adapters/hermon/hermon_wr.c

1016

mutex_exit(&ah->ah_lock);

usr/src/uts/common/io/ib/adapters/hermon/hermon_wr.c

1312

hermon_ahhdl_t ah;

usr/src/uts/common/io/ib/adapters/hermon/hermon_wr.c

1374

ah = (hermon_ahhdl_t)dest->ud_ah;

usr/src/uts/common/io/ib/adapters/hermon/hermon_wr.c

1375

if (ah == NULL) {

usr/src/uts/common/io/ib/adapters/hermon/hermon_wr.c

1386

HERMON_WQE_BUILD_UD(qp, ud, ah, wr->wr.ud.udwr_dest);

usr/src/uts/common/io/ib/adapters/hermon/hermon_wr.c

1388

HERMON_WQE_BUILD_UD(qp, ud, ah,

usr/src/uts/common/io/ib/adapters/hermon/hermon_wr.c

159

ah = (hermon_ahhdl_t)dest->ud_ah;

usr/src/uts/common/io/ib/adapters/hermon/hermon_wr.c

160

if (ah == NULL) {

usr/src/uts/common/io/ib/adapters/hermon/hermon_wr.c

168

HERMON_WQE_BUILD_UD(qp, ud, ah, dest);

usr/src/uts/common/io/ib/adapters/hermon/hermon_wr.c

1683

hermon_ahhdl_t ah;

usr/src/uts/common/io/ib/adapters/hermon/hermon_wr.c

1707

ah = (hermon_ahhdl_t)wr->wr.ud.udwr_dest->ud_ah;

usr/src/uts/common/io/ib/adapters/hermon/hermon_wr.c

1708

if (ah == NULL) {

usr/src/uts/common/io/ib/adapters/hermon/hermon_wr.c

1711

mutex_enter(&ah->ah_lock);

usr/src/uts/common/io/ib/adapters/hermon/hermon_wr.c

1712

udav = ah->ah_udav;

usr/src/uts/common/io/ib/adapters/hermon/hermon_wr.c

1721

mutex_exit(&ah->ah_lock);

usr/src/uts/common/io/ib/adapters/hermon/hermon_wr.c

1781

mutex_exit(&ah->ah_lock);

usr/src/uts/common/io/ib/adapters/hermon/hermon_wr.c

1791

mutex_exit(&ah->ah_lock);

usr/src/uts/common/io/ib/adapters/hermon/hermon_wr.c

213

ah = (hermon_ahhdl_t)dest->ud_ah;

usr/src/uts/common/io/ib/adapters/hermon/hermon_wr.c

214

if (ah == NULL) {

usr/src/uts/common/io/ib/adapters/hermon/hermon_wr.c

222

HERMON_WQE_BUILD_UD(qp, ud, ah, dest);

usr/src/uts/common/io/ib/adapters/hermon/hermon_wr.c

238

ah = (hermon_ahhdl_t)dest->ud_ah;

usr/src/uts/common/io/ib/adapters/hermon/hermon_wr.c

239

if (ah == NULL) {

usr/src/uts/common/io/ib/adapters/hermon/hermon_wr.c

247

HERMON_WQE_BUILD_UD(qp, ud, ah, dest);

usr/src/uts/common/io/ib/adapters/hermon/hermon_wr.c

78

hermon_ahhdl_t ah;

usr/src/uts/common/io/ib/adapters/hermon/hermon_wr.c

784

hermon_ahhdl_t ah;

usr/src/uts/common/io/ib/adapters/tavor/tavor_ci.c

611

tavor_ci_free_ah(ibc_hca_hdl_t hca, ibc_ah_hdl_t ah)

usr/src/uts/common/io/ib/adapters/tavor/tavor_ci.c

623

if (ah == NULL) {

usr/src/uts/common/io/ib/adapters/tavor/tavor_ci.c

629

ahhdl = (tavor_ahhdl_t)ah;

usr/src/uts/common/io/ib/adapters/tavor/tavor_ci.c

647

tavor_ci_query_ah(ibc_hca_hdl_t hca, ibc_ah_hdl_t ah, ibc_pd_hdl_t *pd_p,

usr/src/uts/common/io/ib/adapters/tavor/tavor_ci.c

661

if (ah == NULL) {

usr/src/uts/common/io/ib/adapters/tavor/tavor_ci.c

667

ahhdl = (tavor_ahhdl_t)ah;

usr/src/uts/common/io/ib/adapters/tavor/tavor_ci.c

688

tavor_ci_modify_ah(ibc_hca_hdl_t hca, ibc_ah_hdl_t ah, ibt_adds_vect_t *attr_p)

usr/src/uts/common/io/ib/adapters/tavor/tavor_ci.c

700

if (ah == NULL) {

usr/src/uts/common/io/ib/adapters/tavor/tavor_ci.c

706

ahhdl = (tavor_ahhdl_t)ah;

usr/src/uts/common/io/ib/adapters/tavor/tavor_misc.c

118

ah = (tavor_ahhdl_t)rsrc->tr_addr;

usr/src/uts/common/io/ib/adapters/tavor/tavor_misc.c

119

_NOTE(NOW_INVISIBLE_TO_OTHER_THREADS(*ah))

usr/src/uts/common/io/ib/adapters/tavor/tavor_misc.c

196

ah->ah_udavrsrcp = udav;

usr/src/uts/common/io/ib/adapters/tavor/tavor_misc.c

197

ah->ah_rsrcp = rsrc;

usr/src/uts/common/io/ib/adapters/tavor/tavor_misc.c

198

ah->ah_pdhdl = pd;

usr/src/uts/common/io/ib/adapters/tavor/tavor_misc.c

199

ah->ah_mrhdl = mr;

usr/src/uts/common/io/ib/adapters/tavor/tavor_misc.c

200

ah->ah_save_guid = attr_p->av_dgid.gid_guid;

usr/src/uts/common/io/ib/adapters/tavor/tavor_misc.c

201

ah->ah_save_srate = attr_p->av_srate;

usr/src/uts/common/io/ib/adapters/tavor/tavor_misc.c

202

*ahhdl = ah;

usr/src/uts/common/io/ib/adapters/tavor/tavor_misc.c

205

ah->ah_sync = TAVOR_UDAV_IS_SYNC_REQ(state);

usr/src/uts/common/io/ib/adapters/tavor/tavor_misc.c

208

tavor_udav_sync(ah, udav->tr_addr, DDI_DMA_SYNC_FORDEV);

usr/src/uts/common/io/ib/adapters/tavor/tavor_misc.c

233

tavor_ahhdl_t ah;

usr/src/uts/common/io/ib/adapters/tavor/tavor_misc.c

241

ah = *ahhdl;

usr/src/uts/common/io/ib/adapters/tavor/tavor_misc.c

242

mutex_enter(&ah->ah_lock);

usr/src/uts/common/io/ib/adapters/tavor/tavor_misc.c

243

udav = ah->ah_udavrsrcp;

usr/src/uts/common/io/ib/adapters/tavor/tavor_misc.c

244

rsrc = ah->ah_rsrcp;

usr/src/uts/common/io/ib/adapters/tavor/tavor_misc.c

245

pd = ah->ah_pdhdl;

usr/src/uts/common/io/ib/adapters/tavor/tavor_misc.c

246

mr = ah->ah_mrhdl;

usr/src/uts/common/io/ib/adapters/tavor/tavor_misc.c

247

mutex_exit(&ah->ah_lock);

usr/src/uts/common/io/ib/adapters/tavor/tavor_misc.c

248

_NOTE(NOW_INVISIBLE_TO_OTHER_THREADS(*ah))

usr/src/uts/common/io/ib/adapters/tavor/tavor_misc.c

271

tavor_udav_sync(ah, udav->tr_addr, DDI_DMA_SYNC_FORDEV);

usr/src/uts/common/io/ib/adapters/tavor/tavor_misc.c

295

tavor_ah_query(tavor_state_t *state, tavor_ahhdl_t ah, tavor_pdhdl_t *pd,

usr/src/uts/common/io/ib/adapters/tavor/tavor_misc.c

304

mutex_enter(&ah->ah_lock);

usr/src/uts/common/io/ib/adapters/tavor/tavor_misc.c

311

udav = ah->ah_udavrsrcp;

usr/src/uts/common/io/ib/adapters/tavor/tavor_misc.c

312

*pd = ah->ah_pdhdl;

usr/src/uts/common/io/ib/adapters/tavor/tavor_misc.c

338

attr_p->av_dgid.gid_guid = ah->ah_save_guid;

usr/src/uts/common/io/ib/adapters/tavor/tavor_misc.c

339

attr_p->av_srate = ah->ah_save_srate;

usr/src/uts/common/io/ib/adapters/tavor/tavor_misc.c

341

mutex_exit(&ah->ah_lock);

usr/src/uts/common/io/ib/adapters/tavor/tavor_misc.c

352

tavor_ah_modify(tavor_state_t *state, tavor_ahhdl_t ah,

usr/src/uts/common/io/ib/adapters/tavor/tavor_misc.c

366

mutex_enter(&ah->ah_lock);

usr/src/uts/common/io/ib/adapters/tavor/tavor_misc.c

372

udav = ah->ah_udavrsrcp;

usr/src/uts/common/io/ib/adapters/tavor/tavor_misc.c

393

mutex_exit(&ah->ah_lock);

usr/src/uts/common/io/ib/adapters/tavor/tavor_misc.c

396

ah->ah_save_guid = attr_p->av_dgid.gid_guid;

usr/src/uts/common/io/ib/adapters/tavor/tavor_misc.c

397

ah->ah_save_srate = attr_p->av_srate;

usr/src/uts/common/io/ib/adapters/tavor/tavor_misc.c

410

tavor_udav_sync(ah, udav->tr_addr, DDI_DMA_SYNC_FORDEV);

usr/src/uts/common/io/ib/adapters/tavor/tavor_misc.c

453

tavor_udav_sync(ah, udav->tr_addr, DDI_DMA_SYNC_FORDEV);

usr/src/uts/common/io/ib/adapters/tavor/tavor_misc.c

465

tavor_udav_sync(ah, udav->tr_addr, DDI_DMA_SYNC_FORDEV);

usr/src/uts/common/io/ib/adapters/tavor/tavor_misc.c

467

mutex_exit(&ah->ah_lock);

usr/src/uts/common/io/ib/adapters/tavor/tavor_misc.c

478

tavor_udav_sync(tavor_ahhdl_t ah, tavor_hw_udav_t *udav, uint_t flag)

usr/src/uts/common/io/ib/adapters/tavor/tavor_misc.c

484

_NOTE(NOW_INVISIBLE_TO_OTHER_THREADS(*ah))

usr/src/uts/common/io/ib/adapters/tavor/tavor_misc.c

487

if (ah->ah_sync == 0) {

usr/src/uts/common/io/ib/adapters/tavor/tavor_misc.c

49

static void tavor_udav_sync(tavor_ahhdl_t ah, tavor_hw_udav_t *udav,

usr/src/uts/common/io/ib/adapters/tavor/tavor_misc.c

492

dmahdl = ah->ah_mrhdl->mr_bindinfo.bi_dmahdl;

usr/src/uts/common/io/ib/adapters/tavor/tavor_misc.c

79

tavor_ahhdl_t ah;

usr/src/uts/common/io/ib/adapters/tavor/tavor_rsrc.c

156

static int tavor_rsrc_ahhdl_constructor(void *ah, void *priv, int flags);

usr/src/uts/common/io/ib/adapters/tavor/tavor_rsrc.c

157

static void tavor_rsrc_ahhdl_destructor(void *ah, void *state);

usr/src/uts/common/io/ib/adapters/tavor/tavor_rsrc.c

2552

tavor_rsrc_ahhdl_constructor(void *ah, void *priv, int flags)

usr/src/uts/common/io/ib/adapters/tavor/tavor_rsrc.c

2557

ahhdl = (tavor_ahhdl_t)ah;

usr/src/uts/common/io/ib/adapters/tavor/tavor_rsrc.c

2573

tavor_rsrc_ahhdl_destructor(void *ah, void *priv)

usr/src/uts/common/io/ib/adapters/tavor/tavor_rsrc.c

2577

ahhdl = (tavor_ahhdl_t)ah;

usr/src/uts/common/io/ib/adapters/tavor/tavor_wr.c

1350

tavor_ahhdl_t ah;

usr/src/uts/common/io/ib/adapters/tavor/tavor_wr.c

1374

ah = (tavor_ahhdl_t)wr->wr.ud.udwr_dest->ud_ah;

usr/src/uts/common/io/ib/adapters/tavor/tavor_wr.c

1375

if (ah == NULL) {

usr/src/uts/common/io/ib/adapters/tavor/tavor_wr.c

1378

mutex_enter(&ah->ah_lock);

usr/src/uts/common/io/ib/adapters/tavor/tavor_wr.c

1381

data = ddi_get64(ah->ah_udavrsrcp->tr_acchdl,

usr/src/uts/common/io/ib/adapters/tavor/tavor_wr.c

1382

((uint64_t *)ah->ah_udavrsrcp->tr_addr + i));

usr/src/uts/common/io/ib/adapters/tavor/tavor_wr.c

1385

mutex_exit(&ah->ah_lock);

usr/src/uts/common/io/ib/adapters/tavor/tavor_wr.c

1576

tavor_ahhdl_t ah;

usr/src/uts/common/io/ib/adapters/tavor/tavor_wr.c

1645

ah = (tavor_ahhdl_t)prev_wr->wr.ud.udwr_dest->ud_ah;

usr/src/uts/common/io/ib/adapters/tavor/tavor_wr.c

1646

mutex_enter(&ah->ah_lock);

usr/src/uts/common/io/ib/adapters/tavor/tavor_wr.c

1649

data = ddi_get64(ah->ah_udavrsrcp->tr_acchdl,

usr/src/uts/common/io/ib/adapters/tavor/tavor_wr.c

1650

((uint64_t *)ah->ah_udavrsrcp->tr_addr + i));

usr/src/uts/common/io/ib/adapters/tavor/tavor_wr.c

1653

mutex_exit(&ah->ah_lock);

usr/src/uts/common/io/ib/adapters/tavor/tavor_wr.c

903

tavor_ahhdl_t ah;

usr/src/uts/common/io/ib/adapters/tavor/tavor_wr.c

953

ah = (tavor_ahhdl_t)wr->wr.ud.udwr_dest->ud_ah;

usr/src/uts/common/io/ib/adapters/tavor/tavor_wr.c

954

if (ah == NULL) {

usr/src/uts/common/io/ib/adapters/tavor/tavor_wr.c

963

mutex_enter(&ah->ah_lock);

usr/src/uts/common/io/ib/adapters/tavor/tavor_wr.c

964

TAVOR_WQE_BUILD_UD(qp, ud, ah, wr);

usr/src/uts/common/io/ib/adapters/tavor/tavor_wr.c

965

mutex_exit(&ah->ah_lock);

usr/src/uts/common/io/ib/clients/of/sol_uverbs/sol_uverbs.c

993

(void) ibt_free_ah(uctxt->hca->hdl, uah->ah);

usr/src/uts/common/io/ib/ibtl/ibtl_chan.c

1032

ibt_ah_hdl_t ah;

usr/src/uts/common/io/ib/ibtl/ibtl_chan.c

1041

retval = ibt_alloc_ah(hca_hdl, flags, pd, &adds_vect, &ah);

usr/src/uts/common/io/ib/ibtl/ibtl_chan.c

1049

ud_destp->ud_ah = ah;

usr/src/uts/common/io/ib/ibtl/ibtl_chan.c

1519

ibt_adds_vect_t *adds_vectp, ibt_ah_hdl_t *ah)

usr/src/uts/common/io/ib/ibtl/ibtl_chan.c

1530

IBTL_HCA2CIHCA(hca_hdl), flags, pd, adds_vectp, ah);

usr/src/uts/common/io/ib/ibtl/ibtl_chan.c

1561

ibt_free_ah(ibt_hca_hdl_t hca_hdl, ibt_ah_hdl_t ah)

usr/src/uts/common/io/ib/ibtl/ibtl_chan.c

1565

IBTF_DPRINTF_L3(ibtl_chan, "ibt_free_ah(%p, %p)", hca_hdl, ah);

usr/src/uts/common/io/ib/ibtl/ibtl_chan.c

1569

IBTL_HCA2CIHCA(hca_hdl), ah);

usr/src/uts/common/io/ib/ibtl/ibtl_chan.c

1599

ibt_query_ah(ibt_hca_hdl_t hca_hdl, ibt_ah_hdl_t ah, ibt_pd_hdl_t *pd,

usr/src/uts/common/io/ib/ibtl/ibtl_chan.c

1604

IBTF_DPRINTF_L3(ibtl_chan, "ibt_query_ah(%p, %p)", hca_hdl, ah);

usr/src/uts/common/io/ib/ibtl/ibtl_chan.c

1608

IBTL_HCA2CIHCA(hca_hdl), ah, pd, adds_vectp));

usr/src/uts/common/io/ib/ibtl/ibtl_chan.c

1651

ibt_modify_ah(ibt_hca_hdl_t hca_hdl, ibt_ah_hdl_t ah,

usr/src/uts/common/io/ib/ibtl/ibtl_chan.c

1654

IBTF_DPRINTF_L3(ibtl_chan, "ibt_modify_ah(%p, %p)", hca_hdl, ah);

usr/src/uts/common/io/ib/ibtl/ibtl_chan.c

1660

IBTL_HCA2CIHCA(hca_hdl), ah, adds_vectp));

usr/src/uts/common/io/mac/mac_util.c

2105

ah_t *ah = (ah_t *)(mp->b_rptr + skip_len);

usr/src/uts/common/io/mac/mac_util.c

2106

uint_t ah_length = AH_TOTAL_LEN(ah);

usr/src/uts/common/io/mac/mac_util.c

2108

if ((unsigned char *)ah + sizeof (ah_t) > mp->b_wptr)

usr/src/uts/common/io/mac/mac_util.c

2111

proto = ah->ah_nexthdr;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev_api.h

425

struct ecore_eth_stats_ah ah;

usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_l2.c

1955

struct ecore_eth_stats_ah *p_ah = &p_stats->ah;

usr/src/uts/common/os/sunndi.c

2233

ndi_set_acc_fault(ddi_acc_handle_t ah)

usr/src/uts/common/os/sunndi.c

2235

i_ddi_acc_set_fault(ah);

usr/src/uts/common/os/sunndi.c

2239

ndi_clr_acc_fault(ddi_acc_handle_t ah)

usr/src/uts/common/os/sunndi.c

2241

i_ddi_acc_clr_fault(ah);

usr/src/uts/common/sys/ib/adapters/hermon/hermon_hw.h

4765

#define HERMON_WQE_BUILD_UD(qp, ud, ah, dest) \

usr/src/uts/common/sys/ib/adapters/hermon/hermon_hw.h

4771

udav = (uint64_t *)(ah)->ah_udav; \

usr/src/uts/common/sys/ib/adapters/tavor/tavor_hw.h

2386

#define TAVOR_WQE_BUILD_UD(qp, ud, ah, wr) \

usr/src/uts/common/sys/ib/adapters/tavor/tavor_hw.h

2392

(uint64_t)(ah)->ah_mrhdl->mr_lkey); \

usr/src/uts/common/sys/ib/adapters/tavor/tavor_hw.h

2394

(ah)->ah_mrhdl->mr_bindinfo.bi_addr & \

usr/src/uts/common/sys/ib/clients/of/rdma/ib_user_verbs.h

618

uint32_t ah;

usr/src/uts/common/sys/ib/clients/of/sol_uverbs/sol_uverbs.h

243

ibt_ah_hdl_t ah;

usr/src/uts/common/sys/ib/ibtl/ibci.h

218

ibt_status_t (*ibc_free_ah)(ibc_hca_hdl_t hca, ibc_ah_hdl_t ah);

usr/src/uts/common/sys/ib/ibtl/ibci.h

219

ibt_status_t (*ibc_query_ah)(ibc_hca_hdl_t hca, ibc_ah_hdl_t ah,

usr/src/uts/common/sys/ib/ibtl/ibci.h

221

ibt_status_t (*ibc_modify_ah)(ibc_hca_hdl_t hca, ibc_ah_hdl_t ah,

usr/src/uts/common/sys/ib/ibtl/ibvti.h

106

ibt_status_t ibt_free_ah(ibt_hca_hdl_t hca_hdl, ibt_ah_hdl_t ah);

usr/src/uts/common/sys/ib/ibtl/ibvti.h

112

ibt_status_t ibt_query_ah(ibt_hca_hdl_t hca_hdl, ibt_ah_hdl_t ah,

usr/src/uts/common/sys/ib/ibtl/ibvti.h

119

ibt_status_t ibt_modify_ah(ibt_hca_hdl_t hca_hdl, ibt_ah_hdl_t ah,

usr/src/uts/common/sys/nxge/nxge_impl.h

157

#define NPI_PCI_ACC_HANDLE_SET(nxgep, ah) (nxgep->npi_pci_handle.regh = ah)

usr/src/uts/common/sys/nxge/nxge_impl.h

160

#define NPI_ACC_HANDLE_SET(nxgep, ah) (nxgep->npi_handle.regh = ah)

usr/src/uts/common/sys/nxge/nxge_impl.h

168

#define NPI_REG_ACC_HANDLE_SET(nxgep, ah) (nxgep->npi_reg_handle.regh = ah)

usr/src/uts/common/sys/nxge/nxge_impl.h

176

#define NPI_MSI_ACC_HANDLE_SET(nxgep, ah) (nxgep->npi_msi_handle.regh = ah)

usr/src/uts/common/sys/nxge/nxge_impl.h

179

#define NPI_VREG_ACC_HANDLE_SET(nxgep, ah) (nxgep->npi_vreg_handle.regh = ah)

usr/src/uts/common/sys/nxge/nxge_impl.h

187

#define NPI_V2REG_ACC_HANDLE_SET(nxgep, ah) (nxgep->npi_v2reg_handle.regh = ah)

usr/src/uts/common/sys/nxge/nxge_impl.h

208

#define NPI_DMA_ACC_HANDLE_SET(dmap, ah) (dmap->npi_handle.regh = ah)

usr/src/uts/common/sys/sunndi.h

794

void ndi_set_acc_fault(ddi_acc_handle_t ah);

usr/src/uts/common/sys/sunndi.h

795

void ndi_clr_acc_fault(ddi_acc_handle_t ah);

usr/src/uts/i86pc/io/pci/pci_prd_i86pc.c

104

ACPI_HANDLE ah;

usr/src/uts/i86pc/io/pci/pci_prd_i86pc.c

115

(ACPI_FAILURE(acpica_get_handle(dip, &ah))))

usr/src/uts/i86pc/io/pci/pci_prd_i86pc.c

118

(void) AcpiWalkResources(ah, "_CRS", acpi_wr_cb,

usr/src/uts/i86pc/io/psm/psm_common.c

369

psm_node_has_prt(ACPI_HANDLE *ah)

usr/src/uts/i86pc/io/psm/psm_common.c

380

if (ACPI_SUCCESS(acpica_eval_int(ah, "_STA", &sta)) &&

usr/src/uts/i86pc/io/psm/psm_common.c

384

return (AcpiGetHandle(ah, "_PRT", &rh) == AE_OK);

usr/src/uts/i86pc/os/biosdisk.c

181

rp.eflags, rp.eax.byte.ah));

usr/src/uts/i86pc/os/biosdisk.c

206

rp.eax.byte.ah = 0x8; /* get params */

usr/src/uts/i86pc/os/biosdisk.c

211

if (((rp.eflags & PS_C) != 0) || rp.eax.byte.ah != 0) {

usr/src/uts/i86pc/os/biosdisk.c

213

drivenum, rp.eflags, rp.eax.byte.ah));

usr/src/uts/i86pc/os/biosdisk.c

227

rp.eax.byte.ah = 0x0; /* reset disk */

usr/src/uts/i86pc/os/biosdisk.c

232

status = rp.eax.byte.ah;

usr/src/uts/i86pc/os/biosdisk.c

254

rp.eax.byte.ah = 0x2; /* Read disk */

usr/src/uts/i86pc/os/biosdisk.c

267

status = rp.eax.byte.ah;

usr/src/uts/i86pc/os/biosdisk.c

316

rp.eflags, rp.eax.byte.ah, bufp->drivenum));

usr/src/uts/i86pc/os/mlsetup.c

96

rp.eax.byte.ah = 0x0;