CHIP_REV_IS_ASIC
u8_t b_is_asic = CHIP_REV_IS_ASIC(pdev);
if (CHIP_REV_IS_ASIC(pdev))
if (CHIP_REV_IS_ASIC(pdev))
u32_t wait_ms = (CHIP_REV_IS_ASIC(pdev)) ? 200 : 200000;
u32_t wait_ms = (CHIP_REV_IS_ASIC(pdev)) ? 200 : 200000;
if (CHIP_REV_IS_ASIC(pdev))
u8_t b_enable_collect = HAS_MSTAT(pdev)? ((CHIP_REV_IS_EMUL(pdev) && (CHIP_BONDING(pdev) == 0)) || CHIP_REV_IS_ASIC(pdev)) : TRUE;
#define CHIP_REV_IS_ASIC(_p) (!CHIP_REV_IS_SLOW(_p))
#define DRV_PULSE_PERIOD_MS_FACTOR(_p) CHIP_REV_IS_ASIC(_p) ? DRV_PULSE_PERIOD_MS : (DRV_PULSE_PERIOD_MS*10)
if (CHIP_REV_IS_ASIC(p_hwfn->p_dev)) {
if (CHIP_REV_IS_ASIC(p_hwfn->p_dev))
if (CHIP_REV_IS_ASIC(p_hwfn->p_dev)) {
if (CHIP_REV_IS_ASIC(p_hwfn->p_dev) && ecore_mcp_is_init(p_hwfn)) {