XHRE
while (((inb(port + LSR) & XHRE) == 0) && checks--)
while ((INB(LSR) & XHRE) == 0) {
if (lsr & XHRE) {
if (INB(LSR) & XHRE) {
if (INB(LSR) & XHRE) {
if ((ss = async->async_flowc) != '\0' && (INB(LSR) & XHRE)) {