Symbol: CHELSIO_T5
usr/src/cmd/cxgbetool/cudbg_view.c
100
return (CHELSIO_CHIP_VERSION(chip) == CHELSIO_T5);
usr/src/cmd/cxgbetool/cudbg_view.c
1914
if (CHELSIO_CHIP_VERSION(chip) > CHELSIO_T5) {
usr/src/cmd/cxgbetool/cudbg_view.c
2057
if (CHELSIO_CHIP_VERSION(struct_rss_conf->chip) > CHELSIO_T5) {
usr/src/cmd/cxgbetool/cudbg_view.c
2087
if (CHELSIO_CHIP_VERSION(struct_rss_conf->chip) > CHELSIO_T5) {
usr/src/cmd/cxgbetool/cudbg_view.c
2107
if (CHELSIO_CHIP_VERSION(struct_rss_conf->chip) <= CHELSIO_T5) {
usr/src/cmd/cxgbetool/cudbg_view.c
2542
if (CHELSIO_CHIP_VERSION(chip) <= CHELSIO_T5)
usr/src/cmd/cxgbetool/cudbg_view.c
322
case CHELSIO_T5:
usr/src/cmd/cxgbetool/cudbg_view.c
3608
if (CHELSIO_CHIP_VERSION(chip) == CHELSIO_T5)
usr/src/cmd/cxgbetool/cudbg_view.c
3616
if (CHELSIO_CHIP_VERSION(chip) == CHELSIO_T5)
usr/src/cmd/cxgbetool/cudbg_view.c
4445
if (CHELSIO_CHIP_VERSION(chip) <= CHELSIO_T5)
usr/src/cmd/cxgbetool/cudbg_view.c
4453
if (CHELSIO_CHIP_VERSION(chip) <= CHELSIO_T5)
usr/src/cmd/cxgbetool/cudbg_view.c
4473
if (CHELSIO_CHIP_VERSION(chip) <= CHELSIO_T5)
usr/src/cmd/cxgbetool/cudbg_view.c
4481
if (CHELSIO_CHIP_VERSION(chip) <= CHELSIO_T5)
usr/src/cmd/cxgbetool/cudbg_view.c
4500
if (CHELSIO_CHIP_VERSION(chip) <= CHELSIO_T5)
usr/src/cmd/cxgbetool/cudbg_view.c
4508
if (CHELSIO_CHIP_VERSION(chip) <= CHELSIO_T5)
usr/src/cmd/cxgbetool/cudbg_view.c
4515
if (CHELSIO_CHIP_VERSION(chip) <= CHELSIO_T5) {
usr/src/uts/common/io/cxgbe/common/common.c
87
return (CHELSIO_CHIP_VERSION(chip) == CHELSIO_T5);
usr/src/uts/common/io/cxgbe/common/t4_chip_type.h
69
T5_A0 = CHELSIO_CHIP_CODE(CHELSIO_T5, 0),
usr/src/uts/common/io/cxgbe/common/t4_chip_type.h
70
T5_A1 = CHELSIO_CHIP_CODE(CHELSIO_T5, 1),
usr/src/uts/common/io/cxgbe/common/t4_hw.c
10004
case CHELSIO_T5:
usr/src/uts/common/io/cxgbe/common/t4_hw.c
10005
chip |= CHELSIO_CHIP_CODE(CHELSIO_T5, pl_rev);
usr/src/uts/common/io/cxgbe/common/t4_hw.c
10441
if (CHELSIO_CHIP_VERSION(adap->params.chip) > CHELSIO_T5) {
usr/src/uts/common/io/cxgbe/common/t4_hw.c
1165
case CHELSIO_T5:
usr/src/uts/common/io/cxgbe/common/t4_hw.c
12494
if (CHELSIO_CHIP_VERSION(adap->params.chip) <= CHELSIO_T5)
usr/src/uts/common/io/cxgbe/common/t4_hw.c
248
if (CHELSIO_CHIP_VERSION(adap->params.chip) <= CHELSIO_T5)
usr/src/uts/common/io/cxgbe/common/t4_hw.c
2987
case CHELSIO_T5:
usr/src/uts/common/io/cxgbe/common/t4_hw.c
3985
case CHELSIO_T5:
usr/src/uts/common/io/cxgbe/common/t4_hw.c
4840
if (CHELSIO_CHIP_VERSION(adapter->params.chip) >= CHELSIO_T5) {
usr/src/uts/common/io/cxgbe/common/t4_hw.c
4849
if (CHELSIO_CHIP_VERSION(adapter->params.chip) <= CHELSIO_T5)
usr/src/uts/common/io/cxgbe/common/t4_hw.c
5076
(chip_ver <= CHELSIO_T5) ?
usr/src/uts/common/io/cxgbe/common/t4_hw.c
5473
u32 pf = (CHELSIO_CHIP_VERSION(adapter->params.chip) <= CHELSIO_T5
usr/src/uts/common/io/cxgbe/common/t4_hw.c
5477
if (CHELSIO_CHIP_VERSION(adapter->params.chip) <= CHELSIO_T5)
usr/src/uts/common/io/cxgbe/common/t4_hw.c
5503
u32 pf = (CHELSIO_CHIP_VERSION(adapter->params.chip) <= CHELSIO_T5
usr/src/uts/common/io/cxgbe/common/t4_hw.c
5513
if (CHELSIO_CHIP_VERSION(adap->params.chip) <= CHELSIO_T5)
usr/src/uts/common/io/cxgbe/common/t4_hw.c
5897
if ((CHELSIO_CHIP_VERSION(adap->params.chip) > CHELSIO_T5) &&
usr/src/uts/common/io/cxgbe/common/t4_hw.c
5963
if (CHELSIO_CHIP_VERSION(adapter->params.chip) <= CHELSIO_T5) {
usr/src/uts/common/io/cxgbe/common/t4_hw.c
6601
case CHELSIO_T5:
usr/src/uts/common/io/cxgbe/common/t4_hw.c
6736
case CHELSIO_T5:
usr/src/uts/common/io/cxgbe/common/t4_hw.c
6864
if (CHELSIO_CHIP_VERSION(adap->params.chip) >= CHELSIO_T5) {
usr/src/uts/common/io/cxgbe/common/t4_hw.c
6899
if (CHELSIO_CHIP_VERSION(adap->params.chip) >= CHELSIO_T5) {
usr/src/uts/common/io/cxgbe/common/t4_hw.c
7214
case CHELSIO_T5:
usr/src/uts/common/io/cxgbe/common/t4_hw.c
7705
if (CHELSIO_CHIP_VERSION(adap->params.chip) <= CHELSIO_T5)
usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c
1022
if (CHELSIO_CHIP_VERSION(padap->params.chip) <= CHELSIO_T5) {
usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c
1127
if (CHELSIO_CHIP_VERSION(padap->params.chip) > CHELSIO_T5)
usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c
1144
if (CHELSIO_CHIP_VERSION(padap->params.chip) > CHELSIO_T5)
usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c
3359
if (CHELSIO_CHIP_VERSION(padap->params.chip) <= CHELSIO_T5) {
usr/src/uts/common/io/cxgbe/t4nex/cudbg_lib.c
3770
if (CHELSIO_CHIP_VERSION(padap->params.chip) > CHELSIO_T5)
usr/src/uts/common/io/cxgbe/t4nex/t4_ioctl.c
1721
} else if (t4_cver_eq(sc, CHELSIO_T5)) {
usr/src/uts/common/io/cxgbe/t4nex/t4_nexus.c
1371
case CHELSIO_T5:
usr/src/uts/common/io/cxgbe/t4nex/t4_nexus.c
1602
case CHELSIO_T5:
usr/src/uts/common/io/cxgbe/t4nex/t4_nexus.c
2723
if (t4_cver_ge(sc, CHELSIO_T5)) {
usr/src/uts/common/io/cxgbe/t4nex/t4_nexus.c
739
if (t4_cver_ge(sc, CHELSIO_T5)) {
usr/src/uts/common/io/cxgbe/t4nex/t4_sge.c
1430
if (t4_cver_ge(sc, CHELSIO_T5) && tip->tip_cong_chan != -1) {
usr/src/uts/common/io/cxgbe/t4nex/t4_sge.c
344
case CHELSIO_T5: