usr/src/cmd/cxgbetool/cudbg_view.c

319

case CHELSIO_T4:

usr/src/uts/common/io/cxgbe/common/common.c

81

return (CHELSIO_CHIP_VERSION(chip) == CHELSIO_T4);

usr/src/uts/common/io/cxgbe/common/t4_chip_type.h

64

T4_A1 = CHELSIO_CHIP_CODE(CHELSIO_T4, 1),

usr/src/uts/common/io/cxgbe/common/t4_chip_type.h

65

T4_A2 = CHELSIO_CHIP_CODE(CHELSIO_T4, 2),

usr/src/uts/common/io/cxgbe/common/t4_hw.c

1162

case CHELSIO_T4:

usr/src/uts/common/io/cxgbe/common/t4_hw.c

2982

case CHELSIO_T4:

usr/src/uts/common/io/cxgbe/common/t4_hw.c

3980

case CHELSIO_T4:

usr/src/uts/common/io/cxgbe/common/t4_hw.c

6600

case CHELSIO_T4:

usr/src/uts/common/io/cxgbe/common/t4_hw.c

6735

case CHELSIO_T4:

usr/src/uts/common/io/cxgbe/common/t4_hw.c

7209

case CHELSIO_T4:

usr/src/uts/common/io/cxgbe/common/t4_hw.c

9998

case CHELSIO_T4:

usr/src/uts/common/io/cxgbe/common/t4_hw.c

9999

chip |= CHELSIO_CHIP_CODE(CHELSIO_T4, pl_rev);

usr/src/uts/common/io/cxgbe/t4nex/t4_ioctl.c

1702

if (t4_cver_eq(sc, CHELSIO_T4)) {

usr/src/uts/common/io/cxgbe/t4nex/t4_ioctl.c

1717

if (t4_cver_eq(sc, CHELSIO_T4)) {

usr/src/uts/common/io/cxgbe/t4nex/t4_nexus.c

1368

case CHELSIO_T4:

usr/src/uts/common/io/cxgbe/t4nex/t4_nexus.c

1534

if (t4_cver_eq(sc, CHELSIO_T4) ||

usr/src/uts/common/io/cxgbe/t4nex/t4_nexus.c

1559

if (t4_cver_eq(sc, CHELSIO_T4)) {

usr/src/uts/common/io/cxgbe/t4nex/t4_nexus.c

1599

case CHELSIO_T4:

usr/src/uts/common/io/cxgbe/t4nex/t4_nexus.c

1968

if (t4_cver_eq(sc, CHELSIO_T4)) {

usr/src/uts/common/io/cxgbe/t4nex/t4_nexus.c

2015

if (t4_cver_eq(sc, CHELSIO_T4)) {

usr/src/uts/common/io/cxgbe/t4nex/t4_sge.c

3089

if (t4_cver_eq(pi->adapter, CHELSIO_T4))

usr/src/uts/common/io/cxgbe/t4nex/t4_sge.c

341

case CHELSIO_T4: