usr/src/cmd/cxgbetool/cudbg_view.c

319

case CHELSIO_T4:

usr/src/uts/common/io/cxgbe/common/common.c

81

return (CHELSIO_CHIP_VERSION(chip) == CHELSIO_T4);

usr/src/uts/common/io/cxgbe/common/t4_chip_type.h

64

T4_A1 = CHELSIO_CHIP_CODE(CHELSIO_T4, 1),

usr/src/uts/common/io/cxgbe/common/t4_chip_type.h

65

T4_A2 = CHELSIO_CHIP_CODE(CHELSIO_T4, 2),

usr/src/uts/common/io/cxgbe/common/t4_hw.c

10012

case CHELSIO_T4:

usr/src/uts/common/io/cxgbe/common/t4_hw.c

10013

chip |= CHELSIO_CHIP_CODE(CHELSIO_T4, pl_rev);

usr/src/uts/common/io/cxgbe/common/t4_hw.c

1175

case CHELSIO_T4:

usr/src/uts/common/io/cxgbe/common/t4_hw.c

2995

case CHELSIO_T4:

usr/src/uts/common/io/cxgbe/common/t4_hw.c

3993

case CHELSIO_T4:

usr/src/uts/common/io/cxgbe/common/t4_hw.c

6613

case CHELSIO_T4:

usr/src/uts/common/io/cxgbe/common/t4_hw.c

6748

case CHELSIO_T4:

usr/src/uts/common/io/cxgbe/common/t4_hw.c

7222

case CHELSIO_T4:

usr/src/uts/common/io/cxgbe/t4nex/t4_ioctl.c

1703

if (t4_cver_eq(sc, CHELSIO_T4)) {

usr/src/uts/common/io/cxgbe/t4nex/t4_ioctl.c

1718

if (t4_cver_eq(sc, CHELSIO_T4)) {

usr/src/uts/common/io/cxgbe/t4nex/t4_nexus.c

1138

if (t4_cver_eq(sc, CHELSIO_T4) ||

usr/src/uts/common/io/cxgbe/t4nex/t4_nexus.c

1163

if (t4_cver_eq(sc, CHELSIO_T4)) {

usr/src/uts/common/io/cxgbe/t4nex/t4_nexus.c

1203

case CHELSIO_T4:

usr/src/uts/common/io/cxgbe/t4nex/t4_nexus.c

1571

if (t4_cver_eq(sc, CHELSIO_T4)) {

usr/src/uts/common/io/cxgbe/t4nex/t4_nexus.c

1618

if (t4_cver_eq(sc, CHELSIO_T4)) {

usr/src/uts/common/io/cxgbe/t4nex/t4_nexus.c

975

case CHELSIO_T4:

usr/src/uts/common/io/cxgbe/t4nex/t4_sge.c

2699

if (t4_cver_eq(pi->adapter, CHELSIO_T4))

usr/src/uts/common/io/cxgbe/t4nex/t4_sge.c

2946

if (t4_cver_eq(sc, CHELSIO_T4))

usr/src/uts/common/io/cxgbe/t4nex/t4_sge.c

315

case CHELSIO_T4:

usr/src/uts/common/io/cxgbe/t4nex/t4_sge.c

3229

if (t4_cver_eq(sc, CHELSIO_T4))