VAL
*dst++ = VAL;
*dst++ = VAL;
*dst++ = VAL;
adjprintf(" %*u", 1, VAL(trun));
adjprintf(" %*u", 1, VAL(twait));
adjprintf(" %*u", 2, VAL(nbk));
adjprintf(" %*u", 2, VAL(nrs));
#define S(FIELD, VAL) .FIELD = VAL
#define S(FIELD, VAL) internals_temp.FIELD = VAL
#define MM_WRITE_DOORBELL(/* struct _lm_device_t* */PDEV, /* u32_t */BAR, /* u32_t */CID, /* u32_t */VAL) \
MM_WRITE_DOORBELL_IMP(PDEV, BAR, CID, VAL)
#define MM_WRITE_DOORBELL_IMP(PDEV, BAR, CID, VAL) \
LM_BAR_WR32_ADDRESS((PDEV), ((u8_t *)(PFDEV(PDEV))->context_info->array[VF_TO_PF_CID((PDEV),(CID))].cid_resc.mapped_cid_bar_addr + (DPM_TRIGER_TYPE)), (VAL))
#define MM_WRITE_DOORBELL_IMP(PDEV, BAR, CID, VAL) \
LM_BAR_WR32_ADDRESS((PDEV), ((u8_t *)PFDEV(PDEV)->context_info->array[VF_TO_PF_CID((PDEV),(CID))].cid_resc.mapped_cid_bar_addr + (DPM_TRIGER_TYPE)), (VAL))
#define MM_WRITE_DOORBELL_IMP(PDEV, BAR, CID, VAL) \
LM_BAR_WR32_ADDRESS((PDEV), ((u8_t *)PFDEV(PDEV)->context_info->array[VF_TO_PF_CID((PDEV),(CID))].cid_resc.mapped_cid_bar_addr + (DPM_TRIGER_TYPE)), (VAL))
#define MM_WRITE_DOORBELL_IMP(PDEV, BAR, CID, VAL) \
LM_BAR_WR32_ADDRESS((PDEV), ((u8_t *)PFDEV(PDEV)->context_info->array[VF_TO_PF_CID((PDEV),(CID))].cid_resc.mapped_cid_bar_addr + (DPM_TRIGER_TYPE)), (VAL));
#define MM_WRITE_DOORBELL_IMP(PDEV, BAR, CID, VAL) \
(VAL))
#define MM_WRITE_DOORBELL_IMP(PDEV, BAR, CID, VAL) \
(PDEV)->hw_info.mem_base[BAR_1].as_u64 + (DPM_TRIGER_TYPE))), (VAL))
#define MM_WRITE_DOORBELL_IMP(PDEV, BAR, CID, VAL) \
LM_BAR_WR32_ADDRESS((PDEV), ((u8_t *)PFDEV(PDEV)->context_info->array[VF_TO_PF_CID((PDEV),(CID))].cid_resc.mapped_cid_bar_addr + (DPM_TRIGER_TYPE)), (VAL))
#define MM_WRITE_DOORBELL_IMP(PDEV, BAR, CID, VAL) \
LM_BAR_WR32_ADDRESS((PDEV), ((u8_t *)PFDEV(PDEV)->context_info->array[VF_TO_PF_CID((PDEV), (CID))].cid_resc.mapped_cid_bar_addr + (DPM_TRIGER_TYPE)), (VAL)); \
LM_BAR_WR32_ADDRESS((PDEV), ((u8_t *)(PDEV)->context_info->array[VF_TO_PF_CID((PDEV), (CID))].cid_resc.mapped_cid_bar_addr), (VAL)); \
#define _DOORBELL(PDEV,CID,VAL) do{\
MM_WRITE_DOORBELL(PDEV,BAR_1,CID,VAL);\
#define DOORBELL(PDEV,CID,VAL) do{\
MM_WRITE_DOORBELL(PDEV,BAR_1,CID,VAL);\
#define ISR_IS_LEGACY_INTR_IDLE(VAL) (((VAL) & 0x300) == 0)
#define ISR_IS_LEGACY_INTR_TRIGGERED(VAL) (((VAL) & 0x300) == 0x200)
#define SKD_WRITEL(DEV, VAL, OFF) skd_reg_write32(DEV, VAL, OFF)
#define SKD_WRITEQ(DEV, VAL, OFF) skd_reg_write64(DEV, VAL, OFF)
#define HCI1394_INIT_IT_STORE(DESCP, VAL) ((DESCP)->hdr = 0 | \
(DESC_TY_STORE | DESC_KEY_STORE | ((VAL) << DESC_HDR_STVAL_SHIFT)))
#define HCI1394_SETTAG(PKT, VAL) ((PKT)->q1 = (((PKT)->q1) & \
~DESC_PKT_TAG_MASK) | (((VAL) << DESC_PKT_TAG_SHIFT) & \
#define HCI1394_SETCHAN(PKT, VAL) ((PKT)->q1 = ((PKT)->q1) & \
~DESC_PKT_CHAN_MASK) | (((VAL) << DESC_PKT_CHAN_SHIFT) & \
#define HCI1394_SETSY(PKT, VAL) ((PKT)->q1 = ((PKT)->q1) & \
~DESC_PKT_SY_MASK) | (((VAL) << DESC_PKT_SY_SHIFT) & DESC_PKT_SY_MASK))
#define HCI1394_SET_ILEN(PKT, VAL) ((PKT)->q2 = (((PKT)->q1) & \
~DESC_PKT_DATALEN_MASK) | (((VAL) << DESC_PKT_DATALEN_SHIFT) & \
#define ISR_IS_LEGACY_INTR_IDLE(VAL) (((VAL) & 0x300) == 0)
#define ISR_IS_LEGACY_INTR_TRIGGERED(VAL) (((VAL) & 0x300) == 0x200)
#define IBT_FCTL_SET_ABORT_FIELD(VAL) (((VAL) & 0x3) << 4) /* InitAndSend WR */
#define ADD_CTRL(CTL, ID, VAL) \
state->cs_##CTL = audiocs_alloc_ctrl(state, ID, VAL); \