UNM_CAM_RAM
#define NIC_CRB_BASE UNM_CAM_RAM(0x200)
#define NIC_CRB_BASE_2 UNM_CAM_RAM(0x700)
#define CRB_CUT_THRU_PAGE_SIZE UNM_CAM_RAM(0x170)
#define CRB_MAC_BLOCK_START UNM_CAM_RAM(0x1c0)
UNM_CAM_RAM(0x1fc));
adapter->unm_nic_hw_read_wx(adapter, UNM_CAM_RAM(0x1fc), &val, 4);
UNM_CAM_RAM(0x1fc), UNM_BDINFO_MAGIC);
#define UNM_PORT_MODE_ADDR (UNM_CAM_RAM(0x24))
#define UNM_WOL_PORT_MODE (UNM_CAM_RAM(0x198))
#define UNM_ROM_LOCK_ID (UNM_CAM_RAM(0x100))
#define UNM_I2C_ROM_LOCK_ID (UNM_CAM_RAM(0x104))
#define UNM_PHY_LOCK_ID (UNM_CAM_RAM(0x120))
#define UNM_CRB_WIN_LOCK_ID (UNM_CAM_RAM(0x124))
#define UNM_EFUSE_CHIP_ID_HIGH (UNM_CAM_RAM(0x18))
#define UNM_EFUSE_CHIP_ID_LOW (UNM_CAM_RAM(0x1c))
#define UNM_FW_VERSION_MAJOR (UNM_CAM_RAM(0x150))
#define UNM_FW_VERSION_MINOR (UNM_CAM_RAM(0x154))
#define UNM_FW_VERSION_BUILD (UNM_CAM_RAM(0x168))
#define UNM_FW_VERSION_SUB (UNM_CAM_RAM(0x158))
#define UNM_TCP_FW_VERSION_MAJOR_ADDR (UNM_CAM_RAM(0x15c))
#define UNM_TCP_FW_VERSION_MINOR_ADDR (UNM_CAM_RAM(0x160))
#define UNM_TCP_FW_VERSION_SUB_ADDR (UNM_CAM_RAM(0x164))
#define UNM_WOL_WAKE (UNM_CAM_RAM(0x180))
#define UNM_WOL_CONFIG_NV (UNM_CAM_RAM(0x184))
#define UNM_WOL_CONFIG (UNM_CAM_RAM(0x188))
#define UNM_PRE_WOL_RX_ENABLE (UNM_CAM_RAM(0x18c))
if (off == UNM_CAM_RAM(0x1fc)) {
#define UNM_PEG_HALT_STATUS1 (UNM_CAM_RAM(0xa8))
#define UNM_PEG_HALT_STATUS2 (UNM_CAM_RAM(0xac))
#define UNM_PEG_ALIVE_COUNTER (UNM_CAM_RAM(0x0b0))
#define UNM_FW_CAPABILITIES_1 (UNM_CAM_RAM(0x128))
#define CRB_MAC_BLOCK_START (UNM_CAM_RAM(0x1c0))
#define NIC_CRB_BASE (UNM_CAM_RAM(0x200))
#define NIC_CRB_BASE_2 (UNM_CAM_RAM(0x700))
#define CRB_CUT_THRU_PAGE_SIZE (UNM_CAM_RAM(0x170))
#define UNM_PORT_MODE_ADDR (UNM_CAM_RAM(0x24))
#define CRB_DEV_PARTITION_INFO (UNM_CAM_RAM(0x14c))
#define UNM_FW_PORT_MODE_ADDR (UNM_CAM_RAM(0x28))
#define UNM_WOL_PORT_MODE (UNM_CAM_RAM(0x198))
#define UNM_RAM_COLD_BOOT (UNM_CAM_RAM(0x1fc))
#define UNM_BUS_DEV_NO (UNM_CAM_RAM(0x114))
#define CRB_DEV_STATE (UNM_CAM_RAM(0x140))
#define NX_PEG_TUNE_CAPABILITY (UNM_CAM_RAM(0x02c))
#define UNM_ROM_LOCK_ID (UNM_CAM_RAM(0x100))
#define UNM_I2C_ROM_LOCK_ID (UNM_CAM_RAM(0x104))
#define UNM_PHY_LOCK_ID (UNM_CAM_RAM(0x120))
#define UNM_CRB_WIN_LOCK_ID (UNM_CAM_RAM(0x124))
#define CRB_DRV_IDC_VERSION (UNM_CAM_RAM(0x174))
#define UNM_EFUSE_CHIP_ID_HIGH (UNM_CAM_RAM(0x18))
#define UNM_EFUSE_CHIP_ID_LOW (UNM_CAM_RAM(0x1c))
#define UNM_FW_VERSION_MAJOR (UNM_CAM_RAM(0x150))
#define UNM_FW_VERSION_MINOR (UNM_CAM_RAM(0x154))
#define UNM_FW_VERSION_SUB (UNM_CAM_RAM(0x158))
#define UNM_TCP_FW_VERSION_MAJOR_ADDR (UNM_CAM_RAM(0x15c))
#define UNM_TCP_FW_VERSION_MINOR_ADDR (UNM_CAM_RAM(0x160))
#define UNM_TCP_FW_VERSION_SUB_ADDR (UNM_CAM_RAM(0x164))
#define UNM_FW_VERSION_BUILD (UNM_CAM_RAM(0x168))
#define CRB_DRV_ACTIVE (UNM_CAM_RAM(0x138))
#define CRB_DRV_STATE (UNM_CAM_RAM(0x144))
#define UNM_WOL_WAKE (UNM_CAM_RAM(0x180))
#define UNM_WOL_CONFIG_NV (UNM_CAM_RAM(0x184))
#define UNM_WOL_CONFIG (UNM_CAM_RAM(0x188))
#define UNM_PRE_WOL_RX_ENABLE (UNM_CAM_RAM(0x18c))
#define UNM_FW_RESET (UNM_CAM_RAM(0x138))
#define CRB_DRV_SCRATCH (UNM_CAM_RAM(0x148))
#define CRB_PORT_0_REQIN (UNM_CAM_RAM(0x1b8))
#define CRB_PORT_1_REQIN (UNM_CAM_RAM(0x1bc))