TXG_WAIT
#define TXG_MIGHTWAIT (ztest_random(10) == 0 ? TXG_NOWAIT : TXG_WAIT)
txg = ztest_tx_assign(tx, TXG_WAIT, FTAG);
txg = ztest_tx_assign(tx, TXG_WAIT, FTAG);
txg = ztest_tx_assign(tx, TXG_WAIT, FTAG);
txg = ztest_tx_assign(tx, TXG_WAIT, FTAG);
txg = ztest_tx_assign(tx, TXG_WAIT, FTAG);
txg = ztest_tx_assign(tx, TXG_WAIT, FTAG);
txg = ztest_tx_assign(tx, TXG_WAIT, FTAG);
err = dmu_tx_assign(tx, TXG_WAIT);
if ((err = dmu_tx_assign(tx, TXG_WAIT)) == 0) {
if (dmu_tx_assign(tx, TXG_WAIT) != 0) {
err = dmu_tx_assign(tx, TXG_WAIT);
err = dmu_tx_assign(tx, TXG_WAIT);
objerr = dmu_tx_assign(tx, TXG_WAIT);
err = dmu_tx_assign(tx, TXG_WAIT);
err = dmu_tx_assign(tx, TXG_WAIT);
err = dmu_tx_assign(tx, TXG_WAIT);
err = dmu_tx_assign(tx, TXG_WAIT);
err = dmu_tx_assign(tx, TXG_WAIT);
ASSERT0(txg_how & ~(TXG_WAIT | TXG_NOTHROTTLE));
IMPLY((txg_how & TXG_WAIT), !dsl_pool_config_held(tx->tx_pool));
if (err != ERESTART || !(txg_how & TXG_WAIT))
!(txg_how & TXG_WAIT))
VERIFY(0 == dmu_tx_assign(tx, TXG_WAIT));
VERIFY0(dmu_tx_assign(tx, TXG_WAIT));
VERIFY0(dmu_tx_assign(tx, TXG_WAIT));
error = dmu_tx_assign(tx, TXG_WAIT);
err = dmu_tx_assign(tx, TXG_WAIT);
if (dmu_tx_assign(htx, TXG_WAIT) != 0) {
VERIFY0(dmu_tx_assign(tx, TXG_WAIT));
VERIFY0(dmu_tx_assign(tx, TXG_WAIT));
VERIFY0(dmu_tx_assign(tx, TXG_WAIT));
VERIFY0(dmu_tx_assign(tx, TXG_WAIT));
VERIFY0(dmu_tx_assign(tx, TXG_WAIT));
VERIFY0(dmu_tx_assign(tx, TXG_WAIT));
error = dmu_tx_assign(tx, TXG_WAIT);
error = dmu_tx_assign(tx, TXG_WAIT);
error = dmu_tx_assign(tx, TXG_WAIT);
error = dmu_tx_assign(tx, TXG_WAIT);
error = dmu_tx_assign(tx, TXG_WAIT);
error = dmu_tx_assign(tx, TXG_WAIT);
err = dmu_tx_assign(tx, TXG_WAIT);
error = dmu_tx_assign(tx, TXG_WAIT);
err = dmu_tx_assign(tx, TXG_WAIT);
err = dmu_tx_assign(tx, TXG_WAIT);
err = dmu_tx_assign(tx, TXG_WAIT);
error = dmu_tx_assign(tx, TXG_WAIT);
error = dmu_tx_assign(tx, TXG_WAIT);
error = dmu_tx_assign(tx, TXG_WAIT);
error = dmu_tx_assign(tx, TXG_WAIT);
VERIFY0(dmu_tx_assign(tx, TXG_WAIT | TXG_NOTHROTTLE));
VERIFY0(dmu_tx_assign(tx, TXG_WAIT));
VERIFY0(dmu_tx_assign(tx, TXG_WAIT));
VERIFY0(dmu_tx_assign(tx, TXG_WAIT));
error = dmu_tx_assign(tx, TXG_WAIT);
error = dmu_tx_assign(tx, TXG_WAIT);
error = dmu_tx_assign(tx, TXG_WAIT);
error = dmu_tx_assign(tx, TXG_WAIT);
error = dmu_tx_assign(tx, TXG_WAIT);
error = dmu_tx_assign(tx, TXG_WAIT);
error = dmu_tx_assign(tx, TXG_WAIT);
error = dmu_tx_assign(tx, TXG_WAIT);
error = dmu_tx_assign(tx, TXG_WAIT);
error = dmu_tx_assign(tx, TXG_WAIT);
error = dmu_tx_assign(tx, TXG_WAIT);
error = dmu_tx_assign(tx, TXG_WAIT);