TXDMA_REG_WRITE64

usr/src/uts/common/io/hxge/hpi_txdma.c

105

TXDMA_REG_WRITE64(handle, TDC_TDR_CFG, channel, cfg.value);

usr/src/uts/common/io/hxge/hpi_txdma.c

112

TXDMA_REG_WRITE64(handle, TDC_TDR_CFG, channel, cfg.value);

usr/src/uts/common/io/hxge/hpi_txdma.c

122

TXDMA_REG_WRITE64(handle, TDC_TDR_CFG, channel, cfg.value);

usr/src/uts/common/io/hxge/hpi_txdma.c

129

TXDMA_REG_WRITE64(handle, TDC_TDR_CFG, channel, cfg.value);

usr/src/uts/common/io/hxge/hpi_txdma.c

136

TXDMA_REG_WRITE64(handle, TDC_TDR_CFG, channel, cfg.value);

usr/src/uts/common/io/hxge/hpi_txdma.c

151

TXDMA_REG_WRITE64(handle, TDC_STAT, channel, cs.value);

usr/src/uts/common/io/hxge/hpi_txdma.c

183

TXDMA_REG_WRITE64(handle, TDC_STAT, channel, cs_p->value);

usr/src/uts/common/io/hxge/hpi_txdma.c

188

TXDMA_REG_WRITE64(handle, TDC_STAT, channel,

usr/src/uts/common/io/hxge/hpi_txdma.c

221

TXDMA_REG_WRITE64(handle, TDC_INT_MASK, channel, mask_p->value);

usr/src/uts/common/io/hxge/hpi_txdma.c

226

TXDMA_REG_WRITE64(handle, TDC_INT_MASK, channel,

usr/src/uts/common/io/hxge/hpi_txdma.c

258

TXDMA_REG_WRITE64(handle, TDC_TDR_CFG, channel, *reg_data);

usr/src/uts/common/io/hxge/hpi_txdma.c

299

TXDMA_REG_WRITE64(handle, TDC_MBL, channel, ml.value);

usr/src/uts/common/io/hxge/hpi_txdma.c

302

TXDMA_REG_WRITE64(handle, TDC_MBH, channel, mh.value);

usr/src/uts/common/io/hxge/hpi_txdma.c

48

TXDMA_REG_WRITE64(handle, TDC_PAGE_HANDLE, channel, hdl_p->value);

usr/src/uts/common/io/hxge/hxge_send.c

766

TXDMA_REG_WRITE64(HXGE_DEV_HPI_HANDLE(hxgep),

usr/src/uts/common/io/hxge/hxge_txdma.c

175

TXDMA_REG_WRITE64(handle, TDC_TDR_KICK, channel, 0);

usr/src/uts/common/io/hxge/hxge_txdma.c

2631

TXDMA_REG_WRITE64(hxgep->hpi_handle, TDC_STAT_INT_DBG, channel, 0);

usr/src/uts/common/io/hxge/hxge_txdma.c

2764

TXDMA_REG_WRITE64(handle, TDC_TDR_KICK, channel, 0);

usr/src/uts/common/io/nxge/npi/npi_tx_wr64.h

35

static void TXDMA_REG_WRITE64(npi_handle_t, uint64_t, int, uint64_t);

usr/src/uts/common/io/nxge/npi/npi_txdma.c

1051

TXDMA_REG_WRITE64(handle, TX_CS_REG, channel, cs_p->value);

usr/src/uts/common/io/nxge/npi/npi_txdma.c

1056

TXDMA_REG_WRITE64(handle, TX_CS_REG, channel,

usr/src/uts/common/io/nxge/npi/npi_txdma.c

1117

TXDMA_REG_WRITE64(handle, TX_ENT_MSK_REG, channel,

usr/src/uts/common/io/nxge/npi/npi_txdma.c

1123

TXDMA_REG_WRITE64(handle, TX_ENT_MSK_REG, channel,

usr/src/uts/common/io/nxge/npi/npi_txdma.c

1185

TXDMA_REG_WRITE64(handle, TX_ENT_MSK_REG, channel,

usr/src/uts/common/io/nxge/npi/npi_txdma.c

1191

TXDMA_REG_WRITE64(handle, TX_ENT_MSK_REG, channel,

usr/src/uts/common/io/nxge/npi/npi_txdma.c

1196

TXDMA_REG_WRITE64(handle, TX_ENT_MSK_REG, channel,

usr/src/uts/common/io/nxge/npi/npi_txdma.c

1241

TXDMA_REG_WRITE64(handle, TX_ENT_MSK_REG, channel,

usr/src/uts/common/io/nxge/npi/npi_txdma.c

1278

TXDMA_REG_WRITE64(handle, TX_ENT_MSK_REG, channel,

usr/src/uts/common/io/nxge/npi/npi_txdma.c

1325

TXDMA_REG_WRITE64(handle, TX_RNG_CFIG_REG, channel, cfg.value);

usr/src/uts/common/io/nxge/npi/npi_txdma.c

1374

TXDMA_REG_WRITE64(handle, TX_RNG_CFIG_REG, channel,

usr/src/uts/common/io/nxge/npi/npi_txdma.c

1442

TXDMA_REG_WRITE64(handle, TXDMA_MBL_REG, channel, ml.value);

usr/src/uts/common/io/nxge/npi/npi_txdma.c

1445

TXDMA_REG_WRITE64(handle, TXDMA_MBH_REG, channel, mh.value);

usr/src/uts/common/io/nxge/npi/npi_txdma.c

1677

TXDMA_REG_WRITE64(handle, TX_RING_KICK_REG, channel, kick.value);

usr/src/uts/common/io/nxge/npi/npi_txdma.c

1987

TXDMA_REG_WRITE64(handle, TDMC_INTR_DBG_REG, channel, erp->value);

usr/src/uts/common/io/nxge/npi/npi_txdma.c

223

TXDMA_REG_WRITE64(handle, tdc_dmc_offset[i], tdc, value);