Symbol: TR
usr/src/cmd/sed/compile.c
113
{'y', 2, TR},
usr/src/cmd/sed/compile.c
342
case TR: /* y */
usr/src/uts/i86pc/io/amd_iommu/amd_iommu_log.c
103
illreq = (TR == 1) ? "Reserved":
usr/src/uts/i86pc/io/amd_iommu/amd_iommu_log.c
119
uint8_t TR;
usr/src/uts/i86pc/io/amd_iommu/amd_iommu_log.c
135
TR = AMD_IOMMU_REG_GET32(&event[1],
usr/src/uts/i86pc/io/amd_iommu/amd_iommu_log.c
157
TR == 1 ? "Translation" : "Transaction",
usr/src/uts/i86pc/io/amd_iommu/amd_iommu_log.c
169
uint8_t TR;
usr/src/uts/i86pc/io/amd_iommu/amd_iommu_log.c
187
TR = AMD_IOMMU_REG_GET32(&event[1], AMD_IOMMU_EVENT_IO_PGFAULT_TR);
usr/src/uts/i86pc/io/amd_iommu/amd_iommu_log.c
211
TR == 1 ? "Translation" : "Transaction",
usr/src/uts/i86pc/io/amd_iommu/amd_iommu_log.c
227
uint8_t TR;
usr/src/uts/i86pc/io/amd_iommu/amd_iommu_log.c
248
TR = AMD_IOMMU_REG_GET32(&event[1], AMD_IOMMU_EVENT_DEVTAB_HWERR_TR);
usr/src/uts/i86pc/io/amd_iommu/amd_iommu_log.c
264
TR == 1 ? "Translation" : "Transaction",
usr/src/uts/i86pc/io/amd_iommu/amd_iommu_log.c
277
uint8_t TR;
usr/src/uts/i86pc/io/amd_iommu/amd_iommu_log.c
298
TR = AMD_IOMMU_REG_GET32(&event[1], AMD_IOMMU_EVENT_PGTABLE_HWERR_TR);
usr/src/uts/i86pc/io/amd_iommu/amd_iommu_log.c
317
TR == 1 ? "Translation" : "Transaction",
usr/src/uts/i86pc/io/amd_iommu/amd_iommu_log.c
421
uint8_t TR;
usr/src/uts/i86pc/io/amd_iommu/amd_iommu_log.c
436
TR = AMD_IOMMU_REG_GET32(&event[1],
usr/src/uts/i86pc/io/amd_iommu/amd_iommu_log.c
442
reqerr = get_illegal_req(type, TR);
usr/src/uts/i86pc/io/amd_iommu/amd_iommu_log.c
453
TR == 1 ? "Translation" : "Transaction",
usr/src/uts/i86pc/io/amd_iommu/amd_iommu_log.c
60
get_illegal_req(uint8_t type, uint8_t TR)
usr/src/uts/i86pc/io/amd_iommu/amd_iommu_log.c
66
illreq = (TR == 1) ? "Translation I=0/V=0/V=1&&TV=0" :
usr/src/uts/i86pc/io/amd_iommu/amd_iommu_log.c
70
illreq = (TR == 1) ? "Translation INTR/Port-IO/SysMgt; OR"
usr/src/uts/i86pc/io/amd_iommu/amd_iommu_log.c
76
illreq = (TR == 1) ? "Reserved":
usr/src/uts/i86pc/io/amd_iommu/amd_iommu_log.c
80
illreq = (TR == 1) ? "Reserved":
usr/src/uts/i86pc/io/amd_iommu/amd_iommu_log.c
87
illreq = (TR == 1) ? "Reserved":
usr/src/uts/i86pc/io/amd_iommu/amd_iommu_log.c
94
illreq = (TR == 1) ? "Reserved":
usr/src/uts/i86pc/io/amd_iommu/amd_iommu_log.c
99
illreq = (TR == 1) ? "Reserved":