TR
{'y', 2, TR},
case TR: /* y */
illreq = (TR == 1) ? "Reserved":
uint8_t TR;
TR = AMD_IOMMU_REG_GET32(&event[1],
TR == 1 ? "Translation" : "Transaction",
uint8_t TR;
TR = AMD_IOMMU_REG_GET32(&event[1], AMD_IOMMU_EVENT_IO_PGFAULT_TR);
TR == 1 ? "Translation" : "Transaction",
uint8_t TR;
TR = AMD_IOMMU_REG_GET32(&event[1], AMD_IOMMU_EVENT_DEVTAB_HWERR_TR);
TR == 1 ? "Translation" : "Transaction",
uint8_t TR;
TR = AMD_IOMMU_REG_GET32(&event[1], AMD_IOMMU_EVENT_PGTABLE_HWERR_TR);
TR == 1 ? "Translation" : "Transaction",
uint8_t TR;
TR = AMD_IOMMU_REG_GET32(&event[1],
reqerr = get_illegal_req(type, TR);
TR == 1 ? "Translation" : "Transaction",
get_illegal_req(uint8_t type, uint8_t TR)
illreq = (TR == 1) ? "Translation I=0/V=0/V=1&&TV=0" :
illreq = (TR == 1) ? "Translation INTR/Port-IO/SysMgt; OR"
illreq = (TR == 1) ? "Reserved":
illreq = (TR == 1) ? "Reserved":
illreq = (TR == 1) ? "Reserved":
illreq = (TR == 1) ? "Reserved":
illreq = (TR == 1) ? "Reserved":