CBNINTR_UE
if ((ret = pci_ecc_add_intr(pci_p, CBNINTR_UE, &ecc_p->ecc_ue)) !=
pci_ecc_rem_intr(pci_p, CBNINTR_UE, &ecc_p->ecc_ue);
cb_enable_nintr(pci_p, CBNINTR_UE);
cb_disable_nintr(cb_p, CBNINTR_UE, wait);
ASSERT((ecc_ii_p->ecc_type == CBNINTR_UE) ||
case CBNINTR_UE:
ecc_ii_p->ecc_type == CBNINTR_UE && !fatal) ||
ecc_cpu_call(ecc, ecc_err->ecc_unum, (ecc_type == CBNINTR_UE) ?
case CBNINTR_UE:
ecc_p->ecc_ue.ecc_type = CBNINTR_UE;
if (ecc_err_p->ecc_ii_p.ecc_type == CBNINTR_UE) {
if (ecc_err_p->ecc_ii_p.ecc_type == CBNINTR_UE) {
if (ecc_err_p->ecc_ii_p.ecc_type == CBNINTR_UE) {
PCI_ECC_PIO_UE, COMMON_ECC_AFSR_E_PIO, CBNINTR_UE,
PCI_ECC_PIO_UE, COMMON_ECC_AFSR_E_PIO, CBNINTR_UE,
PCI_ECC_PIO_UE, COMMON_ECC_AFSR_E_PIO, CBNINTR_UE,
PCI_ECC_PIO_UE, COMMON_ECC_AFSR_E_PIO, CBNINTR_UE,
PCI_ECC_PIO_UE, COMMON_ECC_AFSR_E_PIO, CBNINTR_UE,
PCI_ECC_PIO_UE, COMMON_ECC_AFSR_E_PIO, CBNINTR_UE,
PCI_ECC_PIO_UE, COMMON_ECC_AFSR_E_PIO, CBNINTR_UE,
PCI_ECC_PIO_UE, COMMON_ECC_AFSR_E_PIO, CBNINTR_UE,
PCI_ECC_SEC_PIO_UE, COMMON_ECC_AFSR_E_PIO, CBNINTR_UE,
PCI_ECC_DRD_UE, COMMON_ECC_AFSR_E_DRD, CBNINTR_UE,
PCI_ECC_SEC_DRD_UE, COMMON_ECC_AFSR_E_DRD, CBNINTR_UE,
PCI_ECC_DWR_UE, COMMON_ECC_AFSR_E_DWR, CBNINTR_UE,
PCI_ECC_SEC_DWR_UE, COMMON_ECC_AFSR_E_DWR, CBNINTR_UE,
fatal += (ecc_err_tbl[i].ecc_type == CBNINTR_UE) ?
ret = pcmu_ecc_add_intr(pcmu_p, CBNINTR_UE, &pecc_p->pecc_ue);
pcmu_ecc_rem_intr(pcmu_p, CBNINTR_UE, &pecc_p->pecc_ue);
pcmu_cb_enable_nintr(pcmu_p, CBNINTR_UE);
pcmu_cb_disable_nintr(pcb_p, CBNINTR_UE, wait);
ASSERT(ecc_ii_p->pecc_type == CBNINTR_UE);
case CBNINTR_UE:
ecc_ii_p->pecc_type == CBNINTR_UE && !fatal)
pecc_p->pecc_ue.pecc_type = CBNINTR_UE;