usr/src/uts/sun4u/io/px/px_err.c

422

{ TLU_OE_BIT_DESC(MRC, hw_reset, pciex_rx_oe) },

usr/src/uts/sun4u/io/px/px_err.c

425

{ TLU_OE_BIT_DESC(WUC, wuc_ruc, pciex_rx_tx_oe) },

usr/src/uts/sun4u/io/px/px_err.c

426

{ TLU_OE_BIT_DESC(RUC, wuc_ruc, pciex_rx_tx_oe) },

usr/src/uts/sun4u/io/px/px_err.c

427

{ TLU_OE_BIT_DESC(CRS, no_panic, pciex_rx_tx_oe) },

usr/src/uts/sun4u/io/px/px_err.c

430

{ TLU_OE_BIT_DESC(IIP, panic, pciex_oe) },

usr/src/uts/sun4u/io/px/px_err.c

431

{ TLU_OE_BIT_DESC(EDP, panic, pciex_oe) },

usr/src/uts/sun4u/io/px/px_err.c

432

{ TLU_OE_BIT_DESC(EHP, panic, pciex_oe) },

usr/src/uts/sun4u/io/px/px_err.c

434

{ TLU_OE_BIT_DESC(LIN, no_panic, pciex_oe) },

usr/src/uts/sun4u/io/px/px_err.c

435

{ TLU_OE_BIT_DESC(LRS, no_panic, pciex_oe) },

usr/src/uts/sun4u/io/px/px_err.c

436

{ TLU_OE_BIT_DESC(LDN, tlu_ldn, pciex_oe) },

usr/src/uts/sun4u/io/px/px_err.c

437

{ TLU_OE_BIT_DESC(LUP, tlu_lup, pciex_oe) },

usr/src/uts/sun4u/io/px/px_err.c

438

{ TLU_OE_BIT_DESC(ERU, panic, pciex_oe) },

usr/src/uts/sun4u/io/px/px_err.c

439

{ TLU_OE_BIT_DESC(ERO, panic, pciex_oe) },

usr/src/uts/sun4u/io/px/px_err.c

440

{ TLU_OE_BIT_DESC(EMP, panic, pciex_oe) },

usr/src/uts/sun4u/io/px/px_err.c

441

{ TLU_OE_BIT_DESC(EPE, panic, pciex_oe) },

usr/src/uts/sun4u/io/px/px_err.c

442

{ TLU_OE_BIT_DESC(ERP, panic, pciex_oe) },

usr/src/uts/sun4u/io/px/px_err.c

443

{ TLU_OE_BIT_DESC(EIP, panic, pciex_oe) }