TDC_BASE_ADDR
{"TDC", TDC_BASE_ADDR},
#define TDC_PAGE_HANDLE (TDC_BASE_ADDR + 0x8)
#define TDC_TDR_CFG (TDC_BASE_ADDR + 0x20)
#define TDC_TDR_HEAD (TDC_BASE_ADDR + 0x28)
#define TDC_TDR_PRE_HEAD (TDC_BASE_ADDR + 0x30)
#define TDC_TDR_KICK (TDC_BASE_ADDR + 0x38)
#define TDC_INT_MASK (TDC_BASE_ADDR + 0x40)
#define TDC_STAT (TDC_BASE_ADDR + 0x48)
#define TDC_MBH (TDC_BASE_ADDR + 0x50)
#define TDC_MBL (TDC_BASE_ADDR + 0x58)
#define TDC_BYTE_CNT (TDC_BASE_ADDR + 0x80)
#define TDC_TDR_QLEN (TDC_BASE_ADDR + 0x88)
#define TDC_RTAB_PTR (TDC_BASE_ADDR + 0x90)
#define TDC_DROP_CNT (TDC_BASE_ADDR + 0x98)
#define TDC_LAST_PKT_RBUF_PTRS (TDC_BASE_ADDR + 0xA8)
#define TDC_PREF_CMD (TDC_BASE_ADDR + 0x100)
#define TDC_PREF_DATA (TDC_BASE_ADDR + 0x108)
#define TDC_PREF_PAR_DATA (TDC_BASE_ADDR + 0x110)
#define TDC_REORD_BUF_CMD (TDC_BASE_ADDR + 0x120)
#define TDC_REORD_BUF_DATA (TDC_BASE_ADDR + 0x128)
#define TDC_REORD_BUF_ECC_DATA (TDC_BASE_ADDR + 0x130)
#define TDC_REORD_TBL_CMD (TDC_BASE_ADDR + 0x140)
#define TDC_REORD_TBL_DATA_LO (TDC_BASE_ADDR + 0x148)
#define TDC_REORD_TBL_DATA_HI (TDC_BASE_ADDR + 0x150)
#define TDC_PREF_PAR_LOG (TDC_BASE_ADDR + 0x200)
#define TDC_REORD_BUF_ECC_LOG (TDC_BASE_ADDR + 0x208)
#define TDC_REORD_TBL_PAR_LOG (TDC_BASE_ADDR + 0x210)
#define TDC_FIFO_ERR_MASK (TDC_BASE_ADDR + 0x220)
#define TDC_FIFO_ERR_STAT (TDC_BASE_ADDR + 0x228)
#define TDC_FIFO_ERR_INT_DBG (TDC_BASE_ADDR + 0x230)
#define TDC_STAT_INT_DBG (TDC_BASE_ADDR + 0x240)
#define TDC_PKT_REQ_TID_TAG (TDC_BASE_ADDR + 0x250)
#define TDC_SOP_PREF_DESC_LOG (TDC_BASE_ADDR + 0x260)
#define TDC_PREF_DESC_LOG (TDC_BASE_ADDR + 0x268)
#define TDC_PEU_TXN_LOG (TDC_BASE_ADDR + 0x270)
#define TDC_DBG_TRAINING_VEC (TDC_BASE_ADDR + 0x300)
#define TDC_DBG_GRP_SEL (TDC_BASE_ADDR + 0x308)