SFXGE_CPU_CACHE_SIZE
uint8_t __se_pad[SFXGE_CPU_CACHE_SIZE * 4];
uint8_t __se_pad[SFXGE_CPU_CACHE_SIZE];
uint8_t __se_pad[SFXGE_CPU_CACHE_SIZE * 4];
uint8_t __srp_pad[SFXGE_CPU_CACHE_SIZE];
uint8_t __srp_pad[SFXGE_CPU_CACHE_SIZE * 2];
uint8_t __sr_pad[SFXGE_CPU_CACHE_SIZE * 2];
uint8_t __sr_pad[SFXGE_CPU_CACHE_SIZE * 2];
uint8_t __sr_pad[SFXGE_CPU_CACHE_SIZE];
uint8_t __st_pad[SFXGE_CPU_CACHE_SIZE * 2];
uint8_t __st_pad[SFXGE_CPU_CACHE_SIZE];
uint8_t __st_pad[SFXGE_CPU_CACHE_SIZE * 3];
uint8_t __st_pad[SFXGE_CPU_CACHE_SIZE];
SFXGE_CPU_CACHE_SIZE, ctor, dtor, NULL, sp, NULL, 0);
if ((srfppp->srfpp_putp = kmem_zalloc(SFXGE_CPU_CACHE_SIZE *
off = id * SFXGE_CPU_CACHE_SIZE;
SFXGE_CPU_CACHE_SIZE, sfxge_rx_packet_ctor, sfxge_rx_packet_dtor,
SFXGE_CPU_CACHE_SIZE, sfxge_rx_qctor, sfxge_rx_qdtor, NULL, sp,
EFSYS_ASSERT3U(encp->enc_rx_buf_align_start, <=, SFXGE_CPU_CACHE_SIZE);
SFXGE_CPU_CACHE_SIZE - (encp->enc_rx_prefix_size - 2);
off = id * SFXGE_CPU_CACHE_SIZE;
kmem_free(srfppp->srfpp_putp, SFXGE_CPU_CACHE_SIZE *
off = id * SFXGE_CPU_CACHE_SIZE;
off = id * SFXGE_CPU_CACHE_SIZE;
SFXGE_CPU_CACHE_SIZE, /* dma_attr_align */
SFXGE_CPU_CACHE_SIZE, sfxge_tx_packet_ctor, sfxge_tx_packet_dtor,
SFXGE_CPU_CACHE_SIZE, sfxge_tx_buffer_ctor, sfxge_tx_buffer_dtor,
SFXGE_CPU_CACHE_SIZE, sfxge_tx_mapping_ctor, sfxge_tx_mapping_dtor,
SFXGE_CPU_CACHE_SIZE, sfxge_tx_qctor, sfxge_tx_qdtor, NULL, sp,