SCC_WRITE
SCC_WRITE(9, ZSWR9_MASTER_IE | ZSWR9_VECTOR_INCL_STAT);
SCC_WRITE(10, wr10);
SCC_WRITE(3, 0);
SCC_WRITE(4, zspp->wr4);
SCC_WRITE(11, zspp->wr11);
SCC_WRITE(12, zspp->wr12);
SCC_WRITE(13, zspp->wr13);
SCC_WRITE(14, ZSWR14_DPLL_SRC_BAUD);
SCC_WRITE(14, ZSWR14_DPLL_NRZI);
SCC_WRITE(14, ZSWR14_DPLL_DISABLE);
SCC_WRITE(14, wr14);
SCC_WRITE(3, zspp->wr3);
SCC_WRITE(5, zspp->wr5);
SCC_WRITE(1, ZSWR1_PARITY_SPECIAL);
SCC_WRITE(1, 0);
SCC_WRITE(15, zspp->wr15);
SCC_WRITE(9, ZSWR9_MASTER_IE);
SCC_WRITE(9, ZSWR9_RESET_WORLD);
SCC_WRITE(4, ZSWR4_PARITY_EVEN | ZSWR4_1_STOP | ZSWR4_X16_CLK);
SCC_WRITE(3, ZSWR3_RX_8);
SCC_WRITE(11, ZSWR11_TXCLK_BAUD | ZSWR11_RXCLK_BAUD);
SCC_WRITE(12, (speed[i] & 0xff));
SCC_WRITE(13, (speed[i] >> 8) & 0xff);
SCC_WRITE(14, ZSWR14_BAUD_FROM_PCLK);
SCC_WRITE(3, ZSWR3_RX_8 | ZSWR3_RX_ENABLE);
SCC_WRITE(5, ZSWR5_TX_ENABLE | ZSWR5_TX_8 | rtsdtr_bits);
SCC_WRITE(14, ZSWR14_BAUD_ENA | ZSWR14_BAUD_FROM_PCLK);
SCC_WRITE(15, ZSR15_BREAK | ZSR15_TX_UNDER |
SCC_WRITE(9, ZSWR9_MASTER_IE | ZSWR9_VECTOR_INCL_STAT);
SCC_WRITE(7, SDLCFLAG);
SCC_WRITE(3, (ZSWR3_RX_ENABLE | ZSWR3_RXCRC_ENABLE | ZSWR3_RX_8));
SCC_WRITE(5, (ZSWR5_TX_8 | ZSWR5_DTR | ZSWR5_TXCRC_ENABLE));
SCC_WRITE(3, 0); /* Quiesce receiver */