BIT_9
#define PHY_AN_AD_1000BASET_FULL BIT_9
#define BCM540X_DSP_FILTER_FEXT3 (BIT_8 | BIT_9 | BIT_11)
#define BCM540X_DSP_FILTER_FEXT2 (BIT_9 | BIT_11)
#define BCM540X_DSP_FILTER_NEXT3 (BIT_8 | BIT_9 | BIT_10)
#define BCM540X_DSP_FILTER_NEXT2 (BIT_9 | BIT_10)
#define BCM540X_DSP_FILTER_ECHO (BIT_8 | BIT_9)
#define BCM540X_DSP_FILTER_DFE BIT_9
#define BCM5401_SHDW_NORMAL_RX_SLICING_3LVL_1D BIT_9
#define BCM5401_SHDW_NORMAL_RX_SLICING_5LVL_1D (BIT_8 | BIT_9)
#define BCM540X_AUX_SPEED_MASK (BIT_8 | BIT_9 | BIT_10)
#define BCM540X_AUX_10BASET_FD BIT_9
#define BCM540X_AUX_100BASETX_HD (BIT_8 | BIT_9)
#define BCM540X_AUX_1000BASET_HD (BIT_9 | BIT_10)
#define BCM540X_AUX_1000BASET_FD (BIT_8 | BIT_9 | BIT_10)
#define PHY_CTRL_RESTART_AUTO_NEG BIT_9
val |= BIT_9; /*auto mdix*/
BIT_10 | BIT_9 | BIT_8 | BIT_7 | BIT_6 | BIT_5 |
BIT_10 | BIT_9 | BIT_8 | BIT_7 | BIT_6 | BIT_5 |
mcp->to_fw_mask |= BIT_0 | BIT_9;
mcp->to_fw_mask |= BIT_0 | BIT_1 | BIT_9 | BIT_10;
mcp->to_fw_mask |= BIT_9 | BIT_8;
scsi_status = (uint16_t)(scsi_status | BIT_9);
BIT_11 | BIT_10 | BIT_9 | BIT_8 | \
#define PCI_X_BUS_MODE (BIT_8 | BIT_9 | BIT_10 | BIT_11)
mr.mb[1] = (uint16_t)(mr.mb[1] | BIT_9);
#define SKD_PROBED BIT_9
#define SRB_UB_RSCN BIT_9 /* Unsolicited RSCN callback. */
#define QL_FCA_TRAN_ALLOCED BIT_9
#define ADAPTER_SUSPENDED (uint64_t)BIT_9
#define ISP_ABORT_NEEDED (uint64_t)BIT_9
#define CFG_SBUS_CARD (uint64_t)BIT_9
#define PRLI_W3_TASK_RETRY_ID_REQUESTED BIT_9
#define TF_ABORT_TASK_SET BIT_9
#define CFO_FCP_2_OVR BIT_9
#define IDC_TIMEOUT_MASK (BIT_11 | BIT_10 | BIT_9 | BIT_8)
#define GID_FP_MAC_ADDR BIT_9
#define MBX_9 BIT_9
#define FO1_AE_AUTO_BYPASS BIT_9
#define FO2_FCOE_512_MAX_MEM_WR_BURST BIT_9
#define IMO_FORCE_DELETE BIT_9
#define INIT_LOCKS_CREATED BIT_9
#define CFG_LSO BIT_9
#define CSR_HRI BIT_9
#define RT_IDX_CAM_BIT1 BIT_9
#define CQ_9_NOT_EMPTY BIT_9