BITS
static int maxbits = BITS; /* user settable max # bits/code */
static code_int maxmaxcode = 1 << BITS;
static char_type buf[BITS];
#define de_stack ((char_type *)&tab_suffixof(1<<BITS))
(void) fprintf(stderr, "BITS = %d\n", BITS);
static char buf[BITS];
code_int sorttab[1<<BITS]; /* sorted pointers into htab */
if (maxbits > BITS)
maxbits = BITS;
if (maxbits > BITS) {
*fileptr, maxbits, BITS);
#ifndef BITS
#if BITS == 16
#if BITS == 15
#if BITS == 14
#if BITS == 13
#if BITS <= 12
#define OUTSTACKSIZE (2<<BITS)
#if BITS > 15
dramaddr = BITS(pa, 39, 0) - BITS(base, 39, 24);
if ((pailsel = BITS(pa, 14, 12) >> 12 & ilen) != ilsel) {
top = BITS(dramaddr, 36, 13) >> 1;
top = BITS(dramaddr, 37, 14) >> 2;
top = BITS(dramaddr, 38, 15) >> 3;
top = BITS(dramaddr, 35, 12);
*iaddrp = top | BITS(dramaddr, 11, 0);
dramaddr = (BITS(iaddr, 35, 12) << intlvbits) |
(mcpp->intlvsel << 12) | BITS(iaddr, 11, 0);
BITS(csp.base, maskhi_hi + MC_CSMASK_UNMASKABLE(mcp.rev),
BITS(csp.base, maskhi_hi, maskhi_lo) &
~BITS(csp.mask, maskhi_hi, maskhi_lo),
BITS(csp.base, masklo_hi, masklo_lo) &
~BITS(csp.mask, masklo_hi, masklo_lo),
#define DSIGNIF (BITS(double) - _DEXPLEN + _HIDDENBIT - 1)
#define FSIGNIF (BITS(float) - _FEXPLEN + _HIDDENBIT - 1)
#define DMAXPOWTWO ((double)(1 << (BITS(int) - 2)) * \
(1 << (DSIGNIF - BITS(int) + 1)))
#define HIBITS ((short)(1 << (BITS(short) - 1)))
#define HIBITI (1U << (BITS(int) - 1))
#define HIBITL (1UL << (BITS(long) - 1))
if ((family = BITS(eax, 11, 8)) == 0xf)
family = BITS(eax, 27, 20);
if ((model = BITS(eax, 7, 4)) == 0xf)
model = BITS(eax, 19, 16);
ver = BITS(edx, 23, 23) ? /* mmx check */
#define SIGN_BIT(T) (1ULL << (BITS(T) - 1))
#define TEST_BIT(X, T) if (__ ## X ## _BIT__ != BITS(T)) return 1
#define MAX2820_SYNTH_RSVD0 BITS(11, 7) /* reserved */
#define MAX2820_SYNTH_R_MASK BITS(5, 0)
#define MAX2820_CHANNEL_RSVD BITS(11, 7) /* reserved */
#define MAX2820_CHANNEL_CF_MASK BITS(6, 0)
#define MAX2820_RECEIVE_2C_MASK BITS(11, 9)
#define MAX2820_RECEIVE_1C_MASK BITS(8, 6)
#define MAX2820_RECEIVE_DL_MASK BITS(5, 4)
#define MAX2820_RECEIVE_BW_MASK BITS(2, 0)
#define MAX2820A_RECEIVE_2C_MASK BITS(11, 9)
#define MAX2820A_RECEIVE_1C_MASK BITS(8, 6)
#define MAX2820A_RECEIVE_RSVD0_MASK BITS(5, 3)
#define MAX2820A_RECEIVE_RSVD1_MASK BITS(2, 0)
#define MAX2820_TRANSMIT_RSVD_MASK BITS(11, 4) /* reserved */
#define MAX2820_TRANSMIT_PA_MASK BITS(3, 0)
#define MAX2820_TWI_ADDR_MASK BITS(15, 12)
#define MAX2820_TWI_DATA_MASK BITS(11, 0)
#define MAX2820_TEST_DEFAULT BITS(2, 0) /* Always set to this value. */
*addr = MASK_AND_RSHIFT(idr0, BITS(0, 7));
*(addr + 1) = MASK_AND_RSHIFT(idr0, BITS(8, 15));
*(addr + 2) = MASK_AND_RSHIFT(idr0, BITS(16, 23));
*(addr + 3) = MASK_AND_RSHIFT(idr0, BITS(24, 31));
*(addr + 4) = MASK_AND_RSHIFT(idr1, BITS(0, 7));
*(addr + 5) = MASK_AND_RSHIFT(idr1, BITS(8, 15));
#define RTW_SR_RFPARM_CS_MASK BITS(2, 3) /* carrier-sense type */
#define RTW_TXCTL0_RATE_MASK BITS(27, 24) /* Tx rate */
#define RTW_TXCTL0_RTSRATE_MASK BITS(22, 19) /* Tx rate */
#define RTW_TXCTL0_KEYID_MASK BITS(15, 14) /* default key id */
#define RTW_TXCTL0_RSVD1_MASK BITS(13, 12) /* reserved */
#define RTW_TXCTL0_TPKTSIZE_MASK BITS(11, 0)
#define RTW_TXSTAT_RSVD1_MASK BITS(27, 16)
#define RTW_TXSTAT_RTSRETRY_MASK BITS(14, 8) /* RTS retry count */
#define RTW_TXSTAT_DRC_MASK BITS(7, 0) /* Data retry count */
#define RTW_TXCTL1_LENGTH_MASK BITS(30, 16) /* PLCP length (microseconds) */
#define RTW_TXCTL1_RTSDUR_MASK BITS(15, 0)
#define RTW_TXLEN_LENGTH_MASK BITS(11, 0) /* Tx buffer length in bytes */
#define RTW_RXCTL_RSVD0_MASK BITS(29, 12) /* reserved */
#define RTW_RXCTL_LENGTH_MASK BITS(11, 0) /* Rx buffer length */
#define RTW_RXSTAT_RATE_MASK BITS(23, 20) /* Rx rate */
#define RTW_RXSTAT_LENGTH_MASK BITS(11, 0)
#define RTW_RXRSSI_VLAN BITS(32, 16) /* XXX from reference driver */
#define RTW_RXRSSI_RSSI BITS(15, 8) /* RF energy at the PHY */
#define RTW_RXRSSI_IMR_RSSI BITS(15, 9) /* RF energy at the PHY */
#define RTW_RXRSSI_SQ BITS(7, 0) /* Barker code-lock quality */
#define RTW_BBP_SYS2_RATE_MASK BITS(5, 4)
#define RTW_BBP_SYS3_CSTHRESH_MASK BITS(0, 3)
#define RTW_BRSR_MBR8180_MASK BITS(1, 0) /* Maximum Basic Service Rate */
#define RTW_TCR_HWVERID_MASK BITS(29, 25)
#define RTW_TCR_MXDMA_MASK BITS(23, 21)
#define RTW_TCR_LBK_MASK BITS(18, 17)
#define RTW_TCR_SRL_MASK BITS(15, 8) /* Short Retry Limit */
#define RTW_TCR_LRL_MASK BITS(7, 0) /* Long Retry Limit */
#define RTW_RCR_RXFTH_MASK BITS(15, 13)
#define RTW_RCR_MXDMA_MASK BITS(10, 8)
#define RTW_9346CR_EEM_MASK BITS(7, 6) /* Operating Mode */
#define RTW_CONFIG0_GL_MASK BITS(1, 0)
#define RTW_CONFIG1_LEDS_MASK BITS(7, 6)
#define RTW_CONFIG2_PAPETIME_MASK BITS(1, 0) /* TBD, from EEPROM */
#define RTW_ANAPARM_RFPOW0_MASK BITS(30, 28)
#define RTW_ANAPARM_RFPOW1_MASK BITS(26, 20)
#define RTW_ANAPARM_CARDSP_MASK BITS(19, 0)
#define RTW_MSR_NETYPE_MASK BITS(3, 2)
#define RTW_CONFIG4_RFTYPE_MASK BITS(1, 0)
#define RTW_SCR_KM_MASK BITS(5, 4) /* Key Mode */
#define RTW_BCNITV_BCNITV_MASK BITS(9, 0)
#define RTW_ATIMWND_ATIMWND BITS(9, 0)
#define RTW_BINTRITV_BINTRITV BITS(9, 0)
#define RTW_ATIMTRITV_ATIMTRITV BITS(9, 0)
#define RTW_PHYDELAY_PHYDELAY BITS(2, 0)
#define RTW_BB_RD_MASK BITS(23, 16) /* data to read */
#define RTW_BB_WR_MASK BITS(15, 8) /* data to write */
#define RTW_BB_ADDR_MASK BITS(6, 0) /* address */
#define RTW_PHYCFG_MAC_RFTYPE_MASK BITS(29, 28)
#define RTW_PHYCFG_MAC_PHILIPS_ADDR_MASK BITS(27, 24)
#define RTW_PHYCFG_MAC_PHILIPS_DATA_MASK BITS(23, 0)
#define RTW_PHYCFG_MAC_MAXIM_LODATA_MASK BITS(27, 24)
#define RTW_PHYCFG_MAC_MAXIM_ADDR_MASK BITS(11, 8)
#define RTW_PHYCFG_MAC_MAXIM_HIDATA_MASK BITS(7, 0)
#define RTW_MAXIM_HIDATA_MASK BITS(11, 4)
#define RTW_MAXIM_LODATA_MASK BITS(3, 0)
#define RTW_CWR_CW BITS(9, 0)
#define RTW_RETRYCTR_RETRYCT BITS(7, 0)
#define SA2400_SYNC_SM_MASK BITS(5, 3)
#define SA2400_SYND_ZERO1_MASK BITS(21, 17) /* always 0 */
#define SA2400_SYND_ZERO2_MASK BITS(14, 3) /* always 0 */
#define SA2400_OPMODE_FILTTUNE_MASK BITS(17, 15)
#define SA2400_OPMODE_MODE_MASK BITS(3, 0)
#define SA2400_AGC_TARGET_MASK BITS(22, 20) /* ... plus 0dB - 7dB */
#define SA2400_AGC_MAXGAIN_MASK BITS(19, 15)
#define SA2400_AGC_BBPDELAY_MASK BITS(14, 10)
#define SA2400_AGC_LNADELAY_MASK BITS(9, 5)
#define SA2400_AGC_RXONDELAY_MASK BITS(4, 0)
#define SA2400_MANRX_RXOSQ_MASK BITS(20, 18)
#define SA2400_MANRX_RXOSI_MASK BITS(15, 13)
#define SA2400_MANRX_CORNERFREQ_MASK BITS(11, 10)
#define SA2400_MANRX_RXGAIN_MASK BITS(9, 0)
#define SA2400_TX_TXOSQ_MASK BITS(17, 15)
#define SA2400_TX_TXOSI_MASK BITS(12, 10)
#define SA2400_TX_RAMP_MASK BITS(9, 8)
#define SA2400_TX_HIGAIN_MASK BITS(7, 4)
#define SA2400_TX_LOGAIN_MASK BITS(3, 0)
#define SA2400_VCO_ZERO BITS(6, 5) /* always zero */
#define SA2400_VCO_VCOBAND_MASK BITS(3, 0)
#define SA2400_TWI_DATA_MASK BITS(31, 8)
#define SA2400_TWI_ADDR_MASK BITS(6, 0)
#define SA2400_SYNA_NF_MASK BITS(20, 18)
#define SA2400_SYNA_N_MASK BITS(17, 2)
#define SA2400_SYNB_R_MASK BITS(21, 12)
#define SA2400_SYNB_L_MASK BITS(11, 10) /* lock detect mode */
#define SA2400_SYNB_FC_MASK BITS(7, 0)
#define SA2400_SYNC_CP_MASK BITS(7, 6) /* charge pump current setting */
#define SI4126_TWI_DATA_MASK BITS(21, 4)
#define SI4126_TWI_ADDR_MASK BITS(3, 0)
#define SI4126_MAIN_AUXSEL_MASK BITS(13, 12) /* aux. output pin function */
#define SI4126_MAIN_IFDIV_MASK BITS(11, 10)
#define SI4126_GAIN_KPI_MASK BITS(5, 4) /* IF phase detector gain */
#define SI4126_GAIN_KP2_MASK BITS(3, 2) /* RF2 phase detector gain */
#define SI4126_GAIN_KP1_MASK BITS(1, 0) /* RF1 phase detector gain */