RXDMA_REG_WRITE64
RXDMA_REG_WRITE64(handle, RDC_RX_CFG1, rdc, cfg.value);
RXDMA_REG_WRITE64(handle, RDC_RX_CFG1, rdc, cfg.value);
RXDMA_REG_WRITE64(handle, RDC_RX_CFG1, rdc, cfg.value);
RXDMA_REG_WRITE64(handle, RDC_RCR_CFG_B, rdc, rcr_cfgb.value);
RXDMA_REG_WRITE64(handle, RDC_RX_CFG1, rdc, cfg1.value);
RXDMA_REG_WRITE64(handle, RDC_RX_CFG2, rdc, cfg2.value);
RXDMA_REG_WRITE64(handle, RDC_RBR_CFG_A, rdc, cfga.value);
RXDMA_REG_WRITE64(handle, RDC_RBR_CFG_B, rdc, cfgb.value);
RXDMA_REG_WRITE64(handle, RDC_RCR_CFG_A, rdc, rcr_cfga.value);
RXDMA_REG_WRITE64(handle, RDC_RCR_CFG_B, rdc, rcr_cfgb.value);
RXDMA_REG_WRITE64(handle, RDC_PAGE_HANDLE, rdc, page_handle.value);
RXDMA_REG_WRITE64(handle, RDC_STAT, channel, cs.value);
RXDMA_REG_WRITE64(handle, RDC_STAT, channel, cs_p->value);
RXDMA_REG_WRITE64(handle, RDC_STAT, channel,
RXDMA_REG_WRITE64(handle, RDC_PAGE_HANDLE, rdc, page_hdl.value);
RXDMA_REG_WRITE64(handle, RDC_INT_MASK, channel, mask_p->value);
RXDMA_REG_WRITE64(handle, RDC_INT_MASK, channel,
RXDMA_REG_WRITE64(handle, RDC_RCR_FLUSH, rdc, \
RXDMA_REG_WRITE64(handle, RDC_RBR_KICK, rdc, num_buffers)
RXDMA_REG_WRITE64(handle, RDC_STAT, channel, cs.value);
RXDMA_REG_WRITE64(handle, RDC_STAT, channel, cs.value);
RXDMA_REG_WRITE64(handle, RDC_STAT, ringp->rdc, cs.value);
RXDMA_REG_WRITE64(handle, RDC_STAT, rhp->index, cs.value);
RXDMA_REG_WRITE64(handle, RDC_RCR_CFG_B,
RXDMA_REG_WRITE64(handle, RDC_STAT, channel, pktcs.value);
RXDMA_REG_WRITE64(HXGE_DEV_HPI_HANDLE(hxgep), RDC_STAT,
RXDMA_REG_WRITE64(handle, TDC_STAT, channel, cs.value);
static void RXDMA_REG_WRITE64(npi_handle_t, uint64_t, int, uint64_t);
RXDMA_REG_WRITE64(handle, RXMISC_DISCARD_REG, rdc, cnt.value);
RXDMA_REG_WRITE64(handle, RX_DMA_CTL_STAT_REG,
RXDMA_REG_WRITE64(handle, RX_DMA_CTL_STAT_REG,
RXDMA_REG_WRITE64(handle, RX_DMA_CTL_STAT_REG,
RXDMA_REG_WRITE64(handle, RX_DMA_CTL_STAT_REG,
RXDMA_REG_WRITE64(handle, RX_DMA_CTL_STAT_REG, channel,
RXDMA_REG_WRITE64(handle, RX_DMA_CTL_STAT_REG, channel,
RXDMA_REG_WRITE64(handle, RX_DMA_CTL_STAT_REG, channel,
RXDMA_REG_WRITE64(handle, RX_DMA_CTL_STAT_REG, channel,
RXDMA_REG_WRITE64(handle, RX_DMA_CTL_STAT_REG, channel,
RXDMA_REG_WRITE64(handle, RX_DMA_CTL_STAT_REG, channel,
RXDMA_REG_WRITE64(handle, RX_DMA_CTL_STAT_REG, channel,
RXDMA_REG_WRITE64(handle, RX_DMA_CTL_STAT_REG, channel,
RXDMA_REG_WRITE64(handle, RX_DMA_CTL_STAT_REG, channel,
RXDMA_REG_WRITE64(handle, RX_DMA_CTL_STAT_REG, channel,
RXDMA_REG_WRITE64(handle, RX_DMA_ENT_MSK_REG, channel,
RXDMA_REG_WRITE64(handle, RX_DMA_ENT_MSK_REG, channel,
RXDMA_REG_WRITE64(handle, RX_DMA_ENT_MSK_REG, channel,
RXDMA_REG_WRITE64(handle, RX_DMA_ENT_MSK_REG, channel,
RXDMA_REG_WRITE64(handle, RX_DMA_ENT_MSK_REG, channel,
RXDMA_REG_WRITE64(handle, RXDMA_CFIG1_REG,
RXDMA_REG_WRITE64(handle, RXDMA_CFIG1_REG,
RXDMA_REG_WRITE64(handle,
RXDMA_REG_WRITE64(handle, RCRCFIG_B_REG, rdc, rcr_cfgb.value);
RXDMA_REG_WRITE64(handle, RXDMA_CFIG1_REG, rdc, cfg1.value);
RXDMA_REG_WRITE64(handle, RXDMA_CFIG2_REG, rdc, cfg2.value);
RXDMA_REG_WRITE64(handle, RBR_CFIG_A_REG, rdc, cfga.value);
RXDMA_REG_WRITE64(handle, RBR_CFIG_B_REG, rdc, cfgb.value);
RXDMA_REG_WRITE64(handle, RCRCFIG_A_REG, rdc, rcr_cfga.value);
RXDMA_REG_WRITE64(handle, RCRCFIG_B_REG, rdc, rcr_cfgb.value);
RXDMA_REG_WRITE64(handle, RXMISC_DISCARD_REG, rdc, cnt->value);
RXDMA_REG_WRITE64(handle, RCR_FLSH_REG, rdc, \
RXDMA_REG_WRITE64(handle, RBR_KICK_REG, rdc, num_buffers)
RXDMA_REG_WRITE64(handle, RX_DMA_CTL_STAT_REG, channel,
RXDMA_REG_WRITE64(handle, RX_DMA_CTL_STAT_REG, channel,
RXDMA_REG_WRITE64(handle, RCRCFIG_B_REG,
RXDMA_REG_WRITE64(handle, RX_DMA_CTL_STAT_REG,
RXDMA_REG_WRITE64(handle, RX_DMA_CTL_STAT_REG, channel,
RXDMA_REG_WRITE64(nxgep->npi_handle, RX_DMA_CTL_STAT_DBG_REG,