REG_X2APIC_BASE_MSR
wrmsr((REG_X2APIC_BASE_MSR + (msr >> 2)), tmp);
return (rdmsr(REG_X2APIC_BASE_MSR + (APIC_TASK_REG >> 2)));
wrmsr((REG_X2APIC_BASE_MSR + (APIC_INT_CMD1 >> 2)),
i = (uint64_t)(rdmsr(REG_X2APIC_BASE_MSR + (msr >> 2)) & 0xffffffff);
tmp = rdmsr(REG_X2APIC_BASE_MSR + (msr >> 2));
wrmsr((REG_X2APIC_BASE_MSR + (reg >> 2)), v)