REG_RMW_FIELD
REG_RMW_FIELD(ah, AR_PHY_SFCORR_LOW,
REG_RMW_FIELD(ah, AR_PHY_SFCORR,
REG_RMW_FIELD(ah, AR_PHY_SFCORR,
REG_RMW_FIELD(ah, AR_PHY_SFCORR,
REG_RMW_FIELD(ah, AR_PHY_SFCORR_LOW,
REG_RMW_FIELD(ah, AR_PHY_SFCORR_EXT,
REG_RMW_FIELD(ah, AR_PHY_SFCORR_EXT,
REG_RMW_FIELD(ah, AR_PHY_SFCORR_EXT,
REG_RMW_FIELD(ah, AR_PHY_SFCORR_EXT,
REG_RMW_FIELD(ah, AR_PHY_CCK_DETECT,
REG_RMW_FIELD(ah, AR_PHY_FIND_SIG,
REG_RMW_FIELD(ah, AR_PHY_TIMING5,
REG_RMW_FIELD(ah, AR_PHY_DESIRED_SZ,
REG_RMW_FIELD(ah, AR_PHY_AGC_CTL1,
REG_RMW_FIELD(ah, AR_PHY_AGC_CTL1,
REG_RMW_FIELD(ah, AR_PHY_FIND_SIG,
REG_RMW_FIELD(ah, AR_PHY_SFCORR_LOW,
REG_RMW_FIELD(ah, AR_PHY_TIMING_CTRL4(0),
REG_RMW_FIELD(ah, AR_PHY_TIMING_CTRL4(i),
REG_RMW_FIELD(ah, AR_PHY_TIMING_CTRL4(i),
REG_RMW_FIELD(ah, AR9285_AN_TOP3, AR9285_AN_TOP3_PWDDAC, 1);
REG_RMW_FIELD(ah, AR9285_AN_RXTXBB1, AR9285_AN_RXTXBB1_PDRXTXBB1, 1);
REG_RMW_FIELD(ah, AR9285_AN_RXTXBB1, AR9285_AN_RXTXBB1_PDV2I, 1);
REG_RMW_FIELD(ah, AR9285_AN_RXTXBB1, AR9285_AN_RXTXBB1_PDDACIF, 1);
REG_RMW_FIELD(ah, AR9285_AN_RF2G2, AR9285_AN_RF2G2_OFFCAL, 0);
REG_RMW_FIELD(ah, AR9285_AN_RF2G7, AR9285_AN_RF2G7_PWDDB, 0);
REG_RMW_FIELD(ah, AR9285_AN_RF2G1, AR9285_AN_RF2G1_ENPACAL, 0);
REG_RMW_FIELD(ah, AR9285_AN_RF2G1, AR9285_AN_RF2G1_PDPADRV1, 1);
REG_RMW_FIELD(ah, AR9285_AN_RF2G1, AR9285_AN_RF2G1_PDPADRV2, 0);
REG_RMW_FIELD(ah, AR9285_AN_RF2G1, AR9285_AN_RF2G1_PDPAOUT, 0);
REG_RMW_FIELD(ah, AR9285_AN_RF2G8, AR9285_AN_RF2G8_PADRVGN2TAB0, 7);
REG_RMW_FIELD(ah, AR9285_AN_RF2G7, AR9285_AN_RF2G7_PADRVGN2TAB0, 0);
REG_RMW_FIELD(ah, AR9285_AN_RF2G6, AR9285_AN_RF2G6_CCOMP, 7);
REG_RMW_FIELD(ah, AR9285_AN_RF2G6, AR9285_AN_RF2G6_OFFS, 0);
REG_RMW_FIELD(ah, AR9285_AN_RF2G3, AR9285_AN_RF2G3_PDVCCOMP, 0);
REG_RMW_FIELD(ah, AR9285_AN_RF2G3, AR9285_AN_RF2G3_PDVCCOMP, 1);
REG_RMW_FIELD(ah, AR9285_AN_RF2G3, AR9285_AN_RF2G3_PDVCCOMP, reg_field);
REG_RMW_FIELD(ah, AR9285_AN_RF2G6, AR9285_AN_RF2G6_OFFS, offs_6_1);
REG_RMW_FIELD(ah, AR9285_AN_RF2G3, AR9285_AN_RF2G3_PDVCCOMP, offs_0);
REG_RMW_FIELD(ah, AR9285_AN_RF2G6, AR9285_AN_RF2G6_CCOMP, ccomp_org);
REG_RMW_FIELD(ah, AR_PHY_TPCRG1, AR_PHY_TPCRG1_NUM_PD_GAIN,
REG_RMW_FIELD(ah, AR_PHY_TPCRG1, AR_PHY_TPCRG1_PD_GAIN_1,
REG_RMW_FIELD(ah, AR_PHY_TPCRG1, AR_PHY_TPCRG1_PD_GAIN_2,
REG_RMW_FIELD(ah, AR_PHY_TPCRG1, AR_PHY_TPCRG1_PD_GAIN_3,
REG_RMW_FIELD(ah, AR_PHY_TPCRG1, AR_PHY_TPCRG1_NUM_PD_GAIN,
REG_RMW_FIELD(ah, AR_PHY_TPCRG1, AR_PHY_TPCRG1_PD_GAIN_1,
REG_RMW_FIELD(ah, AR_PHY_TPCRG1, AR_PHY_TPCRG1_PD_GAIN_2,
REG_RMW_FIELD(ah, AR_PHY_TPCRG1, AR_PHY_TPCRG1_PD_GAIN_3,
REG_RMW_FIELD(ah,
REG_RMW_FIELD(ah,
REG_RMW_FIELD(ah,
REG_RMW_FIELD(ah,
REG_RMW_FIELD(ah,
REG_RMW_FIELD(ah,
REG_RMW_FIELD(ah, AR_PHY_XPA_CFG, AR_PHY_FORCE_XPA_CFG,
REG_RMW_FIELD(ah, AR_PHY_SETTLING, AR_PHY_SETTLING_SWITCH,
REG_RMW_FIELD(ah, AR_PHY_DESIRED_SZ, AR_PHY_DESIRED_SZ_ADC,
REG_RMW_FIELD(ah, AR_PHY_DESIRED_SZ,
REG_RMW_FIELD(ah, AR_PHY_RF_CTL3, AR_PHY_TX_END_TO_A2_RX_ON,
REG_RMW_FIELD(ah, AR_PHY_CCA, AR9280_PHY_CCA_THRESH62,
REG_RMW_FIELD(ah, AR_PHY_EXT_CCA0,
REG_RMW_FIELD(ah, AR_PHY_CCA, AR_PHY_CCA_THRESH62,
REG_RMW_FIELD(ah, AR_PHY_EXT_CCA,
REG_RMW_FIELD(ah, AR_PHY_RF_CTL2,
REG_RMW_FIELD(ah, AR_PHY_RF_CTL2, AR_PHY_TX_END_PA_ON,
REG_RMW_FIELD(ah, AR_PHY_SETTLING,
REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ + regChainOffset,
REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ + regChainOffset,
REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ + regChainOffset,
REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ + regChainOffset,
REG_RMW_FIELD(ah, AR_PHY_RXGAIN + regChainOffset,
REG_RMW_FIELD(ah, AR_PHY_RXGAIN + regChainOffset,
REG_RMW_FIELD(ah, AR_PHY_SETTLING, AR_PHY_SETTLING_SWITCH,
REG_RMW_FIELD(ah, AR_PHY_DESIRED_SZ, AR_PHY_DESIRED_SZ_ADC,
REG_RMW_FIELD(ah, AR_PHY_RF_CTL3, AR_PHY_TX_END_TO_A2_RX_ON,
REG_RMW_FIELD(ah, AR_PHY_CCA, AR9280_PHY_CCA_THRESH62,
REG_RMW_FIELD(ah, AR_PHY_EXT_CCA0, AR_PHY_EXT_CCA0_THRESH62,
REG_RMW_FIELD(ah, AR_PHY_RF_CTL2, AR_PHY_TX_END_DATA_START,
REG_RMW_FIELD(ah, AR_PHY_RF_CTL2, AR_PHY_TX_END_PA_ON,
REG_RMW_FIELD(ah, AR_PHY_SETTLING,
REG_RMW_FIELD(ah, AR_TIME_OUT,
REG_RMW_FIELD(ah, AR_TIME_OUT,
REG_RMW_FIELD(ah, AR_GTXTO, AR_GTXTO_TIMEOUT_LIMIT, tu);
REG_RMW_FIELD(ah, AR_TXCFG, AR_FTRIG, ah->ah_txTrigLevel);
REG_RMW_FIELD(ah, AR_PHY_TIMING3,
REG_RMW_FIELD(ah, AR_PHY_TIMING3,
REG_RMW_FIELD(ah, AR_PHY_HALFGI,
REG_RMW_FIELD(ah, AR_PHY_HALFGI,
REG_RMW_FIELD(ah, AR_RIMT, AR_RIMT_LAST, 500);
REG_RMW_FIELD(ah, AR_RIMT, AR_RIMT_FIRST, 2000);
REG_RMW_FIELD(ah, AR_RSSI_THR,
REG_RMW_FIELD(ah, AR_IMR_S2,
REG_RMW_FIELD(ah, AR_AN_SYNTH9,