Symbol: REG_RD
usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_hw_misc.c
142
REG_RD(pdev, context.ctx_ctx_ctrl, &val);
usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_hw_misc.c
197
REG_RD(pdev, context.ctx_ctx_ctrl, &val);
usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_hw_misc.c
209
REG_RD(pdev, context.ctx_ctx_data, &val);
usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_hw_misc.c
214
REG_RD(pdev, context.ctx_data, &val);
usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_hw_misc.c
238
REG_RD(pdev, pci_config.pcicfg_int_ack_cmd, &val);
usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_hw_misc.c
274
REG_RD(pdev, pci_config.pcicfg_int_ack_cmd, &val);
usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_hw_misc.c
280
REG_RD(pdev, hc.hc_config, &val);
usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_hw_misc.c
356
REG_RD(pdev, pci_config.pcicfg_reg_window, buf_ptr);
usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_hw_misc.c
72
REG_RD(pdev, pci_config.pcicfg_reg_window, ret);
usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_hw_nvram.c
191
REG_RD(pdev, nvm.nvm_sw_arb, &val);
usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_hw_nvram.c
238
REG_RD(pdev, nvm.nvm_sw_arb, &val);
usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_hw_nvram.c
265
REG_RD(pdev, misc.misc_cfg, &val);
usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_hw_nvram.c
287
REG_RD(pdev, nvm.nvm_command, &val);
usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_hw_nvram.c
314
REG_RD(pdev, misc.misc_cfg, &val);
usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_hw_nvram.c
338
REG_RD(pdev, nvm.nvm_command, &val);
usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_hw_nvram.c
364
REG_RD(pdev, nvm.nvm_access_enable, &val);
usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_hw_nvram.c
388
REG_RD(pdev, nvm.nvm_access_enable, &val);
usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_hw_nvram.c
445
REG_RD(pdev, nvm.nvm_command, &val);
usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_hw_nvram.c
521
REG_RD(pdev, nvm.nvm_command, &val);
usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_hw_nvram.c
524
REG_RD(pdev, nvm.nvm_read, &val);
usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_hw_nvram.c
614
REG_RD(pdev, nvm.nvm_command, &val);
usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_hw_nvram.c
640
REG_RD(pdev, nvm.nvm_cfg4, &val);
usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_hw_nvram.c
646
REG_RD(pdev, nvm.nvm_cfg3, &orig);
usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_hw_nvram.c
655
REG_RD(pdev, nvm.nvm_command, &val);
usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_hw_nvram.c
661
REG_RD(pdev, nvm.nvm_read, &val);
usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_hw_nvram.c
699
REG_RD(pdev, nvm.nvm_cfg4, &val);
usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_hw_nvram.c
716
REG_RD(pdev, nvm.nvm_cfg1, &val);
usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_hw_nvram.c
742
REG_RD(pdev, nvm.nvm_read, &val);
usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_hw_nvram.c
775
REG_RD(pdev, nvm.nvm_cfg1, &idx);
usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_hw_nvram.c
798
REG_RD(pdev, nvm.nvm_cfg4, &val);
usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_hw_nvram.c
857
REG_RD(pdev, nvm.nvm_cfg4, &val);
usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_hw_nvram.c
941
REG_RD(pdev, nvm.nvm_cfg4, &val);
usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_hw_nvram.c
969
REG_RD(pdev, nvm.nvm_command, &val);
usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_hw_nvram.c
980
REG_RD(pdev, nvm.nvm_cfg1, &val);
usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_hw_phy.c
1185
REG_RD(pdev, emac.emac_mode, &val);
usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_hw_phy.c
123
REG_RD(pdev, emac.emac_mdio_mode, &val);
usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_hw_phy.c
143
REG_RD(pdev, emac.emac_mdio_comm, &val);
usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_hw_phy.c
148
REG_RD(pdev, emac.emac_mdio_comm, &val);
usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_hw_phy.c
150
REG_RD(pdev, emac.emac_mdio_comm, &val);
usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_hw_phy.c
1553
REG_RD(pdev, emac.emac_mode, &val);
usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_hw_phy.c
174
REG_RD(pdev, emac.emac_mdio_mode, &val);
usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_hw_phy.c
1768
REG_RD(pdev, emac.emac_mode, &val);
usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_hw_phy.c
1986
REG_RD(pdev, emac.emac_mode, &val);
usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_hw_phy.c
2006
REG_RD(pdev, emac.emac_mode, &val);
usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_hw_phy.c
2040
REG_RD(pdev, hc.hc_attn_bits_enable, &val);
usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_hw_phy.c
2681
REG_RD(pdev, emac.emac_rx_mode, &val);
usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_hw_phy.c
2692
REG_RD(pdev, emac.emac_tx_mode, &val);
usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_hw_phy.c
2954
REG_RD(pdev, emac.emac_mode, &val);
usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_hw_phy.c
3026
REG_RD(pdev, hc.hc_attn_bits_enable, &val);
usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_hw_phy.c
3368
REG_RD(pdev, emac.emac_status, &mac_status);
usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_hw_phy.c
3929
REG_RD(pdev, emac.emac_status, &val);
usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_hw_phy.c
4015
REG_RD(pdev, misc.misc_dual_media_ctrl, &val);
usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_hw_phy.c
50
REG_RD(pdev, emac.emac_mdio_mode, &tmp);
usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_hw_phy.c
630
REG_RD(pdev, emac.emac_mode, &val);
usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_hw_phy.c
71
REG_RD(pdev, emac.emac_mdio_comm, &tmp);
usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_hw_phy.c
721
REG_RD(pdev, emac.emac_status, &val);
usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_hw_phy.c
92
REG_RD(pdev, emac.emac_mdio_mode, &tmp);
usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_hw_reset.c
1522
REG_RD(pdev, pci_config.pcicfg_msix_control, &val);
usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_hw_reset.c
1536
REG_RD(pdev,
usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_hw_reset.c
1592
REG_RD(pdev,
usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_hw_reset.c
1635
REG_RD(pdev, hc.hc_config, &val);
usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_hw_reset.c
1672
REG_RD(pdev, hc.hc_attn_bits_enable, &val);
usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_hw_reset.c
2045
REG_RD(pdev, tdma.tdma_config, &val);
usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_hw_reset.c
2052
REG_RD(pdev, pci.pci_config_2, &val);
usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_hw_reset.c
2133
REG_RD(pdev, mq.mq_config, &val);
usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_hw_reset.c
2178
REG_RD(pdev, tbdr.tbdr_config, &val);
usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_hw_reset.c
2310
REG_RD(pdev, emac.emac_mdio_mode, &val);
usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_hw_reset.c
2404
REG_RD(pdev, mq.mq_config2, &val);
usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_hw_reset.c
344
REG_RD(pdev, context.ctx_host_page_tbl_ctrl, &val);
usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_hw_reset.c
476
REG_RD(pdev, misc.misc_new_core_ctl, &val);
usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_hw_reset.c
547
REG_RD(pdev, misc.misc_id, &val);
usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_hw_reset.c
577
REG_RD(pdev, pci_config.pcicfg_misc_config, &val);
usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_hw_reset.c
598
REG_RD( pdev, misc.misc_command, &val);
usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_hw_reset.c
605
REG_RD(pdev, misc.misc_command, &val);
usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_hw_reset.c
636
REG_RD(pdev, tsch.tsch_ctx_access_cfg, &val);
usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_hw_reset.c
645
REG_RD(pdev, misc.misc_new_core_ctl, &val);
usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_hw_reset.c
657
REG_RD(pdev, mq.mq_config, &val);
usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_hw_reset.c
668
REG_RD(pdev, pci.pci_swap_diag0, &val);
usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_hw_reset.c
707
REG_RD(pdev, misc.misc_eco_hw_ctl, &val);
usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_hw_reset.c
713
REG_RD(pdev, misc.misc_eco_hw_ctl, &val);
usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_lm_main.c
2378
REG_RD(pdev, emac.emac_rx_mode, &rx_mode);
usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_lm_main.c
2487
REG_RD(pdev, rpm.rpm_sort_user0, &val);
usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_lm_main.c
2500
REG_RD(pdev, rpm.rpm_sort_user1, &val);
usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_lm_main.c
2513
REG_RD(pdev, rpm.rpm_sort_user2, &val);
usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_lm_main.c
2526
REG_RD(pdev, rpm.rpm_sort_user3, &val);
usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_lm_main.c
2719
REG_RD(pdev, hc.hc_command, &reg_val);
usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_lm_main.c
3522
REG_RD(pdev, rpm.rpm_acpi_byte_enable_ctrl, &val);
usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_lm_main.c
3614
REG_RD(pdev, rpm.rpm_acpi_byte_enable_ctrl, &val);
usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_lm_main.c
3626
REG_RD(pdev, rpm.rpm_acpi_pattern_ctrl, &val);
usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_lm_main.c
3694
REG_RD(pdev, rpm.rpm_acpi_pattern_ctrl, &val);
usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_lm_main.c
3980
REG_RD(pdev, emac.emac_mode, &val);
usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_lm_main.c
3986
REG_RD(pdev, rpm.rpm_config, &val);
usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_lm_main.c
4014
REG_RD(pdev, emac.emac_mode, &val);
usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_lm_main.c
4066
REG_RD(pdev, rpm.rpm_config, &val);
usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_lm_main.c
4139
REG_RD(pdev, misc.misc_clock_control_bits, &val);
usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_lm_main.c
4170
REG_RD(pdev, misc.misc_spio, &val);
usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_lm_main.c
4307
REG_RD(pdev, emac.emac_status, &val);
usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_lm_main.c
4865
REG_RD(pdev, rlup.rlup_rss_config, &val);
usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_lm_main.c
5066
REG_RD(pdev, rlup.rlup_rss_config, &val);
usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_lm_main.c
5262
REG_RD(pdev, rlup.rlup_rss_config, &val);
usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_lm_main.c
5312
REG_RD(pdev,pci_config.pcicfg_device_control,&pci_devctl);
usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_lm_main.c
5357
REG_RD(pdev, pci_config.pcicfg_vendor_id, &val);
usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_lm_main.c
757
REG_RD(pdev, pci.pci_swap_diag0, &val);
usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_lm_main.c
763
REG_RD(pdev, misc.misc_id, &pdev->hw_info.chip_id);
usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_lm_main.c
773
REG_RD(pdev, pci_config.pcicfg_misc_status, &val);
usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_lm_main.c
791
REG_RD(pdev, pci_config.pcicfg_pci_clock_control_bits, &val);
usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_lm_main.c
929
REG_RD(pdev, pci_config.pcicfg_link_capability, &val);
usr/src/uts/common/io/bnx/570x/driver/common/lmdev/bnx_lm_main.c
945
REG_RD(pdev, pci_config.pcicfg_link_status, &val);
usr/src/uts/common/io/bnx/bnx_mm.h
37
REG_RD((_lmdevice), pci_config.pcicfg_int_ack_cmd, &dummy); \
usr/src/uts/common/io/bnx/bnxint.c
200
REG_RD(lmdevice, pci_config.pcicfg_misc_status, &value32);
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
10196
swap_val = REG_RD(cb, NIG_REG_PORT_SWAP);
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
10197
swap_override = REG_RD(cb, NIG_REG_STRAP_OVERRIDE);
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
10321
tx_en_mode = REG_RD(cb, params->shmem_base +
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
10351
u32 val = REG_RD(cb, params->shmem_base +
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
10992
pair_swap = REG_RD(cb, params->shmem_base +
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
11023
reset_pin[idx] = REG_RD(cb, shmem_base_path[idx] +
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
11036
reset_pin[idx] = REG_RD(cb, shmem_base_path[idx] +
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
11057
u32 other_shmem_base_addr = REG_RD(cb, params->shmem2_base +
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
11259
u32 cms_enable = REG_RD(cb, params->shmem_base +
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
11614
if (REG_RD(cb, NIG_REG_MASK_INTERRUPT_PORT0 +
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
11682
if (REG_RD(cb, NIG_REG_MASK_INTERRUPT_PORT0 +
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
11894
cfg_pin = (REG_RD(cb, params->shmem_base +
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
12148
cfg_pin = (REG_RD(cb, params->shmem_base +
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
13047
rx = REG_RD(cb, shmem_base +
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
13051
tx = REG_RD(cb, shmem_base +
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
13055
rx = REG_RD(cb, shmem_base +
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
13059
tx = REG_RD(cb, shmem_base +
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
13079
ext_phy_config = REG_RD(cb, shmem_base +
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
13084
ext_phy_config = REG_RD(cb, shmem_base +
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
13101
u32 switch_cfg = (REG_RD(cb, shmem_base +
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
13105
chip_id = (REG_RD(cb, MISC_REG_CHIP_NUM) << 16) |
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
13106
((REG_RD(cb, MISC_REG_CHIP_REV) & 0xf) << 12);
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
13112
phy_addr = REG_RD(cb,
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
13115
if (REG_RD(cb, MISC_REG_PORT4MODE_EN_OVWR) == 0x3)
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
13120
serdes_net_if = (REG_RD(cb, shmem_base +
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
13205
phy_addr = REG_RD(cb,
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
13213
phy_addr = REG_RD(cb,
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
13336
config2 = REG_RD(cb, shmem_base + OFFSETOF(struct shmem_region,
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
13347
u32 size = REG_RD(cb, shmem2_base);
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
13370
u32 raw_ver = REG_RD(cb, phy->ver_addr);
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
13407
link_config = REG_RD(cb, params->shmem_base +
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
13410
phy->speed_cap_mask = REG_RD(cb, params->shmem_base +
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
13415
link_config = REG_RD(cb, params->shmem_base +
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
13418
phy->speed_cap_mask = REG_RD(cb, params->shmem_base +
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
13562
media_types = REG_RD(cb, sync_offset);
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
13979
lfa_sts = REG_RD(cb, params->lfa_base +
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
14062
tmp_val = REG_RD(cb, params->lfa_base +
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
14070
lfa_sts = REG_RD(cb, params->lfa_base +
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
14311
if (REG_RD(cb, MISC_REG_RESET_REG_2) &
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
14396
swap_val = REG_RD(cb, NIG_REG_PORT_SWAP);
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
14397
swap_override = REG_RD(cb, NIG_REG_STRAP_OVERRIDE);
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
14523
val = REG_RD(cb, MISC_REG_GPIO_EVENT_EN);
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
14568
u32 phy_gpio_reset = REG_RD(cb, shmem_base +
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
14620
swap_val = REG_RD(cb, NIG_REG_PORT_SWAP);
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
14621
swap_override = REG_RD(cb, NIG_REG_STRAP_OVERRIDE);
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
14884
wc_lane_config = REG_RD(cb, shmem_base_path[0] +
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
14966
val = REG_RD(cb, MISC_REG_GEN_PURP_HWG);
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
14971
phy_ver = REG_RD(cb, shmem_base_path[0] +
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
15014
cfg_pin = (REG_RD(cb, params->shmem_base +
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
15141
(REG_RD(cb, NIG_REG_EGRESS_EMAC0_PORT + params->port*4)))
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
15145
(REG_RD(cb, MISC_REG_RESET_REG_2) &
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
15159
if (REG_RD(cb, mac_base + XMAC_REG_RX_LSS_STATUS))
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
15165
} else if (REG_RD(cb, MISC_REG_RESET_REG_2) &
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
15197
cfg_pin = (REG_RD(cb, params->shmem_base + OFFSETOF(struct shmem_region,
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
15362
if ((REG_RD(cb, params->shmem_base +
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
15488
swap_val = REG_RD(cb, NIG_REG_PORT_SWAP);
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
15489
swap_override = REG_RD(cb, NIG_REG_STRAP_OVERRIDE);
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
15509
aeu_mask = REG_RD(cb, offset);
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
15514
val = REG_RD(cb, MISC_REG_GPIO_EVENT_EN);
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
1565
val_xoff = REG_RD(cb, emac_base +
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
1568
val_xon = REG_RD(cb, emac_base + EMAC_REG_RX_PFC_STATS_XON_RCVD);
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
1574
val_xoff = REG_RD(cb, emac_base +
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
1577
val_xon = REG_RD(cb, emac_base + EMAC_REG_RX_PFC_STATS_XON_SENT);
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
1615
cur_mode = REG_RD(cb, emac_base + EMAC_REG_EMAC_MDIO_MODE);
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
162
REG_RD(cb, shmem2_base + \
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
1642
port4mode_ovwr_val = REG_RD(cb, MISC_REG_PORT4MODE_EN_OVWR);
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
1648
return (u8)REG_RD(cb, MISC_REG_PORT4MODE_EN);
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
1683
val = REG_RD(cb, emac_base + EMAC_REG_EMAC_MODE);
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
1688
val = REG_RD(cb, emac_base + EMAC_REG_EMAC_MODE);
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
1730
if (!(REG_RD(cb, MISC_REG_RESET_REG_2) &
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
1733
val = REG_RD(cb, umac_base + UMAC_REG_COMMAND_CONFIG);
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
1858
(REG_RD(cb, MISC_REG_RESET_REG_2) &
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
1912
if (REG_RD(cb, MISC_REG_RESET_REG_2) &
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
1918
pfc_ctrl = REG_RD(cb, xmac_base + XMAC_REG_PFC_CTRL_HI);
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
1924
val = REG_RD(cb, xmac_base + XMAC_REG_CTRL);
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
2067
val = REG_RD(cb, emac_base + EMAC_REG_EMAC_MODE);
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
2098
val = REG_RD(cb, emac_base + EMAC_REG_EMAC_RX_MODE);
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
2127
val = REG_RD(cb, emac_base + EMAC_REG_EMAC_MODE);
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
2378
xcm_mask = REG_RD(cb, port ? NIG_REG_LLH1_XCM_MASK :
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
2487
val = REG_RD(cb, MISC_REG_RESET_REG_2);
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
2714
u32 nig_bmac_enable = REG_RD(cb, NIG_REG_BMAC0_REGS_OUT_EN + port*4);
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
2721
if (REG_RD(cb, MISC_REG_RESET_REG_2) &
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
2750
init_crd = REG_RD(cb, PBF_REG_P0_INIT_CRD + port*4);
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
2751
crd = REG_RD(cb, PBF_REG_P0_CREDIT + port*8);
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
2756
crd = REG_RD(cb, PBF_REG_P0_CREDIT + port*8);
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
2759
crd = REG_RD(cb, PBF_REG_P0_CREDIT + port*8);
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
2833
if (REG_RD(cb, NIG_REG_PORT_SWAP))
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
2839
if (REG_RD(cb, NIG_REG_PORT_SWAP))
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
2871
mode = REG_RD(cb, phy->mdio_ctrl + EMAC_REG_EMAC_MDIO_MODE);
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
2884
tmp = REG_RD(cb, phy->mdio_ctrl + EMAC_REG_EMAC_MDIO_COMM);
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
2907
mode = REG_RD(cb, phy->mdio_ctrl + EMAC_REG_EMAC_MDIO_MODE);
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
2920
val = REG_RD(cb, phy->mdio_ctrl + EMAC_REG_EMAC_MDIO_COMM);
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
2951
chip_id = (REG_RD(cb, MISC_REG_CHIP_NUM) << 16) |
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
2952
((REG_RD(cb, MISC_REG_CHIP_REV) & 0xf) << 12);
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
2969
val = REG_RD(cb, phy->mdio_ctrl + EMAC_REG_EMAC_MDIO_COMM);
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
2991
val = REG_RD(cb, phy->mdio_ctrl +
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
3030
chip_id = (REG_RD(cb, MISC_REG_CHIP_NUM) << 16) |
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
3031
((REG_RD(cb, MISC_REG_CHIP_REV) & 0xf) << 12);
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
3049
tmp = REG_RD(cb, phy->mdio_ctrl + EMAC_REG_EMAC_MDIO_COMM);
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
3070
tmp = REG_RD(cb, phy->mdio_ctrl +
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
3107
if (REG_RD(cb, params->shmem2_base) <=
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
3172
eee_mode = ((REG_RD(cb, params->shmem_base +
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
3348
board_cfg = REG_RD(cb, params->shmem_base +
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
3356
sfp_ctrl = REG_RD(cb, params->shmem_base +
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
3388
val = REG_RD(cb, MCP_REG_MCPR_IMC_COMMAND);
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
3405
val = REG_RD(cb, MCP_REG_MCPR_IMC_COMMAND);
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
3408
val = REG_RD(cb, MCP_REG_MCPR_IMC_COMMAND);
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
3429
val = REG_RD(cb, MCP_REG_MCPR_IMC_COMMAND);
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
3432
val = REG_RD(cb, MCP_REG_MCPR_IMC_COMMAND);
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
3443
data_array[i] = REG_RD(cb, (MCP_REG_MCPR_IMC_DATAREG0 + i*4));
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
348
u32 val = REG_RD(cb, reg);
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
3528
path_swap_ovr = REG_RD(cb, MISC_REG_FOUR_PORT_PATH_SWAP_OVWR);
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
3532
path_swap = REG_RD(cb, MISC_REG_FOUR_PORT_PATH_SWAP);
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
3538
port_swap_ovr = REG_RD(cb, MISC_REG_FOUR_PORT_PORT_SWAP_OVWR);
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
3542
port_swap = REG_RD(cb, MISC_REG_FOUR_PORT_PORT_SWAP);
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
3552
REG_RD(cb, MISC_REG_TWO_PORT_PATH_SWAP_OVWR);
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
3557
REG_RD(cb, MISC_REG_TWO_PORT_PATH_SWAP);
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
357
u32 val = REG_RD(cb, reg);
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
381
REG_RD(cb, params->lfa_base +
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
396
link_status = REG_RD(cb, params->shmem_base +
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
4113
if (REG_RD(cb, params->shmem_base +
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
4153
wc_lane_config = REG_RD(cb, params->shmem_base +
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
425
saved_val = REG_RD(cb, params->lfa_base +
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
4304
cfg_tap_val = REG_RD(cb, params->shmem_base +
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
434
saved_val = REG_RD(cb, params->lfa_base +
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
443
saved_val = REG_RD(cb, params->lfa_base +
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
453
cur_speed_cap_mask = REG_RD(cb, params->lfa_base +
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
4626
cfg_pin = (REG_RD(cb, shmem_base +
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
466
REG_RD(cb, params->lfa_base +
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
4704
serdes_net_if = (REG_RD(cb, params->shmem_base +
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
476
eee_status = REG_RD(cb, params->shmem2_base +
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
4770
cfg_pin = REG_RD(cb, params->shmem_base +
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
4791
serdes_net_if = (REG_RD(cb, params->shmem_base +
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
5013
path_swap_ovr = REG_RD(cb, MISC_REG_TWO_PORT_PATH_SWAP_OVWR);
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
5017
path_swap = REG_RD(cb, MISC_REG_TWO_PORT_PATH_SWAP);
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
509
gp_oenable = REG_RD(cb, MCP_REG_MCPR_GP_OENABLE);
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
512
*en = (REG_RD(cb, MCP_REG_MCPR_GP_INPUTS) & epio_mask) >> epio_pin;
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
5154
pll_lock = REG_RD(cb, MISC_REG_WC0_PLL_LOCK);
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
5247
serdes_net_if = (REG_RD(cb, shmem_base +
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
526
gp_output = REG_RD(cb, MCP_REG_MCPR_GP_OUTPUTS);
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
535
gp_oenable = REG_RD(cb, MCP_REG_MCPR_GP_OENABLE);
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
5443
vars->link_status = REG_RD(cb, params->shmem_base +
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
5455
vars->eee_status = REG_RD(cb, params->shmem2_base +
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
5467
media_types = REG_RD(cb, sync_offset);
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
5485
vars->aeu_int_mask = REG_RD(cb, sync_offset);
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
6739
REG_RD(cb, NIG_REG_STATUS_INTERRUPT_PORT0 + port*4));
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
6741
REG_RD(cb, NIG_REG_MASK_INTERRUPT_PORT0 + port*4),
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
6742
REG_RD(cb, NIG_REG_EMAC0_STATUS_MISC_MI_INT + port*0x18),
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
6743
REG_RD(cb, NIG_REG_SERDES0_STATUS_LINK_STATUS+port*0x3c));
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
6745
REG_RD(cb, NIG_REG_XGXS0_STATUS_LINK10G + port*0x68),
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
6746
REG_RD(cb, NIG_REG_XGXS0_STATUS_LINK_STATUS + port*0x68));
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
6759
latch_status = REG_RD(cb,
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
6894
spirom_ver = REG_RD(cb, params->phy[ELINK_EXT_PHY1].ver_addr);
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
69
#define EMAC_RD(cb, reg) REG_RD(cb, emac_base + reg)
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
6904
spirom_ver = REG_RD(cb, params->phy[ELINK_EXT_PHY2].ver_addr);
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
6936
md_devad = REG_RD(cb, (NIG_REG_XGXS0_CTRL_MD_DEVAD +
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
7510
val = REG_RD(cb, addr) + 1;
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
7557
REG_RD(cb, NIG_REG_STATUS_INTERRUPT_PORT0 + port*4));
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
7560
REG_RD(cb, NIG_REG_MASK_INTERRUPT_PORT0 + port*4),
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
7561
REG_RD(cb, NIG_REG_EMAC0_STATUS_MISC_MI_INT + port*0x18) > 0,
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
7562
REG_RD(cb, NIG_REG_SERDES0_STATUS_LINK_STATUS + port*0x3c));
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
7565
REG_RD(cb, NIG_REG_XGXS0_STATUS_LINK10G + port*0x68),
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
7566
REG_RD(cb, NIG_REG_XGXS0_STATUS_LINK_STATUS + port*0x68));
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
8162
if (REG_RD(cb, params->shmem_base +
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
8534
swap_val = REG_RD(cb, NIG_REG_PORT_SWAP);
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
8535
swap_override = REG_RD(cb, NIG_REG_STRAP_OVERRIDE);
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
8549
tx_en_mode = REG_RD(cb, params->shmem_base +
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
8694
pin_cfg = (REG_RD(cb, params->shmem_base +
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
9109
media_types = REG_RD(cb, sync_offset);
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
9179
val = REG_RD(cb, params->shmem_base +
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
9456
u32 fault_led_gpio = REG_RD(cb, params->shmem_base +
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
9493
pin_cfg = (REG_RD(cb, params->shmem_base +
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
9635
u32 val = REG_RD(cb, params->shmem_base +
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
9944
tx_en_mode = REG_RD(cb, params->shmem_base +
usr/src/uts/common/io/bnxe/577xx/drivers/common/ecore/ecore_init.h
203
reg_val = REG_RD(pdev, mcp_attn_ctl_regs[i].addr);
usr/src/uts/common/io/bnxe/577xx/drivers/common/ecore/ecore_init.h
268
reg_val = REG_RD(pdev, ecore_blocks_parity_data[i].
usr/src/uts/common/io/bnxe/577xx/drivers/common/ecore/ecore_init.h
280
reg_val = REG_RD(pdev, MISC_REG_AEU_AFTER_INVERT_4_MCP);
usr/src/uts/common/io/bnxe/577xx/drivers/common/ecore/ecore_init_ops.h
272
REG_RD(pdev, addr);
usr/src/uts/common/io/bnxe/577xx/drivers/common/ecore/ecore_init_ops.h
540
val = REG_RD(pdev, write_arb_addr[i].l);
usr/src/uts/common/io/bnxe/577xx/drivers/common/ecore/ecore_init_ops.h
544
val = REG_RD(pdev, write_arb_addr[i].add);
usr/src/uts/common/io/bnxe/577xx/drivers/common/ecore/ecore_init_ops.h
548
val = REG_RD(pdev, write_arb_addr[i].ubound);
usr/src/uts/common/io/bnxe/577xx/drivers/common/ecore/ecore_init_ops.h
609
val = REG_RD(pdev, PCIE_REG_PCIER_TL_HDR_FC_ST);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/bnxe_hw_debug.c
107
val = REG_RD(pdev,TM_REG_LIN1_SCAN_ON);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/bnxe_hw_debug.c
128
val = REG_RD(pdev, MISC_REG_CHIP_NUM);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/bnxe_hw_debug.c
147
val = REG_RD(pdev,DORQ_REG_DQ_FILL_LVLF);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/bnxe_hw_debug.c
151
val = REG_RD(pdev,DORQ_REG_DQ_FILL_LVL_MAX);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/bnxe_hw_debug.c
155
val = REG_RD(pdev,DORQ_REG_DB_DIS_CNTR0);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/bnxe_hw_debug.c
192
chip_num = REG_RD(pdev,MISC_REG_CHIP_NUM);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/bnxe_hw_debug.c
210
if (REG_RD(pdev,PXP2_REG_RQ_HOQ_RAM_RD_STATUS)) break;
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/bnxe_hw_debug.c
217
rd0 = REG_RD(pdev,PXP2_REG_RQ_HOQ_RAM_DATA_RD_0);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/bnxe_hw_debug.c
218
rd1 = REG_RD(pdev,PXP2_REG_RQ_HOQ_RAM_DATA_RD_1);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/bnxe_hw_debug.c
219
rd2 = REG_RD(pdev,PXP2_REG_RQ_HOQ_RAM_DATA_RD_2);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/bnxe_hw_debug.c
220
rd3 = REG_RD(pdev,PXP2_REG_RQ_HOQ_RAM_DATA_RD_3);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/bnxe_hw_debug.c
70
val = REG_RD(pdev, MISC_REG_CHIP_NUM);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/bnxe_hw_debug.c
77
val = REG_RD(pdev,TM_REG_EN_LINEAR0_TIMER);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/bnxe_hw_debug.c
87
val = REG_RD(pdev,TM_REG_LIN0_SCAN_ON);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/bnxe_hw_debug.c
97
val = REG_RD(pdev,TM_REG_EN_LINEAR1_TIMER);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/hw_debug.h
120
val = REG_RD(pdev, offset); \
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/hw_debug.h
132
val = REG_RD(pdev, offset + i*(inc)); \
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/hw_debug.h
144
val1 = REG_RD(pdev, offset1); \
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/hw_debug.h
145
val2 = REG_RD(pdev, offset2); \
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/hw_debug.h
156
val1 = REG_RD(pdev, (offset1 + i*inc)); \
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/hw_debug.h
157
val2 = REG_RD(pdev, (offset2 + i*(inc))); \
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/hw_debug.h
170
val = REG_RD(pdev, offset);\
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/hw_debug.h
182
val1 = REG_RD(pdev, offset + i*(inc)); \
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/hw_debug.h
183
val2 = REG_RD(pdev, offset + i*(inc) + 4); \
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/hw_debug.h
206
val = REG_RD(pdev, offset2 + i*4); \
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/hw_debug.h
208
chip_num = REG_RD(pdev , MISC_REG_CHIP_NUM); \
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/hw_debug.h
210
val1 = REG_RD(pdev, offset1 + i*(inc)); \
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/hw_debug.h
211
val1 = REG_RD(pdev, offset1 + i*(inc) + 4); \
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/hw_debug.h
212
val1 = REG_RD(pdev, offset1 + i*(inc) + 8); \
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/hw_debug.h
213
REG_RD(pdev, offset1 + i*(inc) + 12); \
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/hw_debug.h
216
val1 = REG_RD(pdev, offset1 + i*(inc)); \
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/hw_debug.h
217
val1 = REG_RD(pdev, offset1 + i*(inc) + 4); \
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/hw_debug.h
218
val1 = REG_RD(pdev, offset1 + i*(inc) + 8); \
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/hw_debug.h
219
REG_RD(pdev, offset1 + i*(inc) + 12); \
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/hw_debug.h
222
val2 = REG_RD(pdev, offset + i*4); \
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/hw_debug.h
234
val = REG_RD(pdev, offset); \
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/hw_debug.h
97
val = REG_RD(pdev, MISC_REG_CHIP_NUM); \
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/hw_debug.h
98
chip_rev = REG_RD(pdev, MISC_REG_CHIP_REV); \
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/hw_debug.h
99
chip_metal = REG_RD(pdev, MISC_REG_CHIP_METAL); \
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_dcbx.c
2799
*buff = REG_RD(pdev,
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_dcbx.c
3134
*buff = REG_RD(pdev,
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_dcbx.c
3182
*buff = REG_RD(pdev,
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_dcbx.c
3401
*buff = REG_RD(pdev,
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_dcbx.c
3627
*buff = REG_RD(pdev,
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_dcbx.c
4151
*buff = REG_RD(pdev,
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_dcbx.c
4474
*buff = REG_RD(pdev,
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_devinfo.c
1048
u32_t val = REG_RD(pdev,MCP_REG_MCPR_NVM_CFG4);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_devinfo.c
176
val = REG_RD(pdev, PCICFG_OFFSET + GRC_CONFIG_REG_PF_INIT_VF);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_devinfo.c
1789
val = REG_RD(pdev,MISC_REG_SHARED_MEM_ADDR);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_devinfo.c
1810
CHIP_NUM(pdev), pcicfg_chip, REG_RD(pdev, 0x2000));
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_devinfo.c
1843
val = REG_RD(pdev,MISC_REG_SHARED_MEM_ADDR);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_devinfo.c
219
val = REG_RD(pdev, BAR_ME_REGISTER);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_devinfo.c
2622
pdev->hw_info.shmem_base2 = REG_RD(pdev, PATH_ID(pdev) ? MISC_REG_GENERIC_CR_1 : MISC_REG_GENERIC_CR_0);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_devinfo.c
4079
u32_t real_fw_ver = REG_RD(pdev,0x2c0000); /* Read acitve FW version from 1st DWORD of XSTORM params*/
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_devinfo.c
590
pdev->hw_info.grc_didvid = REG_RD(pdev, (PCICFG_OFFSET + PCICFG_VENDOR_ID_OFFSET));
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_devinfo.c
612
tr_e = REG_RD(pdev, PGLUE_B_REG_INTERNAL_PFID_ENABLE_TARGET_READ);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_devinfo.c
613
tw_e = REG_RD(pdev, PGLUE_B_REG_INTERNAL_PFID_ENABLE_TARGET_WRITE);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_devinfo.c
614
m_e = REG_RD(pdev, PGLUE_B_REG_INTERNAL_PFID_ENABLE_MASTER);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_devinfo.c
632
val=REG_RD(PFDEV(pdev),MISC_REG_CHIP_NUM);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_devinfo.c
636
val=REG_RD(PFDEV(pdev),MISC_REG_CHIP_TYPE);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_devinfo.c
654
val=REG_RD(PFDEV(pdev),MISC_REG_CHIP_REV);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_devinfo.c
675
val=REG_RD(PFDEV(pdev),MISC_REG_CHIP_METAL);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_devinfo.c
677
val=REG_RD(PFDEV(pdev),MISC_REG_BOND_ID);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_devinfo.c
681
val=REG_RD(PFDEV(pdev),MISC_REG_CHIP_TEST_REG);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_devinfo.c
691
val = REG_RD(PFDEV(pdev), MISC_REG_PORT4MODE_EN_OVWR);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_devinfo.c
695
val = REG_RD(PFDEV(pdev), MISC_REG_PORT4MODE_EN);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_devinfo.c
758
lm_igu_sb->block_dump = val = REG_RD(PFDEV(pdev), IGU_REG_MAPPING_MEMORY + 4*igu_sb_id);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_devinfo.c
975
if (REG_RD(PFDEV(pdev), IGU_REG_BLOCK_CONFIGURATION) & IGU_BLOCK_CONFIGURATION_REG_BACKWARD_COMP_EN)
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_er.c
112
val = REG_RD(pdev, IGU_REG_BLOCK_CONFIGURATION);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_er.c
224
sr_cnt = REG_RD(pdev, PXP2_REG_RD_SR_CNT);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_er.c
225
blk_cnt = REG_RD(pdev, PXP2_REG_RD_BLK_CNT);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_er.c
226
port_is_idle_0 = REG_RD(pdev, PXP2_REG_RD_PORT_IS_IDLE_0);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_er.c
227
port_is_idle_1 = REG_RD(pdev, PXP2_REG_RD_PORT_IS_IDLE_1);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_er.c
228
pgl_exp_rom2 = REG_RD(pdev, PXP2_REG_PGL_EXP_ROM2);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_er.c
229
pgl_b_reg_tags = REG_RD(pdev, PGLUE_B_REG_TAGS_63_32);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_er.c
269
pend_bits = REG_RD(pdev, IGU_REG_PENDING_BITS_STATUS);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_er.c
480
val = REG_RD(pdev, MISC_REG_AEU_ENABLE2_NIG_0);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_er.c
484
val = REG_RD(pdev, MISC_REG_AEU_ENABLE2_PXP_0);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_er.c
489
val = REG_RD(pdev, MISC_REG_AEU_ENABLE4_NIG_0);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_er.c
493
val = REG_RD(pdev, MISC_REG_AEU_ENABLE4_PXP_0);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_er.c
532
por_aux_register = REG_RD(pdev, LM_ERROR_RECOVERY_COUNTER_HW_REGISTER);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_er.c
574
por_aux_register = REG_RD(pdev, LM_ERROR_RECOVERY_COUNTER_HW_REGISTER);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_er.c
623
por_aux_register = REG_RD(pdev, LM_ERROR_RECOVERY_COUNTER_HW_REGISTER);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_er.c
668
por_aux_register = REG_RD(pdev, LM_ERROR_RECOVERY_COUNTER_HW_REGISTER);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_er.c
725
por_aux_register = REG_RD(pdev, LM_ERROR_RECOVERY_COUNTER_HW_REGISTER);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_er.c
755
por_aux_register = REG_RD(pdev, LM_ERROR_RECOVERY_COUNTER_HW_REGISTER);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_er.c
786
por_aux_register = REG_RD(pdev, LM_ERROR_RECOVERY_COUNTER_HW_REGISTER);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_er.c
91
val = REG_RD(pdev, MISC_REG_AEU_GENERAL_MASK);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_access.c
1031
reg_val = REG_RD(pdev, NIG_REG_NIG_EMAC0_EN);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_access.c
1033
reg_val = REG_RD(pdev, NIG_REG_NIG_EMAC1_EN);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_access.c
1039
reg_val = REG_RD(pdev, emac_base + EMAC_REG_EMAC_LED);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_access.c
1104
reg_val = REG_RD(pdev, emac_base + EMAC_REG_EMAC_LED);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_access.c
1110
reg_val = REG_RD(pdev, emac_base + EMAC_REG_EMAC_LED);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_access.c
1116
reg_val = REG_RD(pdev, emac_base + EMAC_REG_EMAC_LED);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_access.c
1122
reg_val = REG_RD(pdev, emac_base + EMAC_REG_EMAC_LED);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_access.c
1128
*value_ptr = REG_RD(pdev, NIG_REG_LED_10G_P0);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_access.c
1130
*value_ptr = REG_RD(pdev, NIG_REG_LED_10G_P1);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_access.c
1135
reg_val = REG_RD(pdev, emac_base + EMAC_REG_EMAC_LED);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_access.c
1141
*value_ptr = REG_RD(pdev, NIG_REG_LED_STATUS_ACTIVE_P0);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_access.c
1143
*value_ptr = REG_RD(pdev, NIG_REG_LED_STATUS_ACTIVE_P1);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_access.c
1193
val = REG_RD(pdev, 0x2004);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_access.c
1212
val = REG_RD(pdev, HC_REG_INT_MASK + 4*PORT_ID(pdev) );
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_access.c
1510
lock_status = REG_RD(pdev, hw_lock_cntr_reg);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_access.c
1522
lock_status= REG_RD(pdev, hw_lock_cntr_reg);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_access.c
1568
lock_status = REG_RD(pdev, hw_lock_cntr_reg);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_access.c
1628
lock_status = REG_RD(pdev, hw_lock_cntr_reg);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_access.c
1645
val=REG_RD(pdev,reg_offset);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_access.c
1649
val=REG_RD(pdev,reg_offset);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_access.c
1676
val=REG_RD(pdev,GRCBASE_PCICONFIG+PCICFG_COMMAND_OFFSET);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_access.c
1692
val=REG_RD(pdev,GRCBASE_PCICONFIG+PCICFG_DEVICE_CONTROL);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_access.c
1716
val=REG_RD(pdev,GRCBASE_PCICONFIG+PCICFG_COMMAND_OFFSET);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_access.c
1742
pci_devctl = REG_RD(pdev,GRCBASE_PCICONFIG + PCICFG_DEVICE_CONTROL);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_access.c
1827
*buf_ptr = REG_RD(pdev, reg_offset + current_offset);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_access.c
392
val = REG_RD(pdev,MISC_REG_SPIO_INT) ;
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_access.c
397
val = REG_RD(pdev,MISC_REG_SPIO_EVENT_EN) ;
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_access.c
432
swap_val = REG_RD(pdev, NIG_REG_PORT_SWAP);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_access.c
433
swap_override = REG_RD(pdev, NIG_REG_STRAP_OVERRIDE);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_access.c
491
reg_val = REG_RD(pdev, MISC_REG_GPIO);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_access.c
537
swap_val = REG_RD(pdev, NIG_REG_PORT_SWAP);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_access.c
538
swap_override = REG_RD(pdev, NIG_REG_STRAP_OVERRIDE);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_access.c
557
gpio_reg = (REG_RD(pdev, MISC_REG_GPIO) & MISC_REGISTERS_GPIO_FLOAT);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_access.c
616
gpio_reg = REG_RD(pdev, MISC_REG_GPIO);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_access.c
675
swap_val = REG_RD(pdev, NIG_REG_PORT_SWAP);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_access.c
676
swap_override = REG_RD(pdev, NIG_REG_STRAP_OVERRIDE);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_access.c
691
gpio_reg = REG_RD(pdev, MISC_REG_GPIO_INT);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_access.c
737
reg_val = REG_RD(pdev, MISC_REG_SPIO);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_access.c
780
reg_val = REG_RD(pdev, MISC_REG_SPIO);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_access.c
820
reg_val = REG_RD(pdev, MISC_REG_SPIO);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_access.c
899
*mode_idx_ptr = REG_RD(pdev, NIG_REG_LED_MODE_P0);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_access.c
902
*mode_idx_ptr = REG_RD(pdev, NIG_REG_LED_MODE_P1);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_access.c
936
reg_val = REG_RD(pdev, emac_base + EMAC_REG_EMAC_LED);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_access.c
945
reg_val = REG_RD(pdev, emac_base + EMAC_REG_EMAC_LED);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_access.c
954
reg_val = REG_RD(pdev, emac_base + EMAC_REG_EMAC_LED);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_access.c
963
reg_val = REG_RD(pdev, emac_base + EMAC_REG_EMAC_LED);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_access.c
981
reg_val = REG_RD(pdev, NIG_REG_NIG_EMAC0_EN);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_access.c
983
reg_val = REG_RD(pdev, NIG_REG_NIG_EMAC1_EN);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_access.c
989
reg_val = REG_RD(pdev, emac_base + EMAC_REG_EMAC_LED);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_attn.c
1011
val = REG_RD(pdev,CFC_REG_CFC_INT_STS);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_attn.c
1023
valc = REG_RD(pdev,CFC_REG_CFC_INT_STS_CLR);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_attn.c
1028
u32_t val = REG_RD(pdev,PXP_REG_PXP_INT_STS_0);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_attn.c
1063
val = REG_RD(pdev, offset );
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_attn.c
1112
val = REG_RD(pdev, MISC_REG_AEU_AFTER_INVERT_1_FUNC_0 + PORT_ID(pdev)*4);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_attn.c
1742
attn_sig_af_inv_arr[i] = REG_RD(pdev, pdev->vars.attn_sig_af_inv_reg_addr[i]);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_attn.c
1792
val=REG_RD(pdev,DORQ_REG_DORQ_INT_STS);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_attn.c
1806
pdev->vars.dq_vf_type_val_err_fid = REG_RD(pdev,DORQ_REG_VF_TYPE_VAL_ERR_FID);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_attn.c
1807
pdev->vars.dq_vf_type_val_err_mcid = REG_RD(pdev,DORQ_REG_VF_TYPE_VAL_ERR_MCID);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_attn.c
1810
valc = REG_RD(pdev,DORQ_REG_DORQ_INT_STS_CLR);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_attn.c
2040
mask_val = REG_RD(pdev, port_reg_name);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_attn.c
596
val = REG_RD(pdev, MISC_REG_GRC_TIMEOUT_ATTN);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_attn.c
801
nig_status_port = REG_RD(pdev, NIG_REG_STATUS_INTERRUPT_PORT0);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_attn.c
839
nig_status_port = REG_RD(pdev, NIG_REG_STATUS_INTERRUPT_PORT1);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_attn.c
900
mask_val=REG_RD(pdev, port_reg_name);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_attn.c
932
nig_mask = REG_RD(pdev, NIG_REG_MASK_INTERRUPT_PORT0 + 4*PORT_ID(pdev));
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_attn.c
994
val = REG_RD(pdev, IGU_REG_ATTENTION_ACK_BITS);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_init_reset.c
1058
swap_val = REG_RD(pdev,NIG_REG_PORT_SWAP);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_init_reset.c
1059
swap_en = REG_RD(pdev,NIG_REG_STRAP_OVERRIDE);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_init_reset.c
1328
val=REG_RD(pdev,TM_REG_LIN0_SCAN_ON+(4*port));
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_init_reset.c
1427
val=REG_RD(pdev,BRB1_REG_PORT_NUM_OCC_BLOCKS_0+(4*port));
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_init_reset.c
1660
reg_port_arr[idx] = REG_RD(pdev, data->offset );
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_init_reset.c
1795
non_split_vals[idx] = REG_RD( pdev, non_split_offsets[idx].offset );
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_init_reset.c
1897
val = REG_RD( pdev, MISC_REG_E1HMF_MODE);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_init_reset.c
1902
val = REG_RD( pdev, MISC_REG_E1HMF_MODE_P0 + PORT_ID(pdev)*4);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_init_reset.c
2435
val = REG_RD(pdev, ncsi_oem_data_addr + offset_unused);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_init_reset.c
2448
val = REG_RD(pdev, ncsi_oem_data_addr + offset + str_idx);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_init_reset.c
2643
val = REG_RD(pdev, MISC_REG_SPIO_EVENT_EN);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_init_reset.c
2648
val=REG_RD(pdev, offset );
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_init_reset.c
2659
val = REG_RD(pdev, offset);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_init_reset.c
3215
kuku= REG_RD(pdev, XSEM_REG_PASSIVE_BUFFER);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_init_reset.c
3216
kuku = REG_RD(pdev, XSEM_REG_PASSIVE_BUFFER + 4);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_init_reset.c
3217
kuku = REG_RD(pdev, XSEM_REG_PASSIVE_BUFFER + 8);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_init_reset.c
3219
kuku = REG_RD(pdev, CSEM_REG_PASSIVE_BUFFER );
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_init_reset.c
3220
kuku = REG_RD(pdev, CSEM_REG_PASSIVE_BUFFER + 4);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_init_reset.c
3221
kuku = REG_RD(pdev, CSEM_REG_PASSIVE_BUFFER + 8);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_init_reset.c
3223
kuku = REG_RD(pdev, TSEM_REG_PASSIVE_BUFFER );
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_init_reset.c
3224
kuku = REG_RD(pdev, TSEM_REG_PASSIVE_BUFFER + 4);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_init_reset.c
3225
kuku = REG_RD(pdev, TSEM_REG_PASSIVE_BUFFER + 8);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_init_reset.c
3227
kuku = REG_RD(pdev, USEM_REG_PASSIVE_BUFFER );
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_init_reset.c
3228
kuku = REG_RD(pdev, USEM_REG_PASSIVE_BUFFER + 4);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_init_reset.c
3229
kuku = REG_RD(pdev, USEM_REG_PASSIVE_BUFFER + 8);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_init_reset.c
3468
val=REG_RD(pdev, IGU_REG_PF_CONFIGURATION);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_init_reset.c
3819
val=REG_RD(pdev,NIG_REG_STAT2_BRB_OCTET);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_init_reset.c
3820
trash=REG_RD(pdev,NIG_REG_STAT2_BRB_OCTET+4);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_init_reset.c
3839
val=REG_RD(pdev,PRS_REG_NUM_OF_PACKETS);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_init_reset.c
3885
val=REG_RD(pdev,NIG_REG_STAT2_BRB_OCTET);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_init_reset.c
3886
trash=REG_RD(pdev,NIG_REG_STAT2_BRB_OCTET+4);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_init_reset.c
3902
val=REG_RD(pdev,PRS_REG_NUM_OF_PACKETS);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_init_reset.c
3916
val=REG_RD(pdev,PRS_REG_NUM_OF_PACKETS);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_init_reset.c
3927
trash=REG_RD(pdev,NIG_REG_INGRESS_EOP_LB_FIFO);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_init_reset.c
3929
val=REG_RD(pdev,NIG_REG_INGRESS_EOP_LB_EMPTY);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_init_reset.c
414
tq_freed_cnt_last = tq_freed_cnt_start = REG_RD(PFDEV(pdev), pbf_reg_pN_tq_lines_freed_cnt);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_init_reset.c
415
tq_occ = tq_to_free = REG_RD(PFDEV(pdev), pbf_reg_pN_tq_occupancy);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_init_reset.c
423
tq_occ = REG_RD(PFDEV(pdev), pbf_reg_pN_tq_occupancy);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_init_reset.c
424
tq_freed_cnt_last = REG_RD(PFDEV(pdev), pbf_reg_pN_tq_lines_freed_cnt);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_init_reset.c
4265
val = REG_RD(pdev,NIG_REG_STAT2_BRB_OCTET);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_init_reset.c
4266
trash = REG_RD(pdev,NIG_REG_STAT2_BRB_OCTET+4);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_init_reset.c
4305
temp = REG_RD(pdev,PXP2_REG_PXP2_INT_STS_CLR_0);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_init_reset.c
471
inernal_freed_crd_last = inernal_freed_crd_start = REG_RD(PFDEV(pdev), pbf_reg_pN_internal_crd_freed);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_init_reset.c
472
credit_last = credit_start = REG_RD(PFDEV(pdev), pbf_reg_pN_credit);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_init_reset.c
473
init_crd = REG_RD(PFDEV(pdev), pbf_reg_pN_init_crd);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_init_reset.c
483
credit_last = REG_RD(PFDEV(pdev), pbf_reg_pN_credit);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_init_reset.c
484
inernal_freed_crd_last = REG_RD(PFDEV(pdev), pbf_reg_pN_internal_crd_freed);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_init_reset.c
534
tmp = REG_RD(pdev,CFC_REG_WEAK_ENABLE_PF);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_init_reset.c
537
tmp = REG_RD(pdev,PBF_REG_DISABLE_PF);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_init_reset.c
540
tmp = REG_RD(pdev,IGU_REG_PCI_PF_MSI_EN);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_init_reset.c
543
tmp = REG_RD(pdev,IGU_REG_PCI_PF_MSIX_EN);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_init_reset.c
546
tmp = REG_RD(pdev,IGU_REG_PCI_PF_MSIX_FUNC_MASK);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_init_reset.c
549
tmp = REG_RD(pdev,PGLUE_B_REG_SHADOW_BME_PF_7_0_CLR);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_init_reset.c
552
tmp = REG_RD(pdev,PGLUE_B_REG_FLR_REQUEST_PF_7_0_CLR);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_init_reset.c
558
m_en = REG_RD(pdev, PGLUE_B_REG_INTERNAL_PFID_ENABLE_MASTER);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_init_reset.c
627
val = REG_RD(pdev,MISC_REG_RESET_REG_1) ;
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_init_reset.c
636
val = REG_RD(pdev,MISC_REG_RESET_REG_1) ;
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_init_reset.c
714
restore_arr[idx] = REG_RD( pdev, reg_arr_ptr[idx] );
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_init_reset.c
734
val |= ( REG_RD( pdev, offset ) ) << idx ;
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_init_reset.c
808
val = REG_RD(pdev, PGLUE_B_REG_PGLUE_B_INT_STS);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_init_reset.c
900
rst_dorq_val = REG_RD(pdev,MISC_REG_RESET_REG_1);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_init_reset.c
905
val = REG_RD(pdev,DORQ_REG_NORM_CID_OFST);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_mcp.c
1106
reg = REG_RD(pdev, offset);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_mcp.c
1110
if( REG_RD(pdev, offset) != reg )
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_mcp.c
145
shmem = REG_RD(pdev, MISC_REG_SHARED_MEM_ADDR);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_mcp.c
171
shmem = REG_RD(pdev, MISC_REG_SHARED_MEM_ADDR);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_mcp.c
191
val = REG_RD(pdev, shmem + validity_offset);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_mcp.c
241
val = REG_RD(pdev, MISC_REG_DRIVER_CONTROL_15);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_mcp.c
285
val_rd = REG_RD(pdev, GRCBASE_MCP + 0x9c);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_mcp.c
320
val= REG_RD(pdev, GRCBASE_MCP + 0x9c);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_nvram.c
123
val=REG_RD(pdev, MCP_REG_MCPR_NVM_SW_ARB);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_nvram.c
170
val=REG_RD(pdev, MCP_REG_MCPR_NVM_COMMAND);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_nvram.c
212
val=REG_RD(pdev, MCP_REG_MCPR_NVM_COMMAND);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_nvram.c
237
val=REG_RD(pdev, MCP_REG_MCPR_NVM_ACCESS_ENABLE);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_nvram.c
259
val=REG_RD(pdev, MCP_REG_MCPR_NVM_ACCESS_ENABLE);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_nvram.c
311
val=REG_RD(pdev, MCP_REG_MCPR_NVM_COMMAND);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_nvram.c
314
val=REG_RD(pdev, MCP_REG_MCPR_NVM_READ);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_nvram.c
384
val=REG_RD(pdev, MCP_REG_MCPR_NVM_COMMAND);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_nvram.c
72
val=REG_RD(pdev, MCP_REG_MCPR_NVM_SW_ARB);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_phy.c
255
tmp=REG_RD(pdev,emac_base+EMAC_REG_EMAC_MDIO_MODE);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_phy.c
274
tmp=REG_RD(pdev,emac_base+EMAC_REG_EMAC_MDIO_COMM);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_phy.c
295
tmp=REG_RD(pdev,emac_base+EMAC_REG_EMAC_MDIO_MODE);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_phy.c
329
val=REG_RD(pdev,emac_base+EMAC_REG_EMAC_MDIO_MODE);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_phy.c
347
val=REG_RD(pdev,emac_base+EMAC_REG_EMAC_MDIO_COMM);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_phy.c
372
val=REG_RD(pdev,emac_base+EMAC_REG_EMAC_MDIO_MODE);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_phy.c
77
return REG_RD(cb, reg_addr);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_power.c
376
val = REG_RD(pdev, emac.emac_mode);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_power.c
381
val = REG_RD(pdev, rpm.rpm_config);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_power.c
449
pf0_pcie_status_control = REG_RD(pdev, pcicfg_device_control_offset);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_power.c
463
u32_t own_pcie_status_control = REG_RD(pdev, pcicfg_device_control_offset);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_power.c
474
pf0_pcie_status_control = REG_RD(pdev, pcicfg_device_control_offset);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_sb.c
1005
while ((REG_RD(pdev, igu_addr_ack) & sb_bit) && --cnt)
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_sb.c
1010
if ((REG_RD(pdev, igu_addr_ack) & sb_bit))
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_sb.c
104
intr_status = REG_RD(pdev, INTR_BLK_SIMD_ADDR_WOMASK(pdev));
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_sb.c
120
intr_status = REG_RD(pdev, INTR_BLK_SIMD_ADDR_WMASK(pdev));
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_sb.c
1201
val=REG_RD(pdev, IGU_REG_PF_CONFIGURATION);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_sb.c
1276
val=REG_RD(pdev, reg_name);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_sb.c
1313
val = REG_RD(pdev, IGU_REG_PF_CONFIGURATION);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_sb.c
679
REG_RD(pdev, (PORT_ID(pdev) ? MISC_REG_AEU_ENABLE1_FUNC_1_OUT_0 : MISC_REG_AEU_ENABLE1_FUNC_0_OUT_0) + group_idx*16);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_sb.c
681
REG_RD(pdev, (PORT_ID(pdev) ? MISC_REG_AEU_ENABLE2_FUNC_1_OUT_0 : MISC_REG_AEU_ENABLE2_FUNC_0_OUT_0) + group_idx*16);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_sb.c
683
REG_RD(pdev, (PORT_ID(pdev) ? MISC_REG_AEU_ENABLE3_FUNC_1_OUT_0 : MISC_REG_AEU_ENABLE3_FUNC_0_OUT_0) + group_idx*16);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_sb.c
685
REG_RD(pdev, (PORT_ID(pdev) ? MISC_REG_AEU_ENABLE4_FUNC_1_OUT_0 : MISC_REG_AEU_ENABLE4_FUNC_0_OUT_0) + group_idx*16);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_sb.c
689
REG_RD(pdev, (PORT_ID(pdev) ? MISC_REG_AEU_ENABLE5_FUNC_1_OUT_0 : MISC_REG_AEU_ENABLE5_FUNC_0_OUT_0) + group_idx*4);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_sb.c
984
while (!(REG_RD(pdev, igu_addr_ack) & sb_bit) && --cnt)
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_sb.c
989
if (!(REG_RD(pdev, igu_addr_ack) & sb_bit))
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_stats.c
3712
pdev->vars.stats.stats_collect.stats_hw.misc_stats_query.tx_lpi_count = REG_RD(pdev, eee);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_stats.c
591
val = REG_RD(pdev, HC_REG_INT_MASK + 4*PORT_ID(pdev) );
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_stats.c
710
dummy = REG_RD( pdev, emac_base + reg_start[i]+(j*sizeof(u32_t))) ; /*Clear stats registers by reading from from ReadClear RX/RXerr/TX STAT banks*/
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/bnxe_fw_funcs.c
43
u32_t curr_cos = REG_RD(pdev, QM_REG_QVOQIDX_0 + q_num * 4);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/bnxe_fw_funcs.c
70
reg_bit_map = REG_RD(pdev, reg_addr);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/bnxe_fw_funcs.c
75
reg_bit_map = REG_RD(pdev, reg_addr);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/bnxe_fw_funcs.c
82
reg_bit_map = REG_RD(pdev, reg_addr);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/include/lm5710.h
4230
(REG_RD(_pdev, LM_SHMEM2_ADDR(_pdev, size)) > OFFSETOF(struct shmem2_region, field)))
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/include/lm5710.h
4305
db_fill=REG_RD(pf_dev,DORQ_REG_DQ_FILL_LVLF);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/include/lm5710.h
4319
db_fill=REG_RD(pf_dev,DORQ_REG_DQ_FILL_LVLF);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/include/lm5710.h
518
*(_unicore_intr_val_ptr) = REG_RD(_pdev, _nig_reg_name); \
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/vf/basic_vf/lm_vf.c
530
val=REG_RD(PFDEV(pdev), IGU_REG_VF_CONFIGURATION);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/vf/basic_vf/lm_vf.c
574
val = REG_RD(PFDEV(pdev), IGU_REG_VF_CONFIGURATION);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/vf/channel_vf/lm_vf.c
2947
val=REG_RD(PFDEV(pdev), IGU_REG_VF_CONFIGURATION);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/vf/channel_vf/lm_vf.c
2991
val = REG_RD(PFDEV(pdev), IGU_REG_VF_CONFIGURATION);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/vf/channel_vf/lm_vf.c
3341
tq_freed_cnt_last = tq_freed_cnt_start = REG_RD(PFDEV(pdev), pbf_reg_pN_tq_lines_freed_cnt);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/vf/channel_vf/lm_vf.c
3342
tq_occ = tq_to_free = REG_RD(PFDEV(pdev), pbf_reg_pN_tq_occupancy);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/vf/channel_vf/lm_vf.c
3348
tq_occ = REG_RD(PFDEV(pdev), pbf_reg_pN_tq_occupancy);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/vf/channel_vf/lm_vf.c
3349
tq_freed_cnt_last = REG_RD(PFDEV(pdev), pbf_reg_pN_tq_lines_freed_cnt);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/vf/channel_vf/lm_vf.c
3392
inernal_freed_crd_last = inernal_freed_crd_start = REG_RD(PFDEV(pdev), pbf_reg_pN_internal_crd_freed);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/vf/channel_vf/lm_vf.c
3393
credit_last = credit_start = REG_RD(PFDEV(pdev), pbf_reg_pN_credit);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/vf/channel_vf/lm_vf.c
3394
init_crd = REG_RD(PFDEV(pdev), pbf_reg_pN_init_crd);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/vf/channel_vf/lm_vf.c
3402
credit_last = REG_RD(PFDEV(pdev), pbf_reg_pN_credit);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/vf/channel_vf/lm_vf.c
3403
inernal_freed_crd_last = REG_RD(PFDEV(pdev), pbf_reg_pN_internal_crd_freed);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/vf/channel_vf/lm_vf.c
3711
while (!(REG_RD(pdev, igu_addr_ack) & sb_bit) && --cnt)
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/vf/channel_vf/lm_vf.c
3716
if (!(REG_RD(pdev, igu_addr_ack) & sb_bit))
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/vf/channel_vf/lm_vf.c
3732
while ((REG_RD(pdev, igu_addr_ack) & sb_bit) && --cnt)
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/vf/channel_vf/lm_vf.c
3737
if ((REG_RD(pdev, igu_addr_ack) & sb_bit))
usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c
1143
if (REG_RD(p_hwfn, addr)) {
usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c
1156
while (!REG_RD(p_hwfn, addr) && count--)
usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c
1159
if (REG_RD(p_hwfn, addr))
usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c
2766
p_hwfn->hw_info.opaque_fid = (u16) REG_RD(p_hwfn,
usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c
2769
p_hwfn->hw_info.concrete_fid = REG_RD(p_hwfn, PXP_PF_ME_CONCRETE_ADDR);
usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_dev.c
3966
if (REG_RD(p_hwfn, PXP_PF_ME_OPAQUE_ADDR) == 0xffffffff) {
usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_hw.c
253
is_empty = REG_RD(p_hwfn, bar_addr) == 0;
usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_hw.c
296
val = REG_RD(p_hwfn, bar_addr);
usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_int.c
2436
intr_status_lo = REG_RD(p_hwfn,
usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_int.c
2439
intr_status_hi = REG_RD(p_hwfn,