usr/src/cmd/mdb/intel/mdb/proc_amd64dep.c

116

{ "rax", REG_RAX, MDB_TGT_R_EXPORT },

usr/src/cmd/mdb/intel/mdb/proc_amd64dep.c

117

{ "eax", REG_RAX, MDB_TGT_R_EXPORT | MDB_TGT_R_32 },

usr/src/cmd/mdb/intel/mdb/proc_amd64dep.c

118

{ "ax", REG_RAX, MDB_TGT_R_EXPORT | MDB_TGT_R_16 },

usr/src/cmd/mdb/intel/mdb/proc_amd64dep.c

119

{ "ah", REG_RAX, MDB_TGT_R_EXPORT | MDB_TGT_R_8H },

usr/src/cmd/mdb/intel/mdb/proc_amd64dep.c

120

{ "al", REG_RAX, MDB_TGT_R_EXPORT | MDB_TGT_R_8L },

usr/src/cmd/mdb/intel/mdb/proc_amd64dep.c

221

grs[REG_RAX], grs[REG_R8]);

usr/src/cmd/mdb/intel/modules/genunix/gcore_isadep.c

64

grp[REG_RAX] = rp->r_rax;

usr/src/cmd/ptools/pflags/pflags.c

521

dst[EAX] = src[REG_RAX];

usr/src/cmd/sgs/demo_rdb/amd64/regs.c

68

disp_reg_line(ph, &pstatus, "rcx", REG_RCX, "rax", REG_RAX);

usr/src/cmd/truss/ipc.c

404

(void) Lputareg(Lwp, REG_RAX, (prgreg_t)what);

usr/src/lib/libc/amd64/genassym.c

61

(void) printf("#define\tRAX_OFF\t0x%x\n", REG_RAX * 8);

usr/src/lib/libm/common/m9x/__fex_sse.c

49

#define regno(X) ((X < 4)? REG_RAX - X : \

usr/src/lib/libm/common/m9x/__fex_sse.c

50

((X > 4)? REG_RAX + 1 - X : REG_RSP))

usr/src/lib/libproc/amd64/Pisadep.c

249

dst[REG_RAX] = (uint32_t)src[EAX];

usr/src/lib/libproc/amd64/Pisadep.c

600

P->status.pr_lwp.pr_reg[REG_RAX] = sysindex;

usr/src/lib/libproc/amd64/Pisadep.c

608

P->status.pr_lwp.pr_reg[REG_RAX] = sysindex;

usr/src/lib/libproc/common/P32ton.c

227

dst[REG_RAX] = (uint32_t)src[EAX];

usr/src/lib/libproc/common/P32ton.c

564

dst[EAX] = src[REG_RAX];

usr/src/lib/libproc/common/Pcore.c

571

lwp->lwp_status.pr_reg[REG_RAX] = prs64->pr_reg.lxr_rax;

usr/src/lib/libproc/common/Pcore.c

603

lwp->lwp_status.pr_reg[REG_RAX] = prs32->pr_reg.lxr_ax;

usr/src/lib/libproc/common/libproc.h

95

#define R_RVAL1 REG_RAX /* register holding a function return value */

usr/src/ucblib/libucb/i386/sys/signal.c

108

sc.sc_r0 = (long)ucp->uc_mcontext.gregs[REG_RAX];

usr/src/ucblib/libucb/i386/sys/signal.c

180

ucp->uc_mcontext.gregs[REG_RAX] = (long)sc.sc_r0;

usr/src/uts/i86pc/os/dtrace_subr.c

342

case REG_RAX:

usr/src/uts/intel/dtrace/dtrace_isa.c

546

REG_RAX, /* EAX */

usr/src/uts/intel/dtrace/dtrace_isa.c

584

case REG_RAX:

usr/src/uts/intel/dtrace/dtrace_isa.c

661

case REG_RAX:

usr/src/uts/intel/dtrace/fasttrap_isa.c

1462

curthread->t_dtrace_reg = REG_RAX;

usr/src/uts/intel/dtrace/fasttrap_isa.c

1651

case REG_RAX: return (rp->r_rax);

usr/src/uts/intel/dtrace/fasttrap_isa.c

179

REG_RAX, REG_RCX, REG_RDX, REG_RBX, REG_RSP, REG_RBP, REG_RSI, REG_RDI,

usr/src/uts/intel/fs/proc/prmachdep.c

144

dst[REG_RAX] = (uint32_t)src[EAX];

usr/src/uts/intel/os/archdep.c

299

grp[REG_RAX] = rp->r_rax;

usr/src/uts/intel/os/archdep.c

401

dmc->gregs[REG_RAX] = (greg_t)(uint32_t)smc->gregs[EAX];

usr/src/uts/intel/os/archdep.c

553

rp->r_rax = grp[REG_RAX];

usr/src/uts/intel/os/archdep.c

604

rp->r_rax = (uint32_t)grp[REG_RAX];

usr/src/uts/intel/sys/procfs_isa.h

105

#define R_R0 REG_RAX

usr/src/uts/intel/sys/regset.h

124

#define REG_R0 REG_RAX