usr/src/cmd/mdb/intel/mdb/proc_amd64dep.c

133

{ "gs", REG_GS, MDB_TGT_R_EXPORT },

usr/src/cmd/mdb/intel/mdb/proc_amd64dep.c

240

grs[REG_CS], grs[REG_FS], grs[REG_GS]);

usr/src/cmd/mdb/intel/modules/genunix/gcore_isadep.c

79

grp[REG_GS] = pcb->pcb_gs;

usr/src/cmd/mdb/intel/modules/genunix/gcore_isadep.c

84

grp[REG_GS] = rp->r_gs;

usr/src/cmd/ptools/pflags/pflags.c

511

dst[GS] = src[REG_GS];

usr/src/cmd/sgs/demo_rdb/amd64/regs.c

63

disp_reg_line(ph, &pstatus, "gs", REG_GS, "fs", REG_FS);

usr/src/cmd/truss/fcall.c

933

Lsp->pr_reg[REG_FS] : Lsp->pr_reg[REG_GS];

usr/src/lib/libproc/amd64/Pisadep.c

240

dst[REG_GS] = (uint16_t)src[GS];

usr/src/lib/libproc/common/P32ton.c

217

dst[REG_GS] = (uint32_t)src[GS];

usr/src/lib/libproc/common/P32ton.c

554

dst[GS] = src[REG_GS];

usr/src/lib/libproc/common/Pcore.c

578

lwp->lwp_status.pr_reg[REG_GS] = prs64->pr_reg.lxr_gs;

usr/src/lib/libproc/common/Pcore.c

593

lwp->lwp_status.pr_reg[REG_GS] = prs32->pr_reg.lxr_gs;

usr/src/uts/intel/dtrace/dtrace_isa.c

535

REG_GS, /* GS */

usr/src/uts/intel/dtrace/dtrace_isa.c

608

case REG_GS:

usr/src/uts/intel/dtrace/fasttrap_isa.c

1660

case REG_GS: return (rp->r_gs);

usr/src/uts/intel/fs/proc/prmachdep.c

134

dst[REG_GS] = (uint16_t)src[GS];

usr/src/uts/intel/os/archdep.c

316

grp[REG_GS] = pcb->pcb_gs;

usr/src/uts/intel/os/archdep.c

321

grp[REG_GS] = rp->r_gs;

usr/src/uts/intel/os/archdep.c

391

dmc->gregs[REG_GS] = (greg_t)(uint32_t)smc->gregs[GS];

usr/src/uts/intel/os/archdep.c

589

pcb->pcb_gs = fix_segreg(grp[REG_GS], IS_NOT_CS, datamodel);

usr/src/uts/intel/os/archdep.c

626

pcb->pcb_gs = fix_segreg(grp[REG_GS], IS_NOT_CS, datamodel);

usr/src/uts/intel/os/sundep.c

331

if (grp[REG_GS] == LWPGS_SEL)

usr/src/uts/intel/os/sundep.c

355

if (grp[REG_GS] == 0x1c3) /* hard code legacy LWPGS_SEL */