usr/src/uts/common/io/hxge/hxge_ndd.c

1138

{"RDC", RDC_BASE_ADDR},

usr/src/uts/common/io/hxge/hxge_rdc_hw.h

35

#define RDC_PAGE_HANDLE (RDC_BASE_ADDR + 0x8)

usr/src/uts/common/io/hxge/hxge_rdc_hw.h

36

#define RDC_RX_CFG1 (RDC_BASE_ADDR + 0x20)

usr/src/uts/common/io/hxge/hxge_rdc_hw.h

37

#define RDC_RX_CFG2 (RDC_BASE_ADDR + 0x28)

usr/src/uts/common/io/hxge/hxge_rdc_hw.h

38

#define RDC_RBR_CFG_A (RDC_BASE_ADDR + 0x40)

usr/src/uts/common/io/hxge/hxge_rdc_hw.h

39

#define RDC_RBR_CFG_B (RDC_BASE_ADDR + 0x48)

usr/src/uts/common/io/hxge/hxge_rdc_hw.h

40

#define RDC_RBR_KICK (RDC_BASE_ADDR + 0x50)

usr/src/uts/common/io/hxge/hxge_rdc_hw.h

41

#define RDC_RBR_QLEN (RDC_BASE_ADDR + 0x58)

usr/src/uts/common/io/hxge/hxge_rdc_hw.h

42

#define RDC_RBR_HEAD (RDC_BASE_ADDR + 0x68)

usr/src/uts/common/io/hxge/hxge_rdc_hw.h

43

#define RDC_RCR_CFG_A (RDC_BASE_ADDR + 0x80)

usr/src/uts/common/io/hxge/hxge_rdc_hw.h

44

#define RDC_RCR_CFG_B (RDC_BASE_ADDR + 0x88)

usr/src/uts/common/io/hxge/hxge_rdc_hw.h

45

#define RDC_RCR_QLEN (RDC_BASE_ADDR + 0x90)

usr/src/uts/common/io/hxge/hxge_rdc_hw.h

46

#define RDC_RCR_TAIL (RDC_BASE_ADDR + 0xA0)

usr/src/uts/common/io/hxge/hxge_rdc_hw.h

47

#define RDC_RCR_FLUSH (RDC_BASE_ADDR + 0xA8)

usr/src/uts/common/io/hxge/hxge_rdc_hw.h

48

#define RDC_CLOCK_DIV (RDC_BASE_ADDR + 0xB0)

usr/src/uts/common/io/hxge/hxge_rdc_hw.h

49

#define RDC_INT_MASK (RDC_BASE_ADDR + 0xB8)

usr/src/uts/common/io/hxge/hxge_rdc_hw.h

50

#define RDC_STAT (RDC_BASE_ADDR + 0xC0)

usr/src/uts/common/io/hxge/hxge_rdc_hw.h

51

#define RDC_PKT_COUNT (RDC_BASE_ADDR + 0xD0)

usr/src/uts/common/io/hxge/hxge_rdc_hw.h

52

#define RDC_DROP_COUNT (RDC_BASE_ADDR + 0xD8)

usr/src/uts/common/io/hxge/hxge_rdc_hw.h

53

#define RDC_BYTE_COUNT (RDC_BASE_ADDR + 0xE0)

usr/src/uts/common/io/hxge/hxge_rdc_hw.h

54

#define RDC_PREF_CMD (RDC_BASE_ADDR + 0x100)

usr/src/uts/common/io/hxge/hxge_rdc_hw.h

55

#define RDC_PREF_DATA (RDC_BASE_ADDR + 0x108)

usr/src/uts/common/io/hxge/hxge_rdc_hw.h

56

#define RDC_SHADOW_CMD (RDC_BASE_ADDR + 0x110)

usr/src/uts/common/io/hxge/hxge_rdc_hw.h

57

#define RDC_SHADOW_DATA (RDC_BASE_ADDR + 0x118)

usr/src/uts/common/io/hxge/hxge_rdc_hw.h

58

#define RDC_SHADOW_PAR_DATA (RDC_BASE_ADDR + 0x120)

usr/src/uts/common/io/hxge/hxge_rdc_hw.h

59

#define RDC_CTRL_FIFO_CMD (RDC_BASE_ADDR + 0x128)

usr/src/uts/common/io/hxge/hxge_rdc_hw.h

60

#define RDC_CTRL_FIFO_DATA_LO (RDC_BASE_ADDR + 0x130)

usr/src/uts/common/io/hxge/hxge_rdc_hw.h

61

#define RDC_CTRL_FIFO_DATA_HI (RDC_BASE_ADDR + 0x138)

usr/src/uts/common/io/hxge/hxge_rdc_hw.h

62

#define RDC_CTRL_FIFO_DATA_ECC (RDC_BASE_ADDR + 0x140)

usr/src/uts/common/io/hxge/hxge_rdc_hw.h

63

#define RDC_DATA_FIFO_CMD (RDC_BASE_ADDR + 0x148)

usr/src/uts/common/io/hxge/hxge_rdc_hw.h

64

#define RDC_DATA_FIFO_DATA_LO (RDC_BASE_ADDR + 0x150)

usr/src/uts/common/io/hxge/hxge_rdc_hw.h

65

#define RDC_DATA_FIFO_DATA_HI (RDC_BASE_ADDR + 0x158)

usr/src/uts/common/io/hxge/hxge_rdc_hw.h

66

#define RDC_DATA_FIFO_DATA_ECC (RDC_BASE_ADDR + 0x160)

usr/src/uts/common/io/hxge/hxge_rdc_hw.h

67

#define RDC_STAT_INT_DBG (RDC_BASE_ADDR + 0x200)

usr/src/uts/common/io/hxge/hxge_rdc_hw.h

68

#define RDC_PREF_PAR_LOG (RDC_BASE_ADDR + 0x210)

usr/src/uts/common/io/hxge/hxge_rdc_hw.h

69

#define RDC_SHADOW_PAR_LOG (RDC_BASE_ADDR + 0x218)

usr/src/uts/common/io/hxge/hxge_rdc_hw.h

70

#define RDC_CTRL_FIFO_ECC_LOG (RDC_BASE_ADDR + 0x220)

usr/src/uts/common/io/hxge/hxge_rdc_hw.h

71

#define RDC_DATA_FIFO_ECC_LOG (RDC_BASE_ADDR + 0x228)

usr/src/uts/common/io/hxge/hxge_rdc_hw.h

72

#define RDC_FIFO_ERR_INT_MASK (RDC_BASE_ADDR + 0x230)

usr/src/uts/common/io/hxge/hxge_rdc_hw.h

73

#define RDC_FIFO_ERR_STAT (RDC_BASE_ADDR + 0x238)

usr/src/uts/common/io/hxge/hxge_rdc_hw.h

74

#define RDC_FIFO_ERR_INT_DBG (RDC_BASE_ADDR + 0x240)

usr/src/uts/common/io/hxge/hxge_rdc_hw.h

75

#define RDC_PEU_TXN_LOG (RDC_BASE_ADDR + 0x250)

usr/src/uts/common/io/hxge/hxge_rdc_hw.h

76

#define RDC_DBG_TRAINING_VEC (RDC_BASE_ADDR + 0x300)

usr/src/uts/common/io/hxge/hxge_rdc_hw.h

77

#define RDC_DBG_GRP_SEL (RDC_BASE_ADDR + 0x308)