PUT32
PUT32(M1575_INTRCR_REG, 0);
PUT32(M1575_INTRSR_REG, (intrsr & M1575_INTR_MASK));
PUT32(M1575_SCR_REG, M1575_SCR_COLDRST);
PUT32(M1575_SCR_REG, M1575_SCR_COLDRST);
PUT32(M1575_RTSR_REG, rtsr);
PUT32(M1575_FIFOCR1_REG, 0x81818181);
PUT32(M1575_FIFOCR2_REG, 0x81818181);
PUT32(M1575_FIFOCR3_REG, 0x81818181);
PUT32(M1575_FIFOCR1_REG, 0x81818181);
PUT32(M1575_FIFOCR2_REG, 0x81818181);
PUT32(M1575_FIFOCR3_REG, 0x81818181);
PUT32(M1575_INTRCR_REG, 0);
PUT32(M1575_INTRSR_REG, (intrsr & M1575_INTR_MASK));
PUT32(M1575_SCR_REG, M1575_SCR_COLDRST);
PUT32(M1575_PCMIBDBAR_REG, port->bdl_paddr);
PUT32(M1575_SCR_REG, scr);
PUT32(M1575_PCMOBDBAR_REG, port->bdl_paddr);
#define SET32(reg, bit) PUT32(reg, GET32(reg) | (bit))
#define CLR32(reg, bit) PUT32(reg, GET32(reg) & ~(bit))
PUT32(dev, REG_FUNCTRL0, 0);
PUT32(dev, port->reg_paddr, port->paddr);
PUT32(dev, REG_FUNCTRL0, 0);
PUT32(dev, REG_FUNCTRL0, 0);
#define CLR32(dev, offset, v) PUT32(dev, offset, GET32(dev, offset) & ~(v))
#define SET32(dev, offset, v) PUT32(dev, offset, GET32(dev, offset) | (v))
#define CLR32(dev, offset, v) PUT32(dev, offset, GET32(dev, offset) & ~(v))
#define SET32(dev, offset, v) PUT32(dev, offset, GET32(dev, offset) | (v))
PUT32(dev, CONC_dCODECCTL_OFF, ((int)wAddr << 16) | (1UL << 23));
PUT32(dev, CONC_dCODECCTL_OFF, ((int)wAddr << 16) | wData);
PUT32(dev, CONC_dSRCIO_OFF, (dtemp & SRC_CTLMASK) | ((int)reg << 25));
PUT32(dev, CONC_dSRCIO_OFF, writeval);
PUT32(dev, CONC_dSRCIO_OFF,
PUT32(dev, CONC_dSRCIO_OFF,
PUT32(dev, CONC_dSRCIO_OFF, SRC_DISABLE);
PUT32(dev, CONC_dSRCIO_OFF, 0);
PUT32(dev, CONC_bMEMPAGE_OFF, page);
PUT32(dev, offs, data);
PUT32(dev, CONC_bMEMPAGE_OFF, page); /* Select memory page */
PUT32(dev, CONC_dSTATUS_OFF, tmp);
PUT32(dev, 0x04, GET32(dev, 0x04) | (1 << 18));
PUT32(dev, 0x00, GET32(dev, 0x00) | (1 << 26));
PUT32(dev, 0x04, GET32(dev, 0x04) & ~(1 << 18));
PUT32(dev, 0x00, GET32(dev, 0x00) & ~(1 << 26));
PUT32(IXP_AUDIO_INT, 0xffffffff);
PUT32(IXP_AUDIO_INT, IXP_AUDIO_INT_CODEC0_NOT_READY);
PUT32(IXP_AUDIO_OUT_PHY_ADDR_DATA, value);
PUT32(IXP_AUDIO_OUT_PHY_ADDR_DATA, value);
PUT32(IXP_AUDIO_CMD, cmd);
PUT32(IXP_AUDIO_CMD, cmd);
PUT32(IXP_AUDIO_CMD, cmd);
PUT32(IXP_AUDIO_FIFO_FLUSH, IXP_AUDIO_FIFO_FLUSH_IN);
PUT32(IXP_AUDIO_IN_DMA_LINK_P,
PUT32(IXP_AUDIO_FIFO_FLUSH, IXP_AUDIO_FIFO_FLUSH_OUT);
PUT32(IXP_AUDIO_OUT_DMA_SLOT_EN_THRESHOLD, slot);
PUT32(IXP_AUDIO_OUT_DMA_LINK_P,
#define SET32(reg, val) PUT32(reg, GET32(reg) | ((uint32_t)(val)))
#define CLR32(reg, val) PUT32(reg, GET32(reg) & ~((uint32_t)(val)))
PUT32(dev, CONC_bMEMPAGE_OFF, page);
PUT32(dev, offs, data);
PUT32(dev, CONC_bMEMPAGE_OFF, page); /* Select memory page */
PUT32(REG_DNLISTPTR, paddr);
PUT32(REG_DNLISTPTR, sc->ex_txring.r_head->ed_descaddr);
PUT32(REG_DMACTRL, GET32(REG_DMACTRL) | DMACTRL_UPRXEAREN);
PUT32(REG_UPLISTPTR, sc->ex_rxring.r_paddr);
PUT32(W3_INTERNAL_CONFIG, configreg);
PUT32(ip, CSR_GEN_PTR, sp->paddr);
PUT32(ip, CSR_MDICTL, mdi);
PUT32(ip, CSR_MDICTL, mdi);
PUT32(ip, CSR_GEN_PTR, ip->rxb[0].paddr);
PUT32(ip, CSR_PORT, PORT_SEL_RESET);
PUT32(ip, CSR_PORT, PORT_SW_RESET);
PUT32(ip, CSR_PORT, PORT_SEL_RESET);
PUT32(ip, CSR_PORT, PORT_SW_RESET);
PUT32(ip, CSR_PORT, PORT_SEL_RESET);
PUT32(ip, CSR_PORT, PORT_SEL_RESET);
PUT32(ip, CSR_PORT, PORT_SW_RESET);
PUT32(ip, CSR_GEN_PTR, 0);
PUT32(ip, CSR_GEN_PTR, 0);
PUT32(ip, CSR_GEN_PTR, cb->paddr);
PUT32(ip, CSR_GEN_PTR, ip->rxb[0].paddr);
PUT32(ss, REG_SDMA_ADDR, ss->ss_bufdmac.dmac_address);
PUT32(ss, REG_ARGUMENT, cmdp->sc_argument);
#define PUTDATA32(ss, val) PUT32(ss, REG_DATA, sw32(val))
PUT32(ss, REG_ARGUMENT, 0);