PSTATE_IE
btst PSTATE_IE, reg3; \
wrpr reg3, PSTATE_IE, %pstate; \
btst PSTATE_IE, reg3; \
andcc pstatereg, PSTATE_IE, %g0; /* panic if intrs */ \
andcc scr, PSTATE_IE, %g0; \
#define TSTATE_IE (PSTATE_IE << TSTATE_PSTATE_SHIFT)
(PTSTATE_KERN_COMMON | PSTATE_PRIV | PSTATE_IE)
(((PSTATE_IE | PSTATE_PEF | PSTATE_AM) << TSTATE_PSTATE_SHIFT) | \
(((PSTATE_IE | PSTATE_PEF) << TSTATE_PSTATE_SHIFT) | \
ASSERT((getpstate() & PSTATE_IE) == 0);
andn %o3, PSTATE_IE, %o4
setpstate(getpstate() | PSTATE_IE);
andn %o3, PSTATE_IE | PSTATE_AM, %o4
andn %o2, PSTATE_IE | PSTATE_AM, %o3
andn %o2, PSTATE_IE | PSTATE_AM, %o3
andn %o4, PSTATE_IE | PSTATE_AM, %o5
andn %o4, PSTATE_IE | PSTATE_AM, %o5
andn %o4, PSTATE_IE | PSTATE_AM, %o1
andn %o4, PSTATE_IE | PSTATE_AM, %g3 ! clear IE, AM bits
andcc scr1, PSTATE_IE | PSTATE_AM, scr1; \
andn scr4, PSTATE_IE | PSTATE_AM, scr3; \
setpstate(getpstate() | PSTATE_IE);
andcc scr1, PSTATE_IE | PSTATE_AM, scr1; \
andn scr4, PSTATE_IE | PSTATE_AM, scr3; \