usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1000

{ 8, 8, "mdperr", "Master Data Parity Error", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1002

{ 9, 10, "devsel", "DEVSEL# Timing", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1004

{ 11, 11, "sta", "Signaled Target Abort", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1006

{ 12, 12, "rta", "Received Target Abort", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1008

{ 13, 13, "rma", "Received Master Abort", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1010

{ 14, 14, "rsyserr", "Received System Error", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1012

{ 15, 15, "dperr", "Detected Parity Error", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1030

{ 0, 3, "cap", "Addressing Capability", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1038

{ 0, 3, "cap", "Addressing Capability", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1046

{ 0, 0, "perrresp", "Parity Error Response", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1048

{ 1, 1, "serr", "SERR#", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1050

{ 2, 2, "isa", "ISA", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1052

{ 3, 3, "vga", "VGA", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1054

{ 4, 4, "vgadec", "VGA 16-bit Decode", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1056

{ 5, 5, "mabort", "Master Abort", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1059

{ 7, 7, "fastb2b", "Fast Back-to-Back Transactions", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1061

{ 8, 8, "pridisc", "Primary Discard Timer", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1063

{ 9, 9, "secdisc", "Secondary Discard Timer", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1065

{ 10, 10, "disctimer", "Discard Timer Error", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1067

{ 11, 11, "discserr", "Discard Timer SERR#", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1079

{ 0, 6, "layout", "Header Layout", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1081

{ 7, 7, "mfd", "Multi-Function Device", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1089

{ 7, 7, "cap", "BIST Capable", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1095

{ 0, 0, "enable", "Enable", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1097

{ 1, 3, "valsts", "Validation Status", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1238

{ 3, 3, "clock", "PME Clock", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1240

{ 4, 4, "irrd0", "Immediate Readiness on Return to D0", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1242

{ 5, 5, "dsi", "Device Specific Initialization", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1244

{ 6, 8, "auxcur", "Auxiliary Current", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1247

{ 9, 9, "d1", "D1", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1249

{ 10, 10, "d2", "D2", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1277

{ 0, 0, "enable", "MSI Enable", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1279

{ 1, 3, "mmsgcap", "Multiple Message Capable", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1282

{ 4, 6, "mmsgen", "Multiple Message Enabled", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1285

{ 7, 7, "addr64", "64-bit Address Capable", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1287

{ 8, 8, "pvm", "Per-Vector Masking Capable", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1289

{ 9, 9, "extmdcap", "Extended Message Data Capable", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1291

{ 10, 10, "extmden", "extended Message Data Enable", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1384

{ 14, 14, "mask", "Function Mask", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1386

{ 15, 15, "enable", "MSI-X Enable", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1392

{ 0, 2, "bir", "Table BIR", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1401

{ 0, 2, "bir", "PBA BIR", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1425

{ 4, 7, "type", "Device/Port Type", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1435

{ 8, 8, "slot", "Slot Implemented", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1442

{ 0, 2, "mps", "Max Payload Size Supported", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1445

{ 3, 4, "pfunc", "Phantom Functions Supported", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1448

{ 5, 5, "exttag", "Extended Tag Field", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1450

{ 6, 8, "l0slat", "L0s Acceptable Latency", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1453

{ 9, 11, "l1lat", "L1 Acceptable Latency", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1456

{ 15, 15, "rber", "Role Based Error Reporting", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1458

{ 16, 16, "errcor", "ERR_COR Subclass", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1461

{ 26, 27, "cspls", "Captured Slot Power Limit Scale", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1464

{ 28, 28, "flr", "Function Level Reset", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1470

{ 0, 0, "corerr", "Correctable Error Reporting", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1472

{ 1, 1, "nferr", "Non-Fatal Error Reporting", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1474

{ 2, 2, "ferr", "Fatal Error Reporting", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1476

{ 3, 3, "unsupreq", "Unsupported Request Reporting", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1478

{ 4, 4, "relord", "Relaxed Ordering", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1480

{ 5, 7, "mps", "Max Payload Size", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1483

{ 8, 8, "exttag", "Extended Tag Field", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1485

{ 9, 9, "pfunc", "Phantom Functions", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1487

{ 9, 9, "auxpm", "Aux Power PM", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1489

{ 11, 11, "nosnoop", "No Snoop", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1491

{ 12, 14, "mrrs", "Max Read Request Size", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1500

{ 0, 0, "corerr", "Correctable Error Detected", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1502

{ 1, 1, "nferr", "Non-Fatal Error Detected", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1504

{ 2, 2, "ferr", "Fatal Error Detected", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1506

{ 3, 3, "unsupreq", "Unsupported Request Detected", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1508

{ 4, 4, "auxpm", "AUX Power Detected", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1510

{ 5, 5, "txpend", "Transactions Pending", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1512

{ 6, 6, "eprd", "Emergency Power Reduction Detected", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1518

{ 0, 3, "maxspeed", "Maximum Link Speed", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1522

{ 10, 11, "aspm", "ASPM Support", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1524

{ 12, 14, "l0slat", "L0s Exit Latency", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1527

{ 15, 17, "l1lat", "L1 Exit Latency", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1530

{ 18, 18, "clockpm", "Clock Power Management", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1532

{ 19, 19, "supdown", "Surprise Down Error Reporting", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1534

{ 20, 20, "dlact", "Data Link Layer Active Reporting", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1537

PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1539

{ 22, 22, "aspmcomp", "ASPM Optionality Compliance", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1546

{ 0, 1, "aspmctl", "ASPM Control", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1548

{ 3, 3, "rcb", "Read Completion Boundary", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1550

{ 4, 4, "disable", "Link Disable", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1554

{ 6, 6, "ccc", "Common Clock Configuration", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1556

{ 7, 7, "extsync", "Extended Sync", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1558

{ 8, 8, "clkpm", "Clock Power Management", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1560

{ 9, 9, "hwawd", "Hardware Autonomous Width", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1563

PRDV_STRVAL, .prd_val = { .prdv_strval = { "disabled",

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1566

PRDV_STRVAL, .prd_val = { .prdv_strval = { "disabled",

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1568

{ 14, 15, "drs", "DRS Signaling Control", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1575

{ 0, 3, "speed", "Link Speed", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1579

{ 11, 11, "training", "Link Training", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1581

{ 12, 12, "slotclk", "Slot Clock Configuration", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1583

{ 13, 13, "dllact", "Data Link Layer Link Active", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1585

{ 14, 14, "linkbw", "Link Bandwidth Management Status", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1587

{ 15, 15, "linkabw", "Link Autonomous Bandwidth Status", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1593

{ 0, 0, "attnbtn", "Attention Button Present", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1595

{ 1, 1, "pwrctrl", "Power Controller Present", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1597

{ 2, 2, "mrlsen", "MRL Sensor Present", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1599

{ 3, 3, "attnind", "Attention Indicator Present", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1601

{ 4, 4, "pwrind", "Power Indicator Present", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1603

{ 5, 5, "hpsup", "Hot-Plug Surprise", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1605

{ 6, 6, "hpcap", "Hot-Plug Capable ", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1609

{ 17, 17, "emi", "Electromechanical Interlock Present", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1611

{ 18, 18, "ncc", "No Command Completed", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1618

{ 0, 0, "attnbtn", "Attention Button Pressed Reporting", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1620

{ 1, 1, "pwrflt", "Power Fault Detected Reporting", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1622

{ 2, 2, "mrlchg", "MRL Sensor Changed Reporting", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1624

{ 3, 3, "preschg", "Presence Detect Changed Reporting", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1626

{ 4, 4, "ccmpltint", "Command Complete Interrupt", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1628

{ 5, 5, "hpi", "Hot Plug Interrupt Enable", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1630

{ 6, 7, "attnind", "Attention Indicator Control", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1632

{ 8, 9, "pwrin", "Power Indicator Control", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1634

{ 10, 10, "pwrctrl", "Power Controller Control", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1637

{ 12, 12, "dll", "Data Link Layer State Changed", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1639

{ 13, 13, "autopowdis", "Auto Slot Power Limit", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1641

{ 14, 14, "ibpddis", "In-Band PD", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1647

{ 0, 0, "attnbtn", "Attention Button Pressed", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1649

{ 1, 1, "pwrflt", "Power Fault Detected", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1651

{ 2, 2, "mrlchg", "MRL Sensor Changed", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1653

{ 3, 3, "preschg", "Presence Detect Changed", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1655

{ 4, 4, "ccmplt", "Command Complete", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1657

{ 5, 5, "mrlsen", "MRL Sensor State", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1659

{ 6, 6, "presdet", "Presence Detect State", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1661

{ 7, 7, "emi", "Electromechanical Interlock", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1663

{ 8, 8, "dll", "Data Link Layer State Changed", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1669

{ 0, 0, "syscorerr", "System Error on Correctable Error", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1671

{ 1, 1, "sysnonftl", "System Error on Non-Fatal Error", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1673

{ 2, 2, "sysfatal", "System Error on Fatal Error", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1675

{ 3, 3, "pmeie", "PME Interrupt", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1677

{ 4, 4, "crssw", "CRS Software Visibility", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1683

{ 0, 0, "crssw", "CRS Software Visibility", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1690

{ 16, 16, "pmests", "PME Status", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1692

{ 17, 17, "pmepend", "PME Pending", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1701

{ 4, 4, "cmptodis", "Completion Timeout Disable", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1703

{ 5, 5, "ari", "ARI Forwarding", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1705

{ 6, 6, "atomroute", "AtomicOp Routing", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1707

{ 7, 7, "atom32", "32-bit AtomicOp Completer", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1709

{ 8, 8, "atom64", "64-bit AtomicOp Completer", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1711

{ 9, 9, "cas128", "128-bit CAS Completer", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1713

{ 10, 10, "norelord", "No Ro-enabld PR-PR Passing", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1715

{ 11, 11, "ltr", "LTR Mechanism", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1717

{ 12, 13, "tph", "TPH Completer", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1720

{ 14, 15, "lncls", "LN System CLS", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1723

{ 16, 16, "tag10comp", "10-bit Tag Completer", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1725

{ 17, 17, "tag10req", "10-bit Tag Requester", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1727

{ 18, 19, "obff", "OBFF", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1730

{ 20, 20, "extfmt", "Extended Fmt Field Supported", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1732

{ 21, 21, "eetlp", "End-End TLP Prefix Supported", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1734

{ 22, 23, "maxeetlp", "Max End-End TLP Prefixes", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1736

{ 24, 25, "empr", "Emergency Power Reduction", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1741

"Emergency Power Reduction Initialization Required", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1743

{ 31, 31, "frs", "Function Readiness Status", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1749

{ 0, 3, "cmpto", "Completion Timeout", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1753

{ 4, 4, "cmptodis", "Completion Timeout Disabled", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1755

{ 5, 5, "ari", "ARI Forwarding", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1757

{ 6, 6, "atomreq", "AtomicOp Requester", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1759

{ 7, 7, "atomblock", "AtomicOp Egress Blocking", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1761

{ 8, 8, "idoreq", "ID-Based Ordering Request", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1763

{ 9, 9, "idocomp", "ID-Based Ordering Completion", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1765

{ 10, 10, "ltr", "LTR Mechanism", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1767

{ 11, 11, "empowred", "Emergency Power Reduction", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1769

{ 12, 12, "tag10req", "10-bit Tag Requester", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1771

{ 13, 14, "obff", "OBFF", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1774

{ 15, 15, "eetlpblk", "End-End TLP Prefix Blocking", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1787

{ 8, 8, "crosslink", "Crosslink", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1797

{ 23, 23, "retimedet", "Retimer Presence Detect Supported", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1800

PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1802

{ 31, 31, "drs", "Device Readiness Status", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1808

{ 0, 3, "targspeed", "Target Link Speed", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1811

{ 4, 4, "comp", "Enter Compliance", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1813

{ 5, 5, "hwautosp", "Hardware Autonomous Speed Disable", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1815

{ 6, 6, "seldeemph", "Selectable De-emphasis", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1818

{ 10, 10, "modcomp", "Enter Modified Compliance", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1827

{ 0, 0, "curdeemph", "Current De-emphasis Level", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1829

{ 1, 1, "eq8comp", "Equalization 8.0 GT/s Complete", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1831

{ 2, 2, "eq8p1comp", "Equalization 8.0 GT/s Phase 1", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1833

{ 3, 3, "eq8p2comp", "Equalization 8.0 GT/s Phase 2", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1835

{ 4, 4, "eq8p3comp", "Equalization 8.0 GT/s Phase 3", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1837

{ 5, 5, "linkeq8req", "Link Equalization Request 8.0 GT/s", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1839

{ 6, 6, "retimedet", "Retimer Presence Detected", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1841

{ 7, 7, "retime2det", "Two Retimers Presence Detected", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1843

{ 8, 9, "crosslink", "Crosslink Resolution", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1846

{ 12, 14, "dscomppres", "Downstream Component Presence", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1850

{ 15, 15, "drsrx", "DRS Message Received", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

1856

{ 0, 0, "ibpddis", "In-Band PD Disable", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

2050

{ 13, 15, "bar", "BAR Location ", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

2100

{ 5, 5, "ecgencap", "ECRC Generation Capable", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

2102

{ 6, 6, "ecgenen", "ECRC Generation Enable", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

2104

{ 7, 7, "ecchkcap", "ECRC Check Capable", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

2106

{ 8, 8, "ecchken", "ECRC Check Enable", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

2112

{ 0, 0, "corerr", "Correctable Error Reporting", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

2114

{ 1, 1, "nferr", "Non-Fatal Error Reporting", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

2116

{ 2, 2, "faterr", "Fatal Error Reporting", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

2129

{ 7, 8, "errcorsc", "ERR_COR Subclass", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

2295

PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

2359

{ 0, 0, "srcvd", "ACS Source Validation", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

2361

{ 1, 1, "tranblk", "ACS Transaction Blocking", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

2363

{ 2, 2, "p2prr", "ACS P2P Request Redirect", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

2365

{ 3, 3, "p2pcr", "ACS P2P Completion Redirect", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

2367

{ 4, 4, "upfwd", "ACS Upstream Forwarding", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

2369

{ 5, 5, "p2pegctl", "ACS P2P Egress Control", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

2371

{ 6, 6, "dtp2p", "ACS Direct Translated P2P", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

2373

{ 7, 7, "enhcap", "ACS Enhanced Capability", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

2380

{ 0, 0, "srcvd", "ACS Source Validation", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

2382

{ 1, 1, "tranblk", "ACS Transaction Blocking", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

2384

{ 2, 2, "p2prr", "ACS P2P Request Redirect", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

2386

{ 3, 3, "p2pcr", "ACS P2P Completion Redirect", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

2388

{ 4, 4, "upfwd", "ACS Upstream Forwarding", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

2390

{ 5, 5, "p2pegctl", "ACS P2P Egress Control", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

2392

{ 6, 6, "dtp2p", "ACS Direct Translated P2P", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

2394

{ 7, 7, "iorb", "ACS I/O Request Blocking", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

2396

{ 8, 9, "dspmta", "ACS DSP Memory Target Access Control", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

2399

{ 10, 11, "uspmta", "ACS USP Memory Target Access Control", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

2420

{ 0, 0, "pcil1.2", "PCI-PM L1.2", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

2422

{ 1, 1, "pcil1.1", "PCI-PM L1.1", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

2424

{ 2, 2, "aspml1.2", "ASPM L1.2", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

2426

{ 3, 3, "aspml1.1", "ASPM L1.1", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

2428

{ 4, 4, "l1pmsub", "L1 PM Substates", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

2430

{ 5, 5, "linkact", "Link Activation", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

2433

{ 16, 17, "poscale", "Port T_POWER_ON Scale", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

2440

{ 0, 0, "pcil1.2", "PCI-PM L1.2", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

2442

{ 1, 1, "pcil1.1", "PCI-PM L1.1", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

2444

{ 2, 2, "aspml1.2", "ASPM L1.2", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

2446

{ 3, 3, "aspml1.1", "ASPM L1.1", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

2448

{ 4, 4, "laie", "Link Activation Interrupt Enable", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

2450

{ 5, 5, "lactl", "Link Activation Control", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

2454

{ 29, 31, "ltrl1.2s", "LTR L1.2 Threshold Scale", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

2461

{ 0, 1, "poscale", "T_POWER_ON Scale", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

2504

{ 10, 12, "latscale", "Latency Scale", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

2524

{ 0, 0, "mfvcfg", "MFVC Function Groups", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

2526

{ 1, 1, "acsfg", "ACS Function Groups", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

2533

{ 0, 0, "mfvcfg", "MFVC Function Groups", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

2535

{ 1, 1, "acsfg", "ACS Function Groups", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

2555

{ 1, 1, "exec", "Execution Permission", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

2557

{ 2, 2, "priv", "Privileged Mode", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

2564

{ 0, 0, "pasid", "PASID", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

2566

{ 1, 1, "exec", "Execution Permission", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

2568

{ 2, 2, "priv", "Privileged Mode", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

2588

{ 0, 0, "tp", "Transactions Pending", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

2590

{ 1, 1, "flr", "Function Level Reset", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

2601

{ 0, 0, "tp", "Transactions Pending", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

2623

{ 15, 15, "ecrc", "ECRC Regeneration", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

2631

{ 15, 15, "enable", "Enable", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

2797

{ 0, 0, "lsfc", "Local Scaled Flow Control", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

2799

{ 31, 31, "dlex", "Data Link Exchange", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

2805

{ 0, 0, "rsfc", "Remote Scaled Flow Control", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

2807

{ 31, 31, "valid", "Remote Data Link Feature Valid", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

2834

{ 0, 0, "eqcomp", "Equalization 16.0 GT/s Complete", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

2836

{ 1, 1, "eqp1", "Equalization 16.0 GT/s Phase 1", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

2838

{ 2, 2, "eqp2", "Equalization 16.0 GT/s Phase 2", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

2840

{ 3, 3, "eqp3", "Equalization 16.0 GT/s Phase 3", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

2908

{ 0, 0, "sw", "Margining uses Driver Software", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

2914

{ 0, 0, "ready", "Margining Ready", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

2916

{ 1, 1, "sw", "Margining Software Ready", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

3011

{ 0, 0, "nost", "No ST Mode", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

3013

{ 1, 1, "ivec", "Interrupt Vector Mode", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

3015

{ 2, 2, "dev", "Device Specific Mode", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

3017

{ 8, 8, "exttph", "Extended TPH Requester", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

3019

{ 9, 10, "loc", "ST Table Location", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

3027

{ 0, 2, "mode", "ST Mode Select", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

3030

{ 8, 9, "en", "TPH Requester", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

3092

{ 0, 0, "migration", "Migration", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

3094

{ 1, 1, "ari", "ARI Capable Hierarchy Preserved", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

3096

{ 2, 2, "vf10b", "VF 10-bit Tag Requester", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

3103

{ 0, 0, "vf", "VF", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

3105

{ 1, 1, "vfm", "VF Migration", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

3107

{ 2, 2, "vfmi", "VF Migration Interrupt", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

3109

{ 3, 3, "ari", "ARI Capable Hierarchy", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

3111

{ 4, 4, "vf10b", "VF 10-bit Tag Requester", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

3117

{ 0, 0, "vfm", "VF Migration", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

3143

{ 0, 2, "bir", "VF Migration State BIR", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

3183

{ 0, 0, "dper", "Data Parity Error Recovery", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

3185

{ 1, 1, "ro", "Relaxed Ordering", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

3187

{ 2, 3, "maxread", "Maximum Memory Read Byte Count", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

3191

PRDV_STRVAL, .prd_val = { .prdv_strval = { "1", "2", "3", "4", "8",

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

3200

{ 16, 16, "64bit", "64-bit Device", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

3203

{ 17, 17, "133mhz", "133 MHz Capable", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

3206

{ 18, 18, "spcodis", "Split Completion Discarded", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

3208

{ 19, 19, "unspco", "Unexpected Split Completion", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

3210

{ 20, 20, "complex", "Device Complexity", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

3213

PRDV_STRVAL, .prd_val = { .prdv_strval = { "512 bytes",

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

3216

PRDV_STRVAL, .prd_val = { .prdv_strval = { "1", "2", "3", "4", "8",

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

3219

PRDV_STRVAL, .prd_val = { .prdv_strval = { "8/1KB", "16/2KB",

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

3223

PRDV_STRVAL, .prd_val = { .prdv_strval = { "no", "yes" } } },

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

3228

{ 0, 0, "64bit", "64-bit Device", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

3231

{ 1, 1, "133mhz", "133 MHz Capable", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

3234

{ 2, 2, "spcodis", "Split Completion Discarded", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

3236

{ 3, 3, "unspco", "Unexpected Split Completion", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

3238

{ 4, 4, "spcoor", "Split Completion Overrun", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

3240

{ 5, 5, "sprde", "Split Request Delayed", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

3242

{ 6, 8, "freq", "Secondary Clock Frequency", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

3252

{ 16, 16, "64bit", "64-bit Device", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

3255

{ 17, 17, "133mhz", "133 MHz Capable", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

3258

{ 18, 18, "spcodis", "Split Completion Discarded", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

3260

{ 19, 19, "unspco", "Unexpected Split Completion", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

3262

{ 20, 20, "spcoor", "Split Completion Overrun", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

3264

{ 21, 21, "sprde", "Split Request Delayed", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

3301

{ 8, 9, "tlu", "Transition Latency Unit", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

3303

{ 12, 13, "pas", "Power Allocation Scale", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

3313

{ 8, 8, "ctlen", "Substate Control Enabled", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

3343

{ 8, 9, "scale", "Data Scale", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

3346

{ 10, 12, "pmsub", "PM Substate", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

3350

{ 13, 14, "pmstate", "PM State", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

3352

{ 15, 17, "type", "Type", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

3356

{ 18, 20, "rail", "Power Rail", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

3363

{ 0, 0, "sa", "System Allocated", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

3384

{ 0, 0, "req", "PTM Requester", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

3386

{ 1, 1, "resp", "PTM Responder", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

3388

{ 2, 2, "root", "PTM Root", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

3390

{ 3, 3, "eptm", "ePTM", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

3397

{ 0, 0, "en", "PTM Enable", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

3399

{ 1, 1, "root", "Root Select", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

3420

{ 5, 5, "pgalign", "Page Aligned Request", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

3422

{ 6, 6, "glbinv", "Global Invalidate", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

3424

{ 7, 7, "relo", "Relaxed Ordering", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

3431

{ 15, 15, "en", "Enable", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

3450

{ 0, 0, "en", "Enable", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

3457

{ 0, 0, "rf", "Response Failure", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

3459

{ 1, 1, "uprgi", "Unexpected Page Request Group Index", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

3461

{ 8, 8, "stopped", "Stopped", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

3463

{ 15, 15, "prgrpreq", "PRG Response PASID", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

3496

{ 5, 5, "rpext", "Root Port Extensions", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

3498

{ 6, 6, "ptlpeb", "Poisoned TLP Egress Blocking", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

3500

{ 7, 7, "swtrig", "Software Triggering", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

3503

{ 12, 12, "errcorr", "DL_Active ERR_COR Signaling", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

3509

{ 0, 1, "trigger", "DPC Trigger", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

3512

{ 2, 2, "comp", "Completion Control", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

3519

{ 5, 5, "ptlpeb", "Poisoned TLP Egress Blocking", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

3530

{ 0, 0, "trigger", "Trigger Status", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

3532

{ 1, 2, "reason", "Trigger Reason", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

3537

{ 4, 4, "rpbusy", "RP Busy", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

3539

{ 5, 6, "extreason", "Trigger Reason Extension", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

3679

{ 8, 9, "refclk", "Reference Clock", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

3681

{ 10, 11, "patsz", "Port Arbitration Table Size", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

3698

{ 1, 3, "arbtype", "VC Arbitration Select", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

3717

{ 14, 14, "aps", "Advanced Packet Switching", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

3719

{ 15, 15, "rstx", "Reject Snoop Transactions", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

3730

{ 17, 19, "arbtype", "Port Arbitration Select", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

3826

{ 11, 11, "dir", "Default Direction", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

3838

{ 7, 7, "chain", "Chain Side", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

3840

{ 8, 8, "hide", "Host Hide", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

3850

{ 0, 0, "srcid", "Source ID", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

3852

{ 1, 1, "cfl", "CRC Flood", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

3855

{ 3, 3, "cfer", "CRC Force Error", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

3860

{ 7, 7, "txoff", "Transmitter Off", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

3864

{ 12, 12, "isoc", "Isochronous Flow Control", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

3866

{ 13, 13, "ls", "LDTSTOP# Tristate", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

3869

{ 15, 15, "64b", "64-bit Addressing", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

3875

{ 0, 2, "maxin", "Maximum Link Width In", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

3878

{ 3, 3, "dwfcinsup", "Doubleword Flow Control In", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

3880

{ 4, 6, "maxout", "Maximum Link Width Out", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

3883

{ 7, 7, "dwfcoutsup", "Doubleword Flow Control Out", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

3885

{ 8, 10, "linkin", "Link Width In", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

3888

{ 11, 11, "dwfcin", "Doubleword Flow Control In", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

3890

{ 12, 14, "linkout", "Link Width Out", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

3893

{ 15, 15, "dwfcout", "Doubleword Flow Control Out", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

3905

{ 0, 4, "freq", "Link Frequency", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

3931

{ 0, 0, "isofc", "Isochronous Flow Control", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

3933

{ 1, 1, "ls", "LDTSTOP#", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

3935

{ 2, 2, "crct", "CRC Test Mode", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

3937

{ 3, 3, "ectl", "Extended CTL Time", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

3939

{ 4, 4, "64b", "64-bit Addressing", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

3941

{ 5, 5, "unitid", "UnitID Reorder", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

3943

{ 6, 6, "srcid", "Source Identification Extension", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

3945

{ 8, 8, "extreg", "Extended Register Set", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

3947

{ 9, 9, "uscfg", "Upstream Configuration", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

3953

{ 0, 0, "protfl", "Protocol Error Flood", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

3955

{ 1, 1, "ovfl", "Overflow Error Flood", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

3957

{ 2, 2, "protf", "Protocol Error Fatal", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

3959

{ 3, 3, "ovf", "Overflow Error Fatal", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

3961

{ 4, 4, "eocf", "End of Chain Fatal Error", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

3963

{ 5, 5, "respf", "Response Error Fatal", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

3965

{ 6, 6, "crcf", "CRC Error Fatal", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

3967

{ 7, 7, "sysf", "System Error Fatal", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

3971

{ 10, 10, "protnf", "Protocol Error Non-Fatal", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

3973

{ 11, 11, "ovfnf", "Overflow Error Non-Fatal", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

3975

{ 12, 12, "eocnf", "End of Chain Error Non-Fatal", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

3977

{ 13, 13, "respnf", "Response Error Non-Fatal", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

3979

{ 14, 14, "crcnf", "CRC Error Non-Fatal", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

3981

{ 15, 15, "sysnf", "System Error Non-Fatal", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

4058

{ 0, 0, "en", "Enable", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

4060

{ 1, 1, "fixed", "Fixed", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

4490

{ 0, 3, "type", "Element Type", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

4501

{ 0, 0, "valid", "Link Valid", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

4503

{ 1, 1, "type", "Link Type", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

4505

{ 2, 2, "rcrb", "Assosciate RCRB", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

4575

{ 0, 0, "eqbyp", "Equalization Bypass to Highest Rate", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

4577

{ 1, 1, "noeq", "No Equalization Needed", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

4579

{ 8, 8, "mts0", "Modified TS Usage Mode 0 - PCI Express", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

4581

{ 9, 9, "mts1", "Modified TS Usage Mode 1 - Training Set", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

4584

PRDV_STRVAL, .prd_val = { .prdv_strval = { "unsupported",

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

4594

{ 0, 0, "eqbyp", "Equalization Bypass to Highest Rate", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

4596

{ 1, 1, "noeq", "No Equalization Needed", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

4598

{ 8, 10, "mts", "Modified TS Usage Mode Selected", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

4605

{ 0, 0, "eqcomp", "Equalization 32.0 GT/s Complete", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

4607

{ 1, 1, "eqp1", "Equalization 32.0 GT/s Phase 1", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

4609

{ 2, 2, "eqp2", "Equalization 32.0 GT/s Phase 2", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

4611

{ 3, 3, "eqp3", "Equalization 32.0 GT/s Phase 3", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

4614

{ 5, 5, "mts", "Modified TS Received", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

4617

PRDV_STRVAL, .prd_val = { .prdv_strval = {

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

4620

{ 8, 8, "txpre", "Transmitter Precoding", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

4622

{ 9, 9, "prereq", "Transmitter Precoding Request", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

4624

{ 10, 10, "noeqrx", "No Equalization Needed Received", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

4630

{ 0, 2, "mts", "Modified TS Usage Mode Selected", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

4641

PRDV_STRVAL, .prd_val = { .prdv_strval = { "not supported",

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

4647

{ 0, 2, "mts", "Transmitted Modified TS Usage Mode", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

4658

PRDV_STRVAL, .prd_val = { .prdv_strval = { "not supported",

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

4725

{ 0, 0, "npem", "NPEM", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

4727

{ 1, 1, "reset", "NPEM Reset", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

4729

{ 2, 2, "ok", "NPEM OK", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

4731

{ 3, 3, "loc", "NPEM Locate", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

4733

{ 4, 4, "fail", "NPEM Fail", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

4735

{ 5, 5, "rb", "NPEM Rebuild", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

4737

{ 6, 6, "pfa", "NPEM PFA", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

4739

{ 7, 7, "hs", "NPEM Hot Spare", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

4741

{ 8, 8, "crit", "NPEM In a Critical Array", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

4743

{ 9, 9, "fail", "NPEM In a Failed Array", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

4745

{ 10, 10, "invdt", "NPEM Invalid Device type", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

4747

{ 11, 11, "dis", "NPEM Disabled", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

4754

{ 0, 0, "npem", "NPEM", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

4756

{ 1, 1, "reset", "NPEM Initiate Reset", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

4758

{ 2, 2, "ok", "NPEM OK", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

4760

{ 3, 3, "loc", "NPEM Locate", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

4762

{ 4, 4, "fail", "NPEM Fail", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

4764

{ 5, 5, "rb", "NPEM Rebuild", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

4766

{ 6, 6, "pfa", "NPEM PFA", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

4768

{ 7, 7, "hs", "NPEM Hot Spare", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

4770

{ 8, 8, "crit", "NPEM In a Critical Array", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

4772

{ 9, 9, "fail", "NPEM In a Failed Array", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

4774

{ 10, 10, "invdt", "NPEM Invalid Device type", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

4776

{ 11, 11, "dis", "NPEM Disabled", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

4783

{ 0, 0, "ccmplt", "NPEM Command Complete", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

4806

{ 8, 8, "sen", "Alternate Protocol Select Enable", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

4814

PRDV_STRVAL, .prd_val = { .prdv_strval = { "disabled",

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

4832

{ 0, 0, "pcie", "Selective Enable Mask - PCIe", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

4932

{ 31, 31, "valid", "Valid", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

4956

{ 0, 0, "intr", "Interrupt", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

4959

{ 12, 12, "attn", "Attention Mechanism", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

4961

{ 13, 13, "async", "Async Message", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

4968

{ 1, 1, "intr", "Interrupt Enable", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

4970

{ 2, 2, "attn", "Attention Not Needed", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

4972

{ 3, 3, "async", "Async Message", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

4979

{ 0, 0, "busy", "Busy", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

4982

{ 2, 2, "error", "Error", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

4986

{ 31, 31, "ready", "Data Object Ready", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

586

case PRDV_STRVAL:

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

914

{ 0, 0, "io", "I/O Space", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

916

{ 1, 1, "mem", "Memory Space", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

918

{ 2, 2, "bus", "Bus Master", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

920

{ 3, 3, "spec", "Special Cycle", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

922

{ 4, 4, "mwi", "Memory Write and Invalidate", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

924

{ 5, 5, "vga", "VGA Palette Snoop", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

926

{ 6, 6, "per", "Parity Error Response", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

928

{ 7, 7, "idsel", "IDSEL Stepping/Wait Cycle Control", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

930

{ 8, 8, "serr", "SERR# Enable", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

932

{ 9, 9, "fbtx", "Fast Back-to-Back Transactions", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

934

{ 10, 10, "intx", "Interrupt X", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

940

{ 0, 0, "imm", "Immediate Readiness", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

942

{ 3, 3, "istat", "Interrupt Status", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

944

{ 4, 4, "capsup", "Capabilities List", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

946

{ 5, 5, "66mhz", "66 MHz Capable", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

948

{ 7, 7, "fbtxcap", "Fast Back-to-Back Capable", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

950

{ 8, 8, "mdperr", "Master Data Parity Error", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

952

{ 9, 10, "devsel", "DEVSEL# Timing", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

955

{ 11, 11, "sta", "Signaled Target Abort", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

957

{ 12, 12, "rta", "Received Target Abort", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

959

{ 13, 13, "rma", "Received Master Abort", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

961

{ 14, 14, "sse", "Signaled System Error", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

963

{ 15, 15, "dpe", "Detected Parity Error", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

979

{ 0, 3, "cap", "Addressing Capability", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

987

{ 0, 3, "cap", "Addressing Capability", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

996

{ 5, 5, "66mhz", "66 MHz", PRDV_STRVAL,

usr/src/cmd/pcieadm/pcieadm_cfgspace.c

998

{ 7, 7, "fastb2b", "Fast Back-to-Back Transactions", PRDV_STRVAL,