PIC0_EVT_SEL_SHIFT

71

PIC0_EVT_SEL_SHIFT, /* JBC counter 0 */

73

PIC0_EVT_SEL_SHIFT, /* IMU counter 0 */

75

PIC0_EVT_SEL_SHIFT, /* MMU counter 0 */

77

PIC0_EVT_SEL_SHIFT, /* TLU counter 0 */

80

PIC0_EVT_SEL_SHIFT, /* LPU counter 1 */

303

ksinfop->pic_sel_shift[0] = PIC0_EVT_SEL_SHIFT;

100

#define TLU_PIC0_EVT_MASK ((uint64_t)TLU01_EVT_MASK << PIC0_EVT_SEL_SHIFT)

103

#define LPU_PIC0_EVT_MASK ((uint64_t)LPU12_EVT_MASK << PIC0_EVT_SEL_SHIFT)

94

#define JBC_PIC0_EVT_MASK ((uint64_t)JBC01_EVT_MASK << PIC0_EVT_SEL_SHIFT)

96

#define IMU_PIC0_EVT_MASK ((uint64_t)IMU01_EVT_MASK << PIC0_EVT_SEL_SHIFT)

98

#define MMU_PIC0_EVT_MASK ((uint64_t)MMU01_EVT_MASK << PIC0_EVT_SEL_SHIFT)