PCI_PMCSR_D0
if ((pmcsr & PCI_PMCSR_STATE_MASK) != PCI_PMCSR_D0) {
pmcsr |= PCI_PMCSR_D0;
ql_pci_config_put16(ha, csr, PCI_PMCSR_D0);
pmcsr |= PCI_PMCSR_D0;
case PCI_PMCSR_D0:
if ((pmcsr & PCI_PMCSR_STATE_MASK) == PCI_PMCSR_D0)
PM_CSR(si_ctlp->sictl_devid), PCI_PMCSR_D0);
if ((pmcsr_stat & PCI_PMCSR_STATE_MASK) != PCI_PMCSR_D0) {
PCI_PMCSR_D0);
(void) gem_pci_set_power_state(dip, conf_handle, PCI_PMCSR_D0);
pmcsr | PCI_PMCSR_D0);
pmcsr | PCI_PMCSR_D0);
p->ppc_suspend_level = PCI_PMCSR_PME_EN | PCI_PMCSR_D0;
PCI_PMCSR_D0); \
pmcsr |= PCI_PMCSR_D0; /* D0 state */
if ((val & PCI_PMCSR_STATE_MASK) != PCI_PMCSR_D0) {
val = (val & ~PCI_PMCSR_STATE_MASK) | PCI_PMCSR_D0;
case PCI_PMCSR_D0:
pmcsr |= PCI_PMCSR_D0;