usr/src/cmd/pcieadm/pcieadm_cfgspace.c

5500

data.pcb_u32[cap / 4] == PCI_EINVAL32)

usr/src/uts/common/io/ixgbe/ixgbe_osdep.c

58

if (val == PCI_EINVAL32) {

usr/src/uts/common/io/pciex/pcie.c

1641

if (cap2 == PCI_EINVAL32)

usr/src/uts/common/io/pciex/pcie.c

1660

if (status == PCI_EINVAL16 || cap == PCI_EINVAL32)

usr/src/uts/common/io/pciex/pcie.c

998

if (high == PCI_EINVAL32 && low == PCI_EINVAL32)

usr/src/uts/common/io/pciex/pcie_fault.c

696

if (pcie_slot_regs->pcie_slot_cap != PCI_EINVAL32 &&

usr/src/uts/common/io/usb/hcd/ehci/ehci_util.c

1424

if (extended_cap == PCI_EINVAL32) {

usr/src/uts/common/io/usb/hcd/xhci/xhci.c

1014

ASSERT(roff != PCI_EINVAL32);

usr/src/uts/common/io/usb/hcd/xhci/xhci.c

1041

ASSERT(roff != PCI_EINVAL32);

usr/src/uts/common/io/usb/hcd/xhci/xhci.c

1455

if (cap_hdr == PCI_EINVAL32)

usr/src/uts/common/io/usb/hcd/xhci/xhci.c

2064

xhcip->xhci_regs_capoff = PCI_EINVAL32;

usr/src/uts/common/io/usb/hcd/xhci/xhci.c

2065

xhcip->xhci_regs_operoff = PCI_EINVAL32;

usr/src/uts/common/io/usb/hcd/xhci/xhci.c

2066

xhcip->xhci_regs_runoff = PCI_EINVAL32;

usr/src/uts/common/io/usb/hcd/xhci/xhci.c

2067

xhcip->xhci_regs_dooroff = PCI_EINVAL32;

usr/src/uts/common/io/usb/hcd/xhci/xhci.c

852

ASSERT(roff != PCI_EINVAL32);

usr/src/uts/common/io/usb/hcd/xhci/xhci.c

879

ASSERT(roff != PCI_EINVAL32);

usr/src/uts/common/io/usb/hcd/xhci/xhci.c

906

ASSERT(roff != PCI_EINVAL32);

usr/src/uts/common/io/usb/hcd/xhci/xhci.c

933

ASSERT(roff != PCI_EINVAL32);

usr/src/uts/common/io/usb/hcd/xhci/xhci.c

960

ASSERT(roff != PCI_EINVAL32);

usr/src/uts/common/io/usb/hcd/xhci/xhci.c

987

ASSERT(roff != PCI_EINVAL32);

usr/src/uts/common/io/vioblk/vioblk.c

1036

if (v != 0 && v != PCI_EINVAL32) {

usr/src/uts/common/io/vioblk/vioblk.c

874

if (v != 0 && v != PCI_EINVAL32)

usr/src/uts/common/io/vioblk/vioblk.c

935

if (vib->vib_seg_max == 0 || vib->vib_seg_max == PCI_EINVAL32) {

usr/src/uts/common/io/virtio/virtio_main.c

619

if (cap->vpc_offset == PCI_EINVAL32)

usr/src/uts/common/io/virtio/virtio_main.c

623

if (cap->vpc_size == PCI_EINVAL32)

usr/src/uts/common/io/virtio/virtio_main.c

636

if (vio->vio_multiplier == PCI_EINVAL32)

usr/src/uts/i86pc/io/pci/pci_tools.c

951

if (raw[idx] == PCI_EINVAL32)

usr/src/uts/i86pc/io/pci/pci_tools.c

981

if (raw[idx + 1] == PCI_EINVAL32) {

usr/src/uts/i86pc/os/pci_mech1.c

101

return (PCI_EINVAL32);

usr/src/uts/i86pc/os/pci_mech1.c

97

return (PCI_EINVAL32);

usr/src/uts/i86pc/os/pci_mech1_amd.c

143

return (PCI_EINVAL32);

usr/src/uts/i86pc/os/pci_mech1_amd.c

147

return (PCI_EINVAL32);

usr/src/uts/i86pc/os/pci_mech2.c

114

return (PCI_EINVAL32);

usr/src/uts/intel/io/amdnbtemp/amdnbtemp.c

112

if (at->at_raw == PCI_EINVAL32) {

usr/src/uts/intel/io/imc/imc.c

1194

if (mtr == PCI_EINVAL32) {

usr/src/uts/intel/io/imc/imc.c

1210

if (mcmtr == PCI_EINVAL32) {

usr/src/uts/intel/io/imc/imc.c

1497

if (tolm == PCI_EINVAL32 || tohm_low == PCI_EINVAL32 ||

usr/src/uts/intel/io/imc/imc.c

1498

tohm_hi == PCI_EINVAL32) {

usr/src/uts/intel/io/imc/imc.c

1702

if (dram == PCI_EINVAL32 || interleave == PCI_EINVAL32) {

usr/src/uts/intel/io/imc/imc.c

1883

if (val == PCI_EINVAL32) {

usr/src/uts/intel/io/imc/imc.c

1894

if (val == PCI_EINVAL32) {

usr/src/uts/intel/io/imc/imc.c

1926

if (val == PCI_EINVAL32) {

usr/src/uts/intel/io/imc/imc.c

1936

if (val == PCI_EINVAL32) {

usr/src/uts/intel/io/imc/imc.c

1960

if (val == PCI_EINVAL32) {

usr/src/uts/intel/io/imc/imc.c

1993

if (val == PCI_EINVAL32) {

usr/src/uts/intel/io/imc/imc.c

2072

if (val == PCI_EINVAL32) {

usr/src/uts/intel/io/imc/imc.c

2108

if (val == PCI_EINVAL32) {

usr/src/uts/intel/io/imc/imc.c

653

if (val == PCI_EINVAL32) {

usr/src/uts/intel/io/imc/imc.c

705

if (busno == PCI_EINVAL32) {

usr/src/uts/intel/io/imc/imc.c

988

if (nodeid == PCI_EINVAL32) {

usr/src/uts/intel/io/vmm/io/ppt.c

344

if (off == PCI_EINVAL32)