usr/src/cmd/mdb/intel/kmdb/kvm_isadep.c

449

if (kmt_iowrite(mdb.m_target, &addr, sizeof (addr), PCI_CONFADD) !=

usr/src/uts/i86pc/os/lgrpplat.c

3558

outl(PCI_CONFADD, OPT_PCI_ECS_ADDR(bus, dev,

usr/src/uts/i86pc/os/lgrpplat.c

3574

outl(PCI_CONFADD, OPT_PCI_ECS_ADDR(bus, dev,

usr/src/uts/i86pc/os/lgrpplat.c

3650

outl(PCI_CONFADD, PCI_CADDR1(0, dev, OPT_PCS_FUNC_DRAM,

usr/src/uts/i86pc/os/pci_mech1.c

105

outl(PCI_CONFADD, PCI_CADDR1(bus, device, function, reg));

usr/src/uts/i86pc/os/pci_mech1.c

124

outl(PCI_CONFADD, PCI_CADDR1(bus, device, function, reg));

usr/src/uts/i86pc/os/pci_mech1.c

142

outl(PCI_CONFADD, PCI_CADDR1(bus, device, function, reg));

usr/src/uts/i86pc/os/pci_mech1.c

160

outl(PCI_CONFADD, PCI_CADDR1(bus, device, function, reg));

usr/src/uts/i86pc/os/pci_mech1.c

63

outl(PCI_CONFADD, PCI_CADDR1(bus, device, function, reg));

usr/src/uts/i86pc/os/pci_mech1.c

84

outl(PCI_CONFADD, PCI_CADDR1(bus, device, function, reg));

usr/src/uts/i86pc/os/pci_mech1_amd.c

109

outl(PCI_CONFADD, PCI_CADDR1_ECS(bus, device, function, reg));

usr/src/uts/i86pc/os/pci_mech1_amd.c

130

outl(PCI_CONFADD, PCI_CADDR1_ECS(bus, device, function, reg));

usr/src/uts/i86pc/os/pci_mech1_amd.c

151

outl(PCI_CONFADD, PCI_CADDR1_ECS(bus, device, function, reg));

usr/src/uts/i86pc/os/pci_mech1_amd.c

166

outl(PCI_CONFADD, PCI_CADDR1_ECS(bus, device, function, reg));

usr/src/uts/i86pc/os/pci_mech1_amd.c

180

outl(PCI_CONFADD, PCI_CADDR1_ECS(bus, device, function, reg));

usr/src/uts/i86pc/os/pci_mech1_amd.c

194

outl(PCI_CONFADD, PCI_CADDR1_ECS(bus, device, function, reg));

usr/src/uts/i86pc/os/pci_neptune.c

103

outl(PCI_CONFADD, PCI_CADDR1(0, 0, 0, PCI_CONF_VENID));

usr/src/uts/i86pc/os/pci_neptune.c

106

outl(PCI_CONFADD, tmp);

usr/src/uts/i86pc/os/pci_neptune.c

132

outl(PCI_CONFADD, PCI_CADDR1(0, 0, 0, 0));

usr/src/uts/i86pc/os/pci_neptune.c

92

tmp = inl(PCI_CONFADD);