PCI_COMM_ME
if ((cmdreg & (PCI_COMM_MAE | PCI_COMM_ME)) != (PCI_COMM_MAE |
PCI_COMM_ME)) {
cmdreg |= PCI_COMM_MAE | PCI_COMM_ME;
if ((pci_cmd & PCI_COMM_ME) == 0) {
pci_cmd |= PCI_COMM_ME;
if ((pci_cmd & PCI_COMM_ME) == 0) {
command |= PCI_COMM_MAE | PCI_COMM_ME;
if ((command & PCI_COMM_ME) == 0) {
command |= PCI_COMM_MAE | PCI_COMM_ME;
if ((command & PCI_COMM_ME) == 0) {
pcics_reg |= (PCI_COMM_IO | PCI_COMM_MAE | PCI_COMM_ME);
pcics_reg &= ~(PCI_COMM_IO | PCI_COMM_MAE | PCI_COMM_ME);
cmdreg | PCI_COMM_IO | PCI_COMM_MAE | PCI_COMM_ME);
pci_command |= PCI_COMM_ME | PCI_COMM_IO;
pci_command |= PCI_COMM_ME | PCI_COMM_IO;
pci_command |= PCI_COMM_ME | PCI_COMM_IO;
cmdreg | PCI_COMM_MAE | PCI_COMM_ME);
pci_command |= PCI_COMM_ME | PCI_COMM_IO;
pci_command |= PCI_COMM_ME | PCI_COMM_IO;
data |= PCI_COMM_ME | PCI_COMM_IO;
pci_command |= PCI_COMM_ME | PCI_COMM_IO | PCI_COMM_MAE;
PCI_COMM_IO | PCI_COMM_MAE | PCI_COMM_ME | ret);
command &= ~(PCI_COMM_ME|PCI_COMM_MEMWR_INVAL);
command |= PCI_COMM_ME;
value16 = value16 | (PCI_COMM_MAE | PCI_COMM_ME);
PCI_COMM_ME | PCI_COMM_MAE |
comm |= (PCI_COMM_ME | PCI_COMM_MAE | PCI_COMM_IO |
comm |= (PCI_COMM_ME | PCI_COMM_PARITY_DETECT | PCI_COMM_SERR_ENABLE);
comm |= (PCI_COMM_ME | PCI_COMM_MAE | PCI_COMM_IO |
pci_config_put32(handle, PCI_CONF_COMM, (regval | PCI_COMM_ME));
pci_config_get16(pci, PCI_CONF_COMM) | PCI_COMM_MAE | PCI_COMM_ME);
PCI_COMM_IO | PCI_COMM_MAE | PCI_COMM_ME);
PCI_COMM_ME | PCI_COMM_PARITY_DETECT |
cmd = (uint16_t)(cmd & ~PCI_COMM_ME);
cmd = (uint16_t)(cmd | PCI_COMM_ME);
w = (uint16_t)(w | PCI_COMM_MAE | PCI_COMM_ME |
PCI_COMM_MAE | PCI_COMM_ME);
PCI_CONF_COMM) | PCI_COMM_ME));
if (!(command & PCI_COMM_ME)) {
command |= PCI_COMM_ME;
PCI_CONF_COMM) | PCI_COMM_ME));
if (!(command & PCI_COMM_ME)) {
command |= PCI_COMM_ME;
command = PCI_COMM_MAE | PCI_COMM_ME;
if ((cmd & PCI_COMM_ME) == 0) {
(csr |PCI_COMM_ME|PCI_COMM_MAE));
command |= PCI_COMM_ME;
PCI_COMM_ME |
pci_config_get16(pci, PCI_CONF_COMM) | PCI_COMM_ME | PCI_COMM_MAE);
command = PCI_COMM_MAE | PCI_COMM_ME;
commd |= PCI_COMM_ME | PCI_COMM_MAE | PCI_COMM_IO;
pci_commond |= PCI_COMM_ME | PCI_COMM_MAE | PCI_COMM_IO;
pci_commond |= PCI_COMM_ME | PCI_COMM_MAE | PCI_COMM_IO;
command = PCI_COMM_MAE | PCI_COMM_ME;
command = PCI_COMM_MAE | PCI_COMM_ME;
command = PCI_COMM_MAE | PCI_COMM_ME;
command|PCI_COMM_IO|PCI_COMM_MAE|PCI_COMM_ME);
command|PCI_COMM_IO|PCI_COMM_MAE|PCI_COMM_ME);
cmdreg |= (PCI_COMM_ME | PCI_COMM_SERR_ENABLE |
cmdreg &= ~PCI_COMM_ME;
PCI_COMM_MAE | PCI_COMM_ME);
PCI_COMM_IO | PCI_COMM_MAE | PCI_COMM_ME |
cmd_reg |= (PCI_COMM_ME | PCI_COMM_INTX_DISABLE);
cmd_reg |= (PCI_COMM_MAE | PCI_COMM_ME);
cmd_reg |= (PCI_COMM_MAE | PCI_COMM_ME);
if (!(command_reg & (PCI_COMM_MAE | PCI_COMM_ME))) {
command_reg |= PCI_COMM_MAE | PCI_COMM_ME;
PCI_COMM_IO | PCI_COMM_MAE | PCI_COMM_ME);
PCI_COMM_IO | PCI_COMM_MAE | PCI_COMM_ME);
pcicmd &= ~(PCI_COMM_ME|PCI_COMM_MAE|PCI_COMM_IO);
static ushort_t pci_command_default = PCI_COMM_ME |
if (!(command & PCI_COMM_ME)) {
command |= PCI_COMM_ME;
if (!(command & PCI_COMM_ME))
pci_config_put32(handle, PCI_CONF_COMM, (csr |PCI_COMM_ME|PCI_COMM_IO));
pci_config_put32(handle, PCI_CONF_COMM, (csr |PCI_COMM_ME|PCI_COMM_IO));
if ((cmdreg & PCI_COMM_ME) == 0) {
cmdreg | PCI_COMM_ME);
ASSERT((cmdreg & PCI_COMM_ME) != 0);
cmd_reg |= PCI_COMM_IO | PCI_COMM_ME;
cmd_reg |= PCI_COMM_MAE | PCI_COMM_ME;
static ushort_t ppb_command_default = PCI_COMM_ME | PCI_COMM_MAE | PCI_COMM_IO;
cmd |= PCI_COMM_ME;
cmd &= ~(PCI_COMM_ME | PCI_COMM_MAE | PCI_COMM_IO);
pci_config_put16(hdl, PCI_CONF_COMM, cmd & ~PCI_COMM_ME);
ret16 |= PCI_COMM_IO | PCI_COMM_ME;
comm |= (PCI_COMM_ME|PCI_COMM_MAE|PCI_COMM_SERR_ENABLE|
PCI_COMM_ME |
PCI_COMM_ME |
PCI_COMM_ME |
PCI_COMM_ME |
comm = (PCI_COMM_ME | PCI_COMM_MAE | PCI_COMM_SERR_ENABLE |
PCI_COMM_ME |