Symbol: PCI_CAP_GET32
usr/src/uts/common/io/ib/adapters/hermon/hermon.c
4660
state->hs_msix_tbl_offset = PCI_CAP_GET32(pci_cfg_hdl, 0, caps_ctrl,
usr/src/uts/common/io/ib/adapters/hermon/hermon.c
4710
state->hs_msix_pba_offset = PCI_CAP_GET32(pci_cfg_hdl, 0, caps_ctrl,
usr/src/uts/common/io/pci_intr_lib.c
226
PCI_CAP_GET32(h, 0, caps_ptr, PCI_MSI_ADDR_OFFSET)));
usr/src/uts/common/io/pci_intr_lib.c
233
"32bit msi_addr = %x\n", PCI_CAP_GET32(h, 0,
usr/src/uts/common/io/pci_intr_lib.c
505
if ((mask_bits = PCI_CAP_GET32(cfg_hdle, 0, caps_ptr,
usr/src/uts/common/io/pci_intr_lib.c
568
if ((mask_bits = PCI_CAP_GET32(cfg_hdle, 0, caps_ptr,
usr/src/uts/common/io/pci_intr_lib.c
635
if ((pending_bits = PCI_CAP_GET32(cfg_hdle, 0, caps_ptr,
usr/src/uts/common/io/pci_intr_lib.c
807
msix_p->msix_tbl_offset = PCI_CAP_GET32(cfg_hdle, 0, caps_ptr,
usr/src/uts/common/io/pci_intr_lib.c
868
msix_p->msix_pba_offset = PCI_CAP_GET32(cfg_hdle, 0, caps_ptr,
usr/src/uts/common/io/pciex/pcie.c
2968
val = PCI_CAP_GET32(handle, 0, cap_ptr, PCIE_ARI_CAP);
usr/src/uts/i86pc/io/amd_iommu/amd_iommu_impl.c
1011
range = PCI_CAP_GET32(handle, 0, cap_base, AMD_IOMMU_CAP_RANGE_OFF);
usr/src/uts/i86pc/io/amd_iommu/amd_iommu_impl.c
1037
misc = PCI_CAP_GET32(handle, 0, cap_base, AMD_IOMMU_CAP_MISC_OFF);
usr/src/uts/i86pc/io/amd_iommu/amd_iommu_impl.c
1301
caphdr = PCI_CAP_GET32(handle, 0, cap_base,
usr/src/uts/i86pc/io/amd_iommu/amd_iommu_impl.c
938
low_addr32 = PCI_CAP_GET32(handle, 0, cap_base,
usr/src/uts/i86pc/io/amd_iommu/amd_iommu_impl.c
974
caphdr = PCI_CAP_GET32(handle, 0, cap_base, AMD_IOMMU_CAP_HDR_OFF);
usr/src/uts/i86pc/io/amd_iommu/amd_iommu_impl.c
995
hi_addr32 = PCI_CAP_GET32(handle, 0, cap_base,
usr/src/uts/intel/io/vmm/io/ppt.c
807
if ((PCI_CAP_GET32(hdl, 0, cap_ptr, PCIE_DEVCAP2) &
usr/src/uts/intel/io/vmm/io/ppt.c
835
if ((PCI_CAP_GET32(hdl, 0, cap_ptr, PCIE_DEVCAP) & PCIE_DEVCAP_FLR)
usr/src/uts/sun4/io/pcicfg.c
3538
wordval = (PCI_CAP_GET32(config_handle, 0,
usr/src/uts/sun4/io/pcicfg.c
583
config = PCI_CAP_GET32(handle, 0, cap_ptr,