usr/src/boot/sys/x86/include/specialreg.h

551

#define PAT_MASK(i) PAT_VALUE(i, 0xff)

usr/src/uts/intel/io/vmm/amd/svm.c

396

state->g_pat = PAT_VALUE(0, PAT_WRITE_BACK) |

usr/src/uts/intel/io/vmm/amd/svm.c

397

PAT_VALUE(1, PAT_WRITE_THROUGH) |

usr/src/uts/intel/io/vmm/amd/svm.c

398

PAT_VALUE(2, PAT_UNCACHED) |

usr/src/uts/intel/io/vmm/amd/svm.c

399

PAT_VALUE(3, PAT_UNCACHEABLE) |

usr/src/uts/intel/io/vmm/amd/svm.c

400

PAT_VALUE(4, PAT_WRITE_BACK) |

usr/src/uts/intel/io/vmm/amd/svm.c

401

PAT_VALUE(5, PAT_WRITE_THROUGH) |

usr/src/uts/intel/io/vmm/amd/svm.c

402

PAT_VALUE(6, PAT_UNCACHED) |

usr/src/uts/intel/io/vmm/amd/svm.c

403

PAT_VALUE(7, PAT_UNCACHEABLE);

usr/src/uts/intel/io/vmm/intel/vmx_msr.c

382

guest_msrs[IDX_MSR_PAT] = PAT_VALUE(0, PAT_WRITE_BACK) |

usr/src/uts/intel/io/vmm/intel/vmx_msr.c

383

PAT_VALUE(1, PAT_WRITE_THROUGH) |

usr/src/uts/intel/io/vmm/intel/vmx_msr.c

384

PAT_VALUE(2, PAT_UNCACHED) |

usr/src/uts/intel/io/vmm/intel/vmx_msr.c

385

PAT_VALUE(3, PAT_UNCACHEABLE) |

usr/src/uts/intel/io/vmm/intel/vmx_msr.c

386

PAT_VALUE(4, PAT_WRITE_BACK) |

usr/src/uts/intel/io/vmm/intel/vmx_msr.c

387

PAT_VALUE(5, PAT_WRITE_THROUGH) |

usr/src/uts/intel/io/vmm/intel/vmx_msr.c

388

PAT_VALUE(6, PAT_UNCACHED) |

usr/src/uts/intel/io/vmm/intel/vmx_msr.c

389

PAT_VALUE(7, PAT_UNCACHEABLE);