Symbol: PBF_REG_P0_PAUSE_ENABLE
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
2771
REG_WR(cb, PBF_REG_P0_PAUSE_ENABLE + port*4, 1);
usr/src/uts/common/io/bnxe/577xx/common/bnxe_clc.c
2780
REG_WR(cb, PBF_REG_P0_PAUSE_ENABLE + port*4, 0);
usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/lm_hw_init_reset.c
3263
REG_WR(pdev,(PORT_ID(pdev) ? PBF_REG_P1_PAUSE_ENABLE : PBF_REG_P0_PAUSE_ENABLE),0);