NXGE_MAX_RDCS
int8_t set[NXGE_MAX_RDCS];
for (i = 0, cursor = 0; i < NXGE_MAX_RDCS; i++) {
for (i = 0, cursor = 0; i < NXGE_MAX_RDCS; i++) {
for (tbl_offset = 0; tbl_offset < NXGE_MAX_RDCS; tbl_offset++) {
(RDC_TBL_REG + table * (NXGE_MAX_RDCS * 8))
((rdc < NXGE_MAX_RDCS))
for (i = 0; i < NXGE_MAX_RDCS; i++) {
for (i = 0; i < NXGE_MAX_RDCS; i++) {
max_dcs = (type == MAC_RING_TYPE_TX) ? NXGE_MAX_TDCS : NXGE_MAX_RDCS;
for (i = 0; i < NXGE_MAX_RDCS; i++) {
if (channel > NXGE_MAX_RDCS) {
NXGE_MAX_TDCS : NXGE_MAX_RDCS;
for (channel = 0; channel < NXGE_MAX_RDCS; channel++) {
limit = NXGE_MAX_RDCS;
for (channel = 0; channel < NXGE_MAX_RDCS; channel++) {
for (channel = 0; channel < NXGE_MAX_RDCS; channel++) {
int8_t set[NXGE_MAX_RDCS];
for (i = 0, cursor = 0; i < NXGE_MAX_RDCS; i++) {
rdc_max = NXGE_MAX_RDCS;
int rdc_max = NXGE_MAX_RDCS;
for (rdc = 0; rdc < NXGE_MAX_RDCS; rdc++) {
for (rdc = 0; rdc < NXGE_MAX_RDCS; rdc++) {
for (rdc = 0; rdc < NXGE_MAX_RDCS; rdc++) {
for (rdc = 0; rdc < NXGE_MAX_RDCS; rdc++) {
for (rdc = 0; rdc < NXGE_MAX_RDCS; rdc++) {
for (channel = 0; channel < NXGE_MAX_RDCS; channel++) {
for (channel = 0; channel < NXGE_MAX_RDCS; channel++) {
for (rdc = 0; rdc < NXGE_MAX_RDCS; rdc++) {
for (rdc = 0; rdc < NXGE_MAX_RDCS; rdc++) {
for (rdc = 0; rdc < NXGE_MAX_RDCS; rdc++) {
for (i = 0; i < NXGE_MAX_RDCS; i++) {
for (channel = 0; channel < NXGE_MAX_RDCS; channel++) {
for (channel = 0; channel < NXGE_MAX_RDCS; channel++) {
NXGE_MAX_RDCS)) {
NXGE_MAX_RDCS) ||
NXGE_MAX_RDCS)) {
if (num_rdc > NXGE_MAX_RDCS) {
NXGE_MAX_RDCS)) {
kstat_t *rdc_ksp[NXGE_MAX_RDCS];
nxge_rx_ring_stats_t rdc_stats[NXGE_MAX_RDCS]; /* per rdc stats */
nxge_ring_handle_t rx_ring_handles[NXGE_MAX_RDCS];
#define NXGE_RDMA_PER_NIU_PORT (NXGE_MAX_RDCS/NXGE_PORTS_NIU)
uint32_t grpids[NXGE_MAX_RDCS]; /* RDC group IDs */
#define NXGE_RDMA_PER_NEP_PORT (NXGE_MAX_RDCS/NXGE_PORTS_NEPTUNE)
uint16_t rcr_timeout[NXGE_MAX_RDCS];
uint16_t rcr_threshold[NXGE_MAX_RDCS];
nxge_rdc_cfg_t rdc_config[NXGE_MAX_RDCS];
#define NXGE_MAX_DMCS (NXGE_MAX_RDCS + NXGE_MAX_TDCS)
#define VRXDMA_CHANNEL_VALID(n) (n < NXGE_MAX_RDCS)
#define LD_RXDMA_LD_VALID(n) (n < NXGE_MAX_RDCS)
#define LD_TXDMA_LD_VALID(n) (n >= NXGE_MAX_RDCS && \
((n - NXGE_MAX_RDCS) < NXGE_MAX_TDCS)))
nxge_hio_dc_t rdc[NXGE_MAX_RDCS];