usr/src/uts/common/io/chxge/com/ch_mac.c

116

mac_intr = t1_read_reg_4(mac->adapter, A_PL_ENABLE);

usr/src/uts/common/io/chxge/com/ch_mac.c

118

t1_write_reg_4(mac->adapter, A_PL_ENABLE, mac_intr);

usr/src/uts/common/io/chxge/com/ch_mac.c

90

mac_intr = t1_read_reg_4(mac->adapter, A_PL_ENABLE);

usr/src/uts/common/io/chxge/com/ch_mac.c

92

t1_write_reg_4(mac->adapter, A_PL_ENABLE, mac_intr);

usr/src/uts/common/io/chxge/com/ch_subr.c

1010

u32 pl_intr = t1_read_reg_4(adapter, A_PL_ENABLE);

usr/src/uts/common/io/chxge/com/ch_subr.c

1018

t1_write_reg_4(adapter, A_PL_ENABLE, pl_intr);

usr/src/uts/common/io/chxge/com/ch_subr.c

1051

t1_write_reg_4(adapter, A_PL_ENABLE, 0);

usr/src/uts/common/io/chxge/com/espi.c

127

u32 enable, pl_intr = t1_read_reg_4(espi->adapter, A_PL_ENABLE);

usr/src/uts/common/io/chxge/com/espi.c

138

t1_write_reg_4(espi->adapter, A_PL_ENABLE, pl_intr | F_PL_INTR_ESPI);

usr/src/uts/common/io/chxge/com/espi.c

150

u32 pl_intr = t1_read_reg_4(espi->adapter, A_PL_ENABLE);

usr/src/uts/common/io/chxge/com/espi.c

153

t1_write_reg_4(espi->adapter, A_PL_ENABLE, pl_intr & ~F_PL_INTR_ESPI);

usr/src/uts/common/io/chxge/com/mc3.c

46

u32 en = t1_read_reg_4(mc3->adapter, A_PL_ENABLE);

usr/src/uts/common/io/chxge/com/mc3.c

50

t1_write_reg_4(mc3->adapter, A_PL_ENABLE, en | F_PL_INTR_MC3);

usr/src/uts/common/io/chxge/com/mc3.c

55

t1_write_reg_4(mc3->adapter, A_PL_ENABLE,

usr/src/uts/common/io/chxge/com/mc3.c

63

u32 pl_intr = t1_read_reg_4(mc3->adapter, A_PL_ENABLE);

usr/src/uts/common/io/chxge/com/mc3.c

67

t1_write_reg_4(mc3->adapter, A_PL_ENABLE,

usr/src/uts/common/io/chxge/com/mc3.c

72

t1_write_reg_4(mc3->adapter, A_PL_ENABLE,

usr/src/uts/common/io/chxge/com/mc4.c

217

pl_intr = t1_read_reg_4(mc4->adapter, A_PL_ENABLE);

usr/src/uts/common/io/chxge/com/mc4.c

218

t1_write_reg_4(mc4->adapter, A_PL_ENABLE,

usr/src/uts/common/io/chxge/com/mc4.c

230

pl_intr = t1_read_reg_4(mc4->adapter, A_PL_ENABLE);

usr/src/uts/common/io/chxge/com/mc4.c

231

t1_write_reg_4(mc4->adapter, A_PL_ENABLE,

usr/src/uts/common/io/chxge/com/mc5.c

518

u32 pl_intr = t1_read_reg_4(mc5->adapter, A_PL_ENABLE);

usr/src/uts/common/io/chxge/com/mc5.c

520

t1_write_reg_4(mc5->adapter, A_PL_ENABLE,

usr/src/uts/common/io/chxge/com/mc5.c

536

u32 pl_intr = t1_read_reg_4(mc5->adapter, A_PL_ENABLE);

usr/src/uts/common/io/chxge/com/mc5.c

538

t1_write_reg_4(mc5->adapter, A_PL_ENABLE,

usr/src/uts/common/io/chxge/com/pm3393.c

165

pl_intr = t1_read_reg_4(cmac->adapter, A_PL_ENABLE);

usr/src/uts/common/io/chxge/com/pm3393.c

167

t1_write_reg_4(cmac->adapter, A_PL_ENABLE, pl_intr);

usr/src/uts/common/io/chxge/com/tp.c

317

u32 tp_intr = t1_read_reg_4(tp->adapter, A_PL_ENABLE);

usr/src/uts/common/io/chxge/com/tp.c

324

t1_write_reg_4(tp->adapter, A_PL_ENABLE,

usr/src/uts/common/io/chxge/com/tp.c

331

t1_write_reg_4(tp->adapter, A_PL_ENABLE,

usr/src/uts/common/io/chxge/com/tp.c

338

u32 tp_intr = t1_read_reg_4(tp->adapter, A_PL_ENABLE);

usr/src/uts/common/io/chxge/com/tp.c

344

t1_write_reg_4(tp->adapter, A_PL_ENABLE,

usr/src/uts/common/io/chxge/com/tp.c

350

t1_write_reg_4(tp->adapter, A_PL_ENABLE,

usr/src/uts/common/io/chxge/com/ulp.c

45

u32 pl_intr = t1_read_reg_4(ulp->adapter, A_PL_ENABLE);

usr/src/uts/common/io/chxge/com/ulp.c

48

t1_write_reg_4(ulp->adapter, A_PL_ENABLE,

usr/src/uts/common/io/chxge/com/ulp.c

64

u32 pl_intr = t1_read_reg_4(ulp->adapter, A_PL_ENABLE);

usr/src/uts/common/io/chxge/com/ulp.c

66

t1_write_reg_4(ulp->adapter, A_PL_ENABLE,

usr/src/uts/common/io/chxge/pe.c

1520

enable = t1_read_reg_4(adapter, A_PL_ENABLE);

usr/src/uts/common/io/chxge/pe.c

1521

t1_write_reg_4(adapter, A_PL_ENABLE, enable | F_PL_INTR_EXT);

usr/src/uts/common/io/chxge/pe.c

1531

u32 enable = t1_read_reg_4(adapter, A_PL_ENABLE);

usr/src/uts/common/io/chxge/pe.c

1534

t1_write_reg_4(adapter, A_PL_ENABLE, enable & ~F_PL_INTR_EXT);

usr/src/uts/common/io/chxge/sge.c

506

u32 val = t1_read_reg_4(sge->obj, A_PL_ENABLE);

usr/src/uts/common/io/chxge/sge.c

508

t1_write_reg_4(sge->obj, A_PL_ENABLE, val & ~SGE_PL_INTR_MASK);

usr/src/uts/common/io/chxge/sge.c

523

u32 val = t1_read_reg_4(sge->obj, A_PL_ENABLE);

usr/src/uts/common/io/chxge/sge.c

525

t1_write_reg_4(sge->obj, A_PL_ENABLE, val | SGE_PL_INTR_MASK);